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Thu, 30 Apr 2026 06:22:01 +0000 Message-ID: Date: Thu, 30 Apr 2026 08:21:56 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12 To: Ulisses Paixao , alexander.deucher@amd.com, airlied@gmail.com, simona@ffwll.ch Cc: Felipe Sousa , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org References: <20260429173646.7653-1-ulissespaixao@usp.br> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20260429173646.7653-1-ulissespaixao@usp.br> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: FR4P281CA0135.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:b9::20) To PH7PR12MB5685.namprd12.prod.outlook.com (2603:10b6:510:13c::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PR12MB5685:EE_|SJ2PR12MB7896:EE_ X-MS-Office365-Filtering-Correlation-Id: 381da84c-16d2-4273-1c87-08dea680ca38 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Weitere Informationen, warum dies wichtig ist, finden Sie unter https://aka.ms/LearnAboutSenderIdentification ] > > The functions gfx_v11_0_handle_priv_fault and gfx_v12_0_handle_priv_fault > are identical. This patch replaces them with a single implementation in > amdgpu_gfx, called amdgpu_gfx_handle_priv_fault, to reduce code > duplication. > > Signed-off-by: Ulisses Paixao > Co-developed-by: Felipe Sousa > Signed-off-by: Felipe Sousa > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 46 +++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 ++ > drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 43 ++--------------------- > drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 43 ++--------------------- > 4 files changed, 54 insertions(+), 80 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > index b8ca87669..c8d769cb0 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c > @@ -830,6 +830,52 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id) > return r; > } > > +/** > + * amdgpu_gfx_handle_priv_fault - Handle privileged instruction fault > + * > + * @adev: amdgpu_device pointer > + * @entry: interrupt vector entry from the hardware > + * > + * This function handles privileged instruction faults by identifying > + * the faulty ring (gfx or compute) and triggering a scheduler fault. > + */ > +void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev, > + struct amdgpu_iv_entry *entry) > +{ > + u8 me_id, pipe_id, queue_id; > + struct amdgpu_ring *ring; > + int i; > + > + me_id = (entry->ring_id & 0x0c) >> 2; > + pipe_id = (entry->ring_id & 0x03) >> 0; > + queue_id = (entry->ring_id & 0x70) >> 4; Even when they are identical on gfx11 and gfx12 this decoding here is HW specific and doesn't belong here. > + > + if (!adev->gfx.disable_kq) { That check can probably be removed. Both num_gfx_rings and num_compute_rings should be zero in that case. > + switch (me_id) { > + case 0: > + for (i = 0; i < adev->gfx.num_gfx_rings; i++) { > + ring = &adev->gfx.gfx_ring[i]; > + if (ring->me == me_id && ring->pipe == pipe_id && > + ring->queue == queue_id) > + drm_sched_fault(&ring->sched); > + } > + break; > + case 1: > + case 2: > + for (i = 0; i < adev->gfx.num_compute_rings; i++) { > + ring = &adev->gfx.compute_ring[i]; > + if (ring->me == me_id && ring->pipe == pipe_id && > + ring->queue == queue_id) > + drm_sched_fault(&ring->sched); > + } > + break; > + default: > + BUG(); > + break; > + } > + } This part can be moved into amdgpu_gfx. But I would remove the switch (me_id) part and just go over all gfx and compute rings to search for the matching me and pipe. Regards, Christian. > +} > + > static void amdgpu_gfx_do_off_ctrl(struct amdgpu_device *adev, bool enable, > bool no_delay) > { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > index a0cf0a3b4..5655af43d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h > @@ -611,6 +611,8 @@ bool amdgpu_gfx_is_high_priority_graphics_queue(struct amdgpu_device *adev, > struct amdgpu_ring *ring); > bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me, > int pipe, int queue); > +void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev, > + struct amdgpu_iv_entry *entry); > void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable); > void amdgpu_gfx_off_ctrl_immediate(struct amdgpu_device *adev, bool enable); > int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value); > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > index 2c6f1e25c..da869f928 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > @@ -6684,49 +6684,12 @@ static int gfx_v11_0_set_priv_inst_fault_state(struct amdgpu_device *adev, > return 0; > } > > -static void gfx_v11_0_handle_priv_fault(struct amdgpu_device *adev, > - struct amdgpu_iv_entry *entry) > -{ > - u8 me_id, pipe_id, queue_id; > - struct amdgpu_ring *ring; > - int i; > - > - me_id = (entry->ring_id & 0x0c) >> 2; > - pipe_id = (entry->ring_id & 0x03) >> 0; > - queue_id = (entry->ring_id & 0x70) >> 4; > - > - if (!adev->gfx.disable_kq) { > - switch (me_id) { > - case 0: > - for (i = 0; i < adev->gfx.num_gfx_rings; i++) { > - ring = &adev->gfx.gfx_ring[i]; > - if (ring->me == me_id && ring->pipe == pipe_id && > - ring->queue == queue_id) > - drm_sched_fault(&ring->sched); > - } > - break; > - case 1: > - case 2: > - for (i = 0; i < adev->gfx.num_compute_rings; i++) { > - ring = &adev->gfx.compute_ring[i]; > - if (ring->me == me_id && ring->pipe == pipe_id && > - ring->queue == queue_id) > - drm_sched_fault(&ring->sched); > - } > - break; > - default: > - BUG(); > - break; > - } > - } > -} > - > static int gfx_v11_0_priv_reg_irq(struct amdgpu_device *adev, > struct amdgpu_irq_src *source, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal register access in command stream\n"); > - gfx_v11_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > @@ -6735,7 +6698,7 @@ static int gfx_v11_0_bad_op_irq(struct amdgpu_device *adev, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal opcode in command stream\n"); > - gfx_v11_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > @@ -6744,7 +6707,7 @@ static int gfx_v11_0_priv_inst_irq(struct amdgpu_device *adev, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal instruction in command stream\n"); > - gfx_v11_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > index 6baac533a..883878e23 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > @@ -5015,49 +5015,12 @@ static int gfx_v12_0_set_priv_inst_fault_state(struct amdgpu_device *adev, > return 0; > } > > -static void gfx_v12_0_handle_priv_fault(struct amdgpu_device *adev, > - struct amdgpu_iv_entry *entry) > -{ > - u8 me_id, pipe_id, queue_id; > - struct amdgpu_ring *ring; > - int i; > - > - me_id = (entry->ring_id & 0x0c) >> 2; > - pipe_id = (entry->ring_id & 0x03) >> 0; > - queue_id = (entry->ring_id & 0x70) >> 4; > - > - if (!adev->gfx.disable_kq) { > - switch (me_id) { > - case 0: > - for (i = 0; i < adev->gfx.num_gfx_rings; i++) { > - ring = &adev->gfx.gfx_ring[i]; > - if (ring->me == me_id && ring->pipe == pipe_id && > - ring->queue == queue_id) > - drm_sched_fault(&ring->sched); > - } > - break; > - case 1: > - case 2: > - for (i = 0; i < adev->gfx.num_compute_rings; i++) { > - ring = &adev->gfx.compute_ring[i]; > - if (ring->me == me_id && ring->pipe == pipe_id && > - ring->queue == queue_id) > - drm_sched_fault(&ring->sched); > - } > - break; > - default: > - BUG(); > - break; > - } > - } > -} > - > static int gfx_v12_0_priv_reg_irq(struct amdgpu_device *adev, > struct amdgpu_irq_src *source, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal register access in command stream\n"); > - gfx_v12_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > @@ -5066,7 +5029,7 @@ static int gfx_v12_0_bad_op_irq(struct amdgpu_device *adev, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal opcode in command stream\n"); > - gfx_v12_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > @@ -5075,7 +5038,7 @@ static int gfx_v12_0_priv_inst_irq(struct amdgpu_device *adev, > struct amdgpu_iv_entry *entry) > { > DRM_ERROR("Illegal instruction in command stream\n"); > - gfx_v12_0_handle_priv_fault(adev, entry); > + amdgpu_gfx_handle_priv_fault(adev, entry); > return 0; > } > > -- > 2.34.1 >