From: "Christian König" <christian.koenig@amd.com>
To: amd-gfx@lists.freedesktop.org, Darren Salt <devspam@moreofthesa.me.uk>
Subject: Re: [PATCH 3/7] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM (v2)
Date: Mon, 14 Dec 2020 21:44:21 +0100 [thread overview]
Message-ID: <e166d0df-ef79-4f72-e58d-8db807f4ae69@amd.com> (raw)
In-Reply-To: <58E43922F8%devspam@moreofthesa.me.uk>
Am 14.12.20 um 16:46 schrieb Darren Salt:
> I demand that Christian König may or may not have written...
>
>> Am 11.12.20 um 18:31 schrieb Darren Salt:
>> < [SNIP]
>>>> If that isn't the case use fls() to get the highest set bit < 13.
>>> That suggests that it'll be easiest to clear each bit after the
>>> corresponding size is checked, I think.
>> Ok, well you don't seem to understand my constrain here: Never check
>> more than one size!
> Checking context: it appeared to be the for() statement itself rather than
> the whole loop. It didn't help that “try and error” looks like “try to error”
> to me; I now think that you meant “trial and error”.
I'm not a native speaker of English, so bear with me if I get such stuff
wrong.
>> Find the first valid size which is good for you and then try to resize
>> to that one, if this doesn't work abort.
> So, basically, stop even when the next size down would be fine, e.g. 16GB →
> 8GB. Just as well that size limiting is done in a later patch, though I
> wonder whether that should allow per-GPU configuration (not something for
> this patch series, though).
Yes, just try the whole dance with exactly one size and not multiple times.
>
>>> Also, this looks like it's adding complexity to try to make
>>> rarely-executed code slightly faster in some cases (I can't see it
>>> helping where available_sizes == 0x3F00, for example).
>> The intention here is not to make the code faster, but to prevent issues on
>> system where we probe multiple GPUs at once.
> Presumably simultaneous probes and random ordering…
Exactly.
Good news is that I think I've figured out why that happens and our
hardware/VBIOS engineers are investigating now what's the best approach
to make thinks work as it should :)
We most likely will end up with a static quirk for this
PCI-ID/revision/board/manufacturer.
Regards,
Christian.
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next prev parent reply other threads:[~2020-12-14 20:44 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 0:54 [PATCH 0/7] amdgpu, pci: improved BAR resizing support Darren Salt
2020-12-11 0:55 ` [PATCH 1/7] pci: export PCI BAR size-reading functions Darren Salt
2020-12-11 9:07 ` Christian König
2020-12-11 0:55 ` [PATCH 2/7] pci: add BAR bytes->size helper & expose size->bytes helper Darren Salt
2020-12-11 0:55 ` [PATCH 3/7] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM (v2) Darren Salt
2020-12-11 16:42 ` Christian König
2020-12-11 17:31 ` Darren Salt
2020-12-11 19:06 ` Alex Deucher
2020-12-14 8:12 ` Christian König
2020-12-14 15:46 ` Darren Salt
2020-12-14 20:44 ` Christian König [this message]
2020-12-11 0:55 ` [PATCH 4/7] amdgpu: module option controlling whether BAR0 resizing is done Darren Salt
2020-12-11 9:09 ` Christian König
2020-12-11 0:55 ` [PATCH 5/7] amdgpu: limit maximum FB BAR size when attempting to enlarge Darren Salt
2020-12-11 0:55 ` [PATCH 6/7] pci: allow for overriding the list of advertised BAR sizes Darren Salt
2020-12-11 0:55 ` [PATCH 7/7] amdgpu: allow overriding of the GPU's list of supported " Darren Salt
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