Re: [PATCH v8 17/17] drm/amd/display: Trigger modesets on MST DSC connectors

[Lyude Paul <lyude@redhat.com>]

Reviewed-by: Lyude Paul <lyude@redhat.com>

On Tue, 2019-12-03 at 09:35 -0500, mikita.lipski@amd.com wrote:
> From: Mikita Lipski <mikita.lipski@amd.com>
> 
> Whenever a connector on an MST network is attached, detached, or
> undergoes a modeset, the DSC configs for each stream on that
> topology will be recalculated. This can change their required
> bandwidth, requiring a full reprogramming, as though a modeset
> was performed, even if that stream did not change timing.
> 
> Therefore, whenever a crtc has drm_atomic_crtc_needs_modeset,
> for each crtc that shares a MST topology with that stream and
> supports DSC, add that crtc (and all affected connectors and
> planes) to the atomic state and set mode_changed on its state
> 
> v2: Do this check only on Navi and before adding connectors
> and planes on modesetting crtcs
> 
> Cc: Leo Li <sunpeng.li@amd.com>
> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Signed-off-by: David Francis <David.Francis@amd.com>
> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 33 +++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2ac3a2f0b452..909665427110 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -7930,6 +7930,29 @@ dm_determine_update_type_for_commit(struct
> amdgpu_display_manager *dm,
>  	return ret;
>  }
>  
> +static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state,
> struct drm_crtc *crtc)
> +{
> +	struct drm_connector *connector;
> +	struct drm_connector_state *conn_state;
> +	struct amdgpu_dm_connector *aconnector = NULL;
> +	int i;
> +	for_each_new_connector_in_state(state, connector, conn_state, i) {
> +		if (conn_state->crtc != crtc)
> +			continue;
> +
> +		aconnector = to_amdgpu_dm_connector(connector);
> +		if (!aconnector->port)
> +			aconnector = NULL;
> +		else
> +			break;
> +	}
> +
> +	if (!aconnector)
> +		return 0;
> +
> +	return drm_dp_mst_add_affected_dsc_crtcs(state, &aconnector->mst_mgr);
> +}
> +
>  /**
>   * amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM.
>   * @dev: The DRM device
> @@ -7982,6 +8005,16 @@ static int amdgpu_dm_atomic_check(struct drm_device
> *dev,
>  	if (ret)
>  		goto fail;
>  
> +	if (adev->asic_type >= CHIP_NAVI10) {
> +		for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
> +			if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
> +				ret = add_affected_mst_dsc_crtcs(state, crtc);
> +				if (ret)
> +					goto fail;
> +			}
> +		}
> +	}
> +
>  	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
> new_crtc_state, i) {
>  		if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
>  		    !new_crtc_state->color_mgmt_changed &&
-- 
Cheers,
	Lyude Paul

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