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From: "Christian König" <christian.koenig@amd.com>
To: Prike Liang <Prike.Liang@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Alexander.Deucher@amd.com, Lijo.Lazar@amd.com, Vitaly.Prosyak@amd.com
Subject: Re: [PATCH 6/9] drm/amdgpu: serialize JPEG and VCN idle work with GPU reset
Date: Tue, 13 Oct 2026 11:28:36 +0200	[thread overview]
Message-ID: <edf91d9d-e962-4583-9c1f-dbc609d6aae3@amd.com> (raw)
In-Reply-To: <20261013082457.2492273-6-Prike.Liang@amd.com>

On 10/13/26 10:24, Prike Liang wrote:
> Take the reset-domain read semaphore in the common JPEG and VCN idle
> workers so their hardware accesses wait for GPU recovery to finish.
> Keep end-use scheduling, including from recovery ring tests, so idle
> engines can power down even if no further jobs arrive.
> 
> Do not synchronously cancel these workers from recovery while holding
> the reset write semaphore. Use nonblocking cancellation in the common
> ring begin-use paths and during reset-time hardware finalization, while
> retaining synchronous draining for normal suspend and teardown.
> 
> Serialize the idle decision and VCN DPG pause updates with begin-use
> under the power-gating mutex. Check the submission count before reading
> fences, with acquire ordering against end-use, so a running worker cannot
> miss a submission that completes between the two checks.
> 
> VCN 1.0 and 2.5 override the common idle worker and retain their existing
> worker and cancellation behavior.
> 
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 28 +++++++++++++++------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c  | 32 ++++++++++++++++++------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h  |  1 +
>  drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c |  3 +--
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c  |  2 +-
>  21 files changed, 65 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> index 9887a4f99aed..39b53730f59a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> @@ -97,7 +97,11 @@ int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev)
>  
>  int amdgpu_jpeg_suspend(struct amdgpu_device *adev)
>  {
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	/* The idle worker may be waiting for the reset writer to release sem. */
> +	if (amdgpu_in_reset(adev))

Again, complete NAK to that!

Christian.

> +		cancel_delayed_work(&adev->jpeg.idle_work);
> +	else
> +		cancel_delayed_work_sync(&adev->jpeg.idle_work);
>  
>  	return 0;
>  }
> @@ -114,6 +118,12 @@ static void amdgpu_jpeg_idle_work_handler(struct work_struct *work)
>  	unsigned int fences = 0;
>  	unsigned int i, j;
>  
> +	down_read(&adev->reset_domain->sem);
> +	mutex_lock(&adev->jpeg.jpeg_pg_lock);
> +	/* Check submissions before fences, while excluding a new begin_use. */
> +	if (atomic_read_acquire(&adev->jpeg.total_submission_cnt))
> +		goto reschedule;
> +
>  	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
>  		if (adev->jpeg.harvest_config & (1U << i))
>  			continue;
> @@ -122,13 +132,17 @@ static void amdgpu_jpeg_idle_work_handler(struct work_struct *work)
>  			fences += amdgpu_fence_count_emitted(&adev->jpeg.inst[i].ring_dec[j]);
>  	}
>  
> -	if (!fences && !atomic_read(&adev->jpeg.total_submission_cnt)) {
> -		mutex_lock(&adev->jpeg.jpeg_pg_lock);
> +	if (!fences) {
>  		amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_JPEG,
>  						       AMD_PG_STATE_GATE);
> -		mutex_unlock(&adev->jpeg.jpeg_pg_lock);
> -	} else
> -		schedule_delayed_work(&adev->jpeg.idle_work, JPEG_IDLE_TIMEOUT);
> +		goto unlock;
> +	}
> +
> +reschedule:
> +	schedule_delayed_work(&adev->jpeg.idle_work, JPEG_IDLE_TIMEOUT);
> +unlock:
> +	mutex_unlock(&adev->jpeg.jpeg_pg_lock);
> +	up_read(&adev->reset_domain->sem);
>  }
>  
>  void amdgpu_jpeg_ring_begin_use(struct amdgpu_ring *ring)
> @@ -136,7 +150,7 @@ void amdgpu_jpeg_ring_begin_use(struct amdgpu_ring *ring)
>  	struct amdgpu_device *adev = ring->adev;
>  
>  	if (!atomic_fetch_inc(&adev->jpeg.total_submission_cnt))
> -		cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +		cancel_delayed_work(&adev->jpeg.idle_work);
>  
>  	mutex_lock(&adev->jpeg.jpeg_pg_lock);
>  	amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_JPEG,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index 17db7264269e..d37f36d554df 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -459,6 +459,15 @@ void amdgpu_vcn_put_profile(struct amdgpu_device *adev)
>  	mutex_unlock(&adev->vcn.workload_profile_mutex);
>  }
>  
> +void amdgpu_vcn_cancel_idle_work(struct amdgpu_vcn_inst *vcn_inst)
> +{
> +	/* The idle worker may be waiting for the reset writer to release sem. */
> +	if (amdgpu_in_reset(vcn_inst->adev))
> +		cancel_delayed_work(&vcn_inst->idle_work);
> +	else
> +		cancel_delayed_work_sync(&vcn_inst->idle_work);
> +}
> +
>  static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
>  {
>  	struct amdgpu_vcn_inst *vcn_inst =
> @@ -466,10 +475,17 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
>  	struct amdgpu_device *adev = vcn_inst->adev;
>  	unsigned int fences = 0, fence[AMDGPU_MAX_VCN_INSTANCES] = {0};
>  	unsigned int i = vcn_inst->inst, j;
> +	bool idle = false;
>  
>  	if (adev->vcn.harvest_config & (1 << i))
>  		return;
>  
> +	down_read(&adev->reset_domain->sem);
> +	mutex_lock(&vcn_inst->vcn_pg_lock);
> +	/* Check submissions before fences, while excluding a new begin_use. */
> +	if (atomic_read_acquire(&vcn_inst->total_submission_cnt))
> +		goto unlock;
> +
>  	for (j = 0; j < adev->vcn.inst[i].num_enc_rings; ++j)
>  		fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_enc[j]);
>  
> @@ -490,15 +506,17 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
>  	fence[i] += amdgpu_fence_count_emitted(&vcn_inst->ring_dec);
>  	fences += fence[i];
>  
> -	if (!fences && !atomic_read(&vcn_inst->total_submission_cnt)) {
> -		mutex_lock(&vcn_inst->vcn_pg_lock);
> +	idle = !fences;
> +	if (idle)
>  		vcn_inst->set_pg_state(vcn_inst, AMD_PG_STATE_GATE);
> -		mutex_unlock(&vcn_inst->vcn_pg_lock);
> -		amdgpu_vcn_put_profile(adev);
>  
> -	} else {
> +unlock:
> +	mutex_unlock(&vcn_inst->vcn_pg_lock);
> +	if (idle)
> +		amdgpu_vcn_put_profile(adev);
> +	else
>  		schedule_delayed_work(&vcn_inst->idle_work, VCN_IDLE_TIMEOUT);
> -	}
> +	up_read(&adev->reset_domain->sem);
>  }
>  
>  void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
> @@ -507,7 +525,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
>  	struct amdgpu_vcn_inst *vcn_inst = &adev->vcn.inst[ring->me];
>  
>  	if (!atomic_fetch_inc(&vcn_inst->total_submission_cnt))
> -		cancel_delayed_work_sync(&vcn_inst->idle_work);
> +		cancel_delayed_work(&vcn_inst->idle_work);
>  
>  	mutex_lock(&vcn_inst->vcn_pg_lock);
>  	vcn_inst->set_pg_state(vcn_inst, AMD_PG_STATE_UNGATE);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index bea95307fd42..a6438950854e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -526,6 +526,7 @@ int amdgpu_vcn_suspend(struct amdgpu_device *adev, int i);
>  int amdgpu_vcn_resume(struct amdgpu_device *adev, int i);
>  void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring);
>  void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring);
> +void amdgpu_vcn_cancel_idle_work(struct amdgpu_vcn_inst *vcn_inst);
>  
>  bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev,
>  				enum vcn_ring_type type, uint32_t vcn_instance);
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index 72069b77f6f1..b048fd4b8b59 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -177,7 +177,7 @@ static int jpeg_v2_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  {
>  	struct amdgpu_device *adev = ip_block->adev;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
>  	      RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> index 2968256d4cd7..f6a9258ae3ca 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
> @@ -239,7 +239,7 @@ static int jpeg_v2_5_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	int i;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
>  		if (adev->jpeg.harvest_config & (1 << i))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> index 564e40899df2..922711aa06a3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
> @@ -192,7 +192,7 @@ static int jpeg_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  {
>  	struct amdgpu_device *adev = ip_block->adev;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
>  	      RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> index b29ca3a49939..fe7ab9cb35bb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
> @@ -221,7 +221,7 @@ static int jpeg_v4_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  {
>  	struct amdgpu_device *adev = ip_block->adev;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  	if (!amdgpu_sriov_vf(adev)) {
>  		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
>  			RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index 0343a64595f2..f4896ad9d1de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -455,7 +455,7 @@ static int jpeg_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	int ret = 0;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (!amdgpu_sriov_vf(adev)) {
>  		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE)
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> index 4da3f9c995c1..5a0132407a30 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
> @@ -250,7 +250,7 @@ static int jpeg_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	int i;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
>  		if (adev->jpeg.harvest_config & (1 << i))
> @@ -883,4 +883,3 @@ const struct amdgpu_ip_block_version jpeg_v4_0_5_ip_block = {
>  	.rev = 5,
>  	.funcs = &jpeg_v4_0_5_ip_funcs,
>  };
> -
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> index dcdb089b4308..91968ad26f17 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> @@ -189,7 +189,7 @@ static int jpeg_v5_0_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  {
>  	struct amdgpu_device *adev = ip_block->adev;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
>  	      RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> index f2debf6b6bd0..27116d1e9e64 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
> @@ -326,7 +326,7 @@ static int jpeg_v5_0_1_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	int ret = 0;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (!amdgpu_sriov_vf(adev)) {
>  		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE)
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c
> index dd0abce73687..7e068c2d4d6d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_2.c
> @@ -299,7 +299,7 @@ static int jpeg_v5_0_2_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	int ret = 0;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (!amdgpu_sriov_vf(adev)) {
>  		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE)
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> index 8ddd12740a04..16daeb61114c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> @@ -172,7 +172,7 @@ static int jpeg_v5_3_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  {
>  	struct amdgpu_device *adev = ip_block->adev;
>  
> -	cancel_delayed_work_sync(&adev->jpeg.idle_work);
> +	amdgpu_jpeg_suspend(adev);
>  
>  	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
>  	      RREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_STATUS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 7d2b9e4b913a..50378ee5a463 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -322,7 +322,7 @@ static int vcn_v2_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  	struct amdgpu_device *adev = ip_block->adev;
>  	struct amdgpu_vcn_inst *vinst = adev->vcn.inst;
>  
> -	cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  	if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
>  	    (vinst->cur_state != AMD_PG_STATE_GATE &&
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index 0f4f4d66e2e4..3e85abd1e82c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -449,7 +449,7 @@ static int vcn_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  		if (adev->vcn.harvest_config & (1 << i))
>  			continue;
>  
> -		cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  		if (!amdgpu_sriov_vf(adev)) {
>  			if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index 4b7f7bbe18da..5b47a643d725 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -374,7 +374,7 @@ static int vcn_v4_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  		if (adev->vcn.harvest_config & (1 << i))
>  			continue;
>  
> -		cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  		if (!amdgpu_sriov_vf(adev)) {
>  			if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> index 3f39aa83c319..5aa09c3bd79b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
> @@ -417,7 +417,7 @@ static int vcn_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block)
>  	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
>  		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
>  
> -		cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  		if (vinst->cur_state != AMD_PG_STATE_GATE)
>  			vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> index f30f80c1b07f..9693950cd16d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
> @@ -327,7 +327,7 @@ static int vcn_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block)
>  		if (adev->vcn.harvest_config & (1 << i))
>  			continue;
>  
> -		cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  		if (!amdgpu_sriov_vf(adev)) {
>  			if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index 7b7c3bc9f046..0c189063a6ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -291,7 +291,7 @@ static int vcn_v5_0_0_hw_fini(struct amdgpu_ip_block *ip_block)
>  		if (adev->vcn.harvest_config & (1 << i))
>  			continue;
>  
> -		cancel_delayed_work_sync(&vinst->idle_work);
> +		amdgpu_vcn_cancel_idle_work(vinst);
>  
>  		if (!amdgpu_sriov_vf(adev)) {
>  			if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) ||
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> index c9e990ab297d..3fa553fb41d3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
> @@ -364,7 +364,7 @@ static int vcn_v5_0_1_hw_fini(struct amdgpu_ip_block *ip_block)
>  	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
>  		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
>  
> -		cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
> +		amdgpu_vcn_cancel_idle_work(&adev->vcn.inst[i]);
>  		if (vinst->cur_state != AMD_PG_STATE_GATE)
>  			vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
>  	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c
> index ed47ddd5b08c..eb13f792e25d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_2.c
> @@ -279,7 +279,7 @@ static int vcn_v5_0_2_hw_fini(struct amdgpu_ip_block *ip_block)
>  	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
>  		struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
>  
> -		cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
> +		amdgpu_vcn_cancel_idle_work(&adev->vcn.inst[i]);
>  		if (vinst->cur_state != AMD_PG_STATE_GATE)
>  			vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
>  	}


  reply	other threads:[~2026-10-13  9:28 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13  8:24 [PATCH 1/9] drm/amdgpu: defer GPU recovery after userq eviction failure Prike Liang
2026-10-13  8:24 ` [PATCH 2/9] drm/amdgpu: skip VKMS mode-config helpers during GPU reset Prike Liang
2026-10-13  9:27   ` Christian König
2026-10-15  3:45     ` Liang, Prike
2026-10-15  8:32       ` Christian König
2026-10-13  8:24 ` [PATCH 3/9] drm/amdgpu: skip VMHUB fault handling while the device is inaccessible Prike Liang
2026-10-13  8:24 ` [PATCH 4/9] drm/amdgpu/userq: complete hung queue fences after successful removal Prike Liang
2026-10-13  8:24 ` [PATCH 5/9] drm/amdgpu: finish GPU recovery callbacks before restarting schedulers Prike Liang
2026-10-13  8:24 ` [PATCH 6/9] drm/amdgpu: serialize JPEG and VCN idle work with GPU reset Prike Liang
2026-10-13  9:28   ` Christian König [this message]
2026-10-13  8:24 ` [PATCH 7/9] drm/amdgpu/userq: take reset_domain->sem before userq_mutex in destroy Prike Liang
2026-10-13  9:30   ` Christian König
2026-10-15  6:38     ` Liang, Prike
2026-10-13  8:24 ` [PATCH 8/9] drm/amdgpu/userq: take reset_domain->sem before userq_mutex in create Prike Liang
2026-10-13  8:24 ` [PATCH 9/9] drm/amdgpu/mes: skip unmap queue notification during GPU reset Prike Liang
2026-10-13  9:26 ` [PATCH 1/9] drm/amdgpu: defer GPU recovery after userq eviction failure Christian König
2026-10-14  9:02   ` Liang, Prike
2026-10-14 10:56     ` Christian König

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