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dkim=none (message not signed) header.d=none;amd.com; dmarc=none action=none header.from=amd.com; Received: from BN6PR12MB1939.namprd12.prod.outlook.com (2603:10b6:404:107::12) by BN6PR1201MB0017.namprd12.prod.outlook.com (2603:10b6:405:53::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3632.18; Thu, 10 Dec 2020 17:50:16 +0000 Received: from BN6PR12MB1939.namprd12.prod.outlook.com ([fe80::f8f7:573f:9fae:e40c]) by BN6PR12MB1939.namprd12.prod.outlook.com ([fe80::f8f7:573f:9fae:e40c%11]) with mapi id 15.20.3632.021; Thu, 10 Dec 2020 17:50:15 +0000 Message-ID: Subject: Re: [PATCH 3/3] drm/amd/display: Skip modeset for front porch change From: Aurabindo Pillai To: Shashank Sharma , amd-gfx@lists.freedesktop.org Date: Thu, 10 Dec 2020 12:50:04 -0500 In-Reply-To: <9cc10157-d533-95fd-0f20-8bbc2db75a79@amd.com> References: <20201210024526.1151447-1-aurabindo.pillai@amd.com> <20201210024526.1151447-4-aurabindo.pillai@amd.com> <9cc10157-d533-95fd-0f20-8bbc2db75a79@amd.com> User-Agent: Evolution 3.36.4-0ubuntu1 X-Originating-IP: [165.204.84.11] X-ClientProxiedBy: BL1PR13CA0424.namprd13.prod.outlook.com (2603:10b6:208:2c3::9) To BN6PR12MB1939.namprd12.prod.outlook.com (2603:10b6:404:107::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [172.31.4.195] (165.204.84.11) by BL1PR13CA0424.namprd13.prod.outlook.com (2603:10b6:208:2c3::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.10 via Frontend Transport; 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boundary="===============0952427456==" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" --===============0952427456== Content-Type: multipart/signed; micalg="pgp-sha256"; protocol="application/pgp-signature"; boundary="=-tBFn2fwC3ss4rkV3BjGe" --=-tBFn2fwC3ss4rkV3BjGe Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2020-12-10 at 18:29 +0530, Shashank Sharma wrote: > On 10/12/20 8:15 am, Aurabindo Pillai wrote: > > [Why&How] > > Inorder to enable freesync video mode, driver adds extra > > modes based on preferred modes for common freesync frame rates. > > When commiting these mode changes, a full modeset is not needed. > > If the change in only in the front porch timing value, skip full > > modeset and continue using the same stream. > >=20 > > Signed-off-by: Aurabindo Pillai < > > aurabindo.pillai@amd.com > > > > > --- > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 169 > > ++++++++++++++++-- > > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + > > 2 files changed, 153 insertions(+), 17 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > index f699a3d41cad..c8c72887906a 100644 > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > > @@ -217,6 +217,9 @@ static bool amdgpu_dm_psr_disable_all(struct > > amdgpu_display_manager *dm); > > static const struct drm_format_info * > > amd_get_format_info(const struct drm_mode_fb_cmd2 *cmd); > > =20 > > +static bool > > +is_timing_unchanged_for_freesync(struct drm_crtc_state > > *old_crtc_state, > > + struct drm_crtc_state > > *new_crtc_state); > > /* > > * dm_vblank_get_counter > > * > > @@ -5096,8 +5099,11 @@ copy_crtc_timing_for_drm_display_mode(const > > struct drm_display_mode *src_mode, > > static void > > decide_crtc_timing_for_drm_display_mode(struct drm_display_mode > > *drm_mode, > > const struct drm_display_mode > > *native_mode, > > - bool scale_enabled) > > + bool scale_enabled, bool > > fs_mode) > > { > > + if (fs_mode) > > + return; >=20 > so we are adding an input flag just so that we can return from the > function at top ? How about adding this check at the caller without > changing the function parameters ? Will fix this. > > + > > if (scale_enabled) { > > copy_crtc_timing_for_drm_display_mode(native_mode, > > drm_mode); > > } else if (native_mode->clock =3D=3D drm_mode->clock && > > @@ -5241,6 +5247,24 @@ get_highest_freesync_mode(struct > > amdgpu_dm_connector *aconnector, > > return m_high; > > } > > =20 > > +static bool is_freesync_video_mode(struct drm_display_mode *mode, > > + struct amdgpu_dm_connector > > *aconnector) > > +{ > > + struct drm_display_mode *high_mode; > > + >=20 > I thought we were adding a string "_FSV" in the end for the mode- > >name, why can't we check that instead of going through the whole > list of modes again ? Actually I only added _FSV to distinguish the newly added modes easily. On second thoughts, I'm not sure if there are any userspace applications that might depend on parsing the mode name, for maybe to print the resolution. I think its better not to break any such assumptions if they do exist by any chance. I think I'll just remove _FSV from the mode name. We already set DRM_MODE_TYPE_DRIVER for userspace to recognize these additional modes, so it shouldnt be a problem. > > + high_mode =3D get_highest_freesync_mode(aconnector, false); > > + if (!high_mode) > > + return false; > > + > > + if (high_mode->clock =3D=3D 0 || > > + high_mode->hdisplay !=3D mode->hdisplay || > > + high_mode->clock !=3D mode->clock || > > + !mode) > > + return false; > > + else > > + return true; > > +} > > + > > static struct dc_stream_state * > > create_stream_for_sink(struct amdgpu_dm_connector *aconnector, > > const struct drm_display_mode *drm_mode, > > @@ -5253,17 +5277,21 @@ create_stream_for_sink(struct > > amdgpu_dm_connector *aconnector, > > const struct drm_connector_state *con_state =3D > > dm_state ? &dm_state->base : NULL; > > struct dc_stream_state *stream =3D NULL; > > - struct drm_display_mode mode =3D *drm_mode; > > + struct drm_display_mode saved_mode, mode =3D *drm_mode; >=20 > How about shifting this definition to new line to follow the existing > convention ? Sure. > > + struct drm_display_mode *freesync_mode =3D NULL; > > bool native_mode_found =3D false; > > bool scale =3D dm_state ? (dm_state->scaling !=3D RMX_OFF) : false; > > int mode_refresh; > > int preferred_refresh =3D 0; > > + bool is_fs_vid_mode =3D 0; > > #if defined(CONFIG_DRM_AMD_DC_DCN) > > struct dsc_dec_dpcd_caps dsc_caps; > > #endif > > uint32_t link_bandwidth_kbps; > > - > > struct dc_sink *sink =3D NULL; > > + > > + memset(&saved_mode, 0, sizeof(struct drm_display_mode)); > > + > > if (aconnector =3D=3D NULL) { > > DRM_ERROR("aconnector is NULL!\n"); > > return stream; > > @@ -5316,20 +5344,33 @@ create_stream_for_sink(struct > > amdgpu_dm_connector *aconnector, > > */ > > DRM_DEBUG_DRIVER("No preferred mode found\n"); > > } else { > > + is_fs_vid_mode =3D is_freesync_video_mode(&mode, > > aconnector); > > + if (is_fs_vid_mode) { > > + freesync_mode =3D > > get_highest_freesync_mode(aconnector, false); > > + if (freesync_mode) { >=20 > As the freesync modes are being added by the driver, and we have > passed one check which says is_fs_vid_mode, will it ever be the case > where freesync_mode =3D=3D NULL ? Ideally we should get atleast one mode > equal to this isn't it ? in that case we can drop one if () check. Yes, thanks for catching this. Will fix. -- Regards, Aurabindo Pillai --=-tBFn2fwC3ss4rkV3BjGe Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQGzBAABCAAdFiEEjxfKIKECTdteDMVnC/mGJHAirekFAl/SX8wACgkQC/mGJHAi renUMgwAxeKuFQ+oRsgjQXP/pmJYDSGIqq3rU+g3X7Mb+LmdSxoSLwA0XX7v4KvZ RMX47e2knSVgwOyPVbfhtFuCTdjlgGKZlHry94lWzxqIM8Slbr+CGAU9OZCkSeKf ViXYE3MGLwj8PbTuE0YmzAbKmFS/YtrvbdukPB3uO+7Snht2adc89oaKNNYacTK5 ndAGBkfzssckA5KySynIyScWcQGiL8GaAPp7mxb2dvrmT4HvBU19OGhdp2TUy6Sf 5JYJeMkOCTHhg2USDGxzClAPzX0c8nYIHYXnHmGdr/q4lryhfND/gaOAwcODpYF6 iG2VbJY2qHhDnxXpnvPgHVOVdFDkDSRkQWeZ09VhqVsR/A6mQXZ0glkN+U9solJS FkJwpuYAb/xb4HWmTAPYQRuZLTUu/6uRT/AkCGZMLO6o4Hylh4aifpR38Sop+Ij8 9+1mfKGFjT4/++Ldd2TvTrs/yFaM1pGa9+nSPfsHSrkV/KoNJ4DIjLyZReZNTu4j 6KGflQTq =3B+8 -----END PGP SIGNATURE----- --=-tBFn2fwC3ss4rkV3BjGe-- --===============0952427456== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx --===============0952427456==--