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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9a3b83sm16328676f8f.33.2025.03.26.01.08.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Mar 2025 01:08:33 -0700 (PDT) Message-ID: Date: Wed, 26 Mar 2025 09:08:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] Documentation/gpu: Add new acronyms To: Rodrigo Siqueira , Alex Deucher , =?UTF-8?B?J0NocmlzdGlhbiBLw7ZuaWcn?= , Mario Limonciello , Melissa Wen , =?UTF-8?Q?=27Andr=C3=A9_Almeida=27?= , =?UTF-8?Q?=27Timur_Krist=C3=B3f=27?= Cc: amd-gfx@lists.freedesktop.org, linux-doc@vger.kernel.org, kernel-dev@igalia.com References: <20250325172623.225901-1-siqueira@igalia.com> <20250325172623.225901-2-siqueira@igalia.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20250325172623.225901-2-siqueira@igalia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 25.03.25 um 18:18 schrieb Rodrigo Siqueira: > This commit introduces some new acronyms extracted from the source code > and found on some web pages around the internet (most of them came from > ArchLinux, Gentoo, and Wikipedia links). > > Signed-off-by: Rodrigo Siqueira Reviewed-by: Christian König > --- > Documentation/gpu/amdgpu/amdgpu-glossary.rst | 36 ++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > index 1e9283e076ba..080c3f2250d1 100644 > --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > @@ -12,15 +12,27 @@ we have a dedicated glossary for Display Core at > The number of CUs that are active on the system. The number of active > CUs may be less than SE * SH * CU depending on the board configuration. > > + BACO > + Bus Alive, Chip Off > + > + BOCO > + Bus Off, Chip Off > + > CE > Constant Engine > > + CIK > + Sea Islands > + > CP > Command Processor > > CPLIB > Content Protection Library > > + CS > + Command Submission > + > CU > Compute Unit > > @@ -33,6 +45,9 @@ we have a dedicated glossary for Display Core at > EOP > End Of Pipe/Pipeline > > + FLR > + Function Level Reset > + > GART > Graphics Address Remapping Table. This is the name we use for the GPUVM > page table used by the GPU kernel driver. It remaps system resources > @@ -80,6 +95,9 @@ we have a dedicated glossary for Display Core at > KCQ > Kernel Compute Queue > > + KFD > + Kernel Fusion Driver > + > KGQ > Kernel Graphics Queue > > @@ -89,6 +107,9 @@ we have a dedicated glossary for Display Core at > MC > Memory Controller > > + MCBP > + Mid Command Buffer Preemption > + > ME > MicroEngine (Graphics) > > @@ -125,9 +146,15 @@ we have a dedicated glossary for Display Core at > SE > Shader Engine > > + SGPR > + Scalar General-Purpose Registers > + > SH > SHader array > > + SI > + Southern Islands > + > SMU/SMC > System Management Unit / System Management Controller > > @@ -146,6 +173,9 @@ we have a dedicated glossary for Display Core at > TA > Trusted Application > > + TC > + Texture Cache > + > TOC > Table of Contents > > @@ -158,5 +188,11 @@ we have a dedicated glossary for Display Core at > VCN > Video Codec Next > > + VGPR > + Vector General-Purpose Registers > + > + VMID > + Virtual Memory ID > + > VPE > Video Processing Engine