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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id a8-20020a056000100800b003197efd1e7bsm4010346wrx.114.2023.09.22.03.08.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 22 Sep 2023 03:08:16 -0700 (PDT) Message-ID: Date: Fri, 22 Sep 2023 12:08:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Content-Language: en-US To: Alex Deucher , amd-gfx@lists.freedesktop.org References: <20230921141300.415876-1-alexander.deucher@amd.com> <20230921141300.415876-2-alexander.deucher@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= In-Reply-To: <20230921141300.415876-2-alexander.deucher@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 21.09.23 um 16:12 schrieb Alex Deucher: > To disable AGP, the start needs to be set to a higher > value than the end. Set a default disable value for > the AGP aperture and allow the IP specific GMC code > to enable it selectively be calling amdgpu_gmc_agp_location(). > > Signed-off-by: Alex Deucher Reviewed-by: Christian König > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 27 +++++++++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 2 ++ > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++- > drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++- > drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 +-- > drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 +-- > drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 +-- > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++- > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- > 10 files changed, 37 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > index c7793db6d098..d0653f5ba8a9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > @@ -315,14 +315,6 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) > const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1); > u64 size_af, size_bf; > > - if (amdgpu_sriov_vf(adev)) { > - mc->agp_start = 0xffffffffffff; > - mc->agp_end = 0x0; > - mc->agp_size = 0; > - > - return; > - } > - > if (mc->fb_start > mc->gart_start) { > size_bf = (mc->fb_start & sixteen_gb_mask) - > ALIGN(mc->gart_end + 1, sixteen_gb); > @@ -346,6 +338,25 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) > mc->agp_size >> 20, mc->agp_start, mc->agp_end); > } > > +/** > + * amdgpu_gmc_set_agp_default - Set the default AGP aperture value. > + * @adev: amdgpu device structure holding all necessary information > + * @mc: memory controller structure holding memory information > + * > + * To disable the AGP aperture, you need to set the start to a larger > + * value than the end. This function sets the default value which > + * can then be overridden using amdgpu_gmc_agp_location() if you want > + * to enable the AGP aperture on a specific chip. > + * > + */ > +void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev, > + struct amdgpu_gmc *mc) > +{ > + mc->agp_start = 0xffffffffffff; > + mc->agp_end = 0; > + mc->agp_size = 0; > +} > + > /** > * amdgpu_gmc_fault_key - get hask key from vm fault address and pasid > * > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h > index fdc25cd559b6..49a28379fc79 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h > @@ -392,6 +392,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, > struct amdgpu_gmc *mc); > void amdgpu_gmc_agp_location(struct amdgpu_device *adev, > struct amdgpu_gmc *mc); > +void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev, > + struct amdgpu_gmc *mc); > bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, > struct amdgpu_ih_ring *ih, uint64_t addr, > uint16_t pasid, uint64_t timestamp); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index cef920a93924..0dcb6c36b02c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -1062,6 +1062,9 @@ static const char * const amdgpu_vram_names[] = { > */ > int amdgpu_bo_init(struct amdgpu_device *adev) > { > + /* set the default AGP aperture state */ > + amdgpu_gmc_set_agp_default(adev, &adev->gmc); > + > /* On A+A platform, VRAM can be mapped as WB */ > if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) { > /* reserve PAT memory space to WC for VRAM */ > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c > index e582073b57c8..e6f76cd19c94 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c > @@ -780,7 +780,8 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev, > > amdgpu_gmc_vram_location(adev, &adev->gmc, base); > amdgpu_gmc_gart_location(adev, mc); > - amdgpu_gmc_agp_location(adev, mc); > + if (!amdgpu_sriov_vf(adev)) > + amdgpu_gmc_agp_location(adev, mc); > > /* base offset of vram pages */ > adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev); > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c > index 69f65e9c4f93..0bd7de1488f2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c > @@ -689,7 +689,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev, > > amdgpu_gmc_vram_location(adev, &adev->gmc, base); > amdgpu_gmc_gart_location(adev, mc); > - amdgpu_gmc_agp_location(adev, mc); > + if (!amdgpu_sriov_vf(adev)) > + amdgpu_gmc_agp_location(adev, mc); > > /* base offset of vram pages */ > if (amdgpu_sriov_vf(adev)) > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > index 07579fa26fa3..3f31f268e0eb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c > @@ -253,8 +253,8 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev) > WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, > adev->mem_scratch.gpu_addr >> 12); > WREG32(mmMC_VM_AGP_BASE, 0); > - WREG32(mmMC_VM_AGP_TOP, 0); > - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); > + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22); > + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22); > > if (gmc_v6_0_wait_for_idle((void *)adev)) > dev_warn(adev->dev, "Wait for MC idle timedout !\n"); > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > index e77e5593e1ab..e5e64366a814 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c > @@ -288,8 +288,8 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) > WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, > adev->mem_scratch.gpu_addr >> 12); > WREG32(mmMC_VM_AGP_BASE, 0); > - WREG32(mmMC_VM_AGP_TOP, 0); > - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); > + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22); > + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22); > if (gmc_v7_0_wait_for_idle((void *)adev)) > dev_warn(adev->dev, "Wait for MC idle timedout !\n"); > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > index 6acf649469dd..4be407bbb7c3 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c > @@ -473,8 +473,8 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) > } > > WREG32(mmMC_VM_AGP_BASE, 0); > - WREG32(mmMC_VM_AGP_TOP, 0); > - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); > + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22); > + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22); > if (gmc_v8_0_wait_for_idle((void *)adev)) > dev_warn(adev->dev, "Wait for MC idle timedout !\n"); > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index 2936a0fb7527..e5588408f4a5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -1696,7 +1696,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev, > } else { > amdgpu_gmc_vram_location(adev, mc, base); > amdgpu_gmc_gart_location(adev, mc); > - amdgpu_gmc_agp_location(adev, mc); > + if (!amdgpu_sriov_vf(adev)) > + amdgpu_gmc_agp_location(adev, mc); > } > /* base offset of vram pages */ > adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev); > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 2e4a8bdbf50e..c2cb4b4cd2d7 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -1255,7 +1255,7 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_ > agp_top = adev->gmc.agp_end >> 24; > > /* AGP aperture is disabled */ > - if (agp_bot == agp_top) { > + if (agp_bot > agp_top) { > logical_addr_low = adev->gmc.fb_start >> 18; > if (adev->apu_flags & AMD_APU_IS_RAVEN2) > /*