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[2403:580a:80ed:0:4835:5a07:49e7:f115]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71ec132ffb8sm4082732b3a.50.2024.10.22.00.14.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 00:14:11 -0700 (PDT) From: James Calligeros To: Rob Herring , Mark Brown , Neal Gompa Cc: Martin =?UTF-8?B?UG92acWhZXI=?= , David Rhodes , Richard Fitzgerald , Liam Girdwood , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , asahi@lists.linux.dev, linux-sound@vger.kernel.org, patches@opensource.cirrus.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hector Martin Subject: Re: [PATCH v2 1/3] dt-bindings: sound: Add CS42L84 codec Date: Tue, 22 Oct 2024 17:14:03 +1000 Message-ID: <10547772.nUPlyArG6x@setsuna> In-Reply-To: References: <20241020-cs42l84-v2-0-37ba2b6721d9@gmail.com> <20241021192632.GA965116-robh@kernel.org> Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hi all, On Mon, Oct 21, 2024 at 02:26:32PM -0500, Rob Herring wrote: > On Sun, Oct 20, 2024 at 12:47:31AM +1000, James Calligeros wrote: > > CS42L84 is a headphone jack codec made by Cirrus Logic and seen in Apple > > computer models starting with 2021 Macbook Pros. It is not a publicly > > documented part. To a degree the part is similar to the public CS42L42. > > (The L84 superseded L83 seen in earlier Apple models, and the L83 was > > pretty much the same as L42.) >=20 > Why can't this be added to > Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml? >=20 > I guess perhaps you don't know what the supplies look like? Do any of > the custom properties apply? I suppose the original thinking around creating a new binding was simply ne= w=20 driver, new chip, new binding. We also don't describe the power supply of t= he=20 chip at all, as this is all handled by lower level firmware. Some of the custom properties (e.g. tip sense debounce) should technically= =20 work if we teach the driver how to set them at probe time, however given th= at=20 the chip is almost certainly never going to be used outside of the Apple=20 Silicon context we went with static values that were first observed under m= acOS=20 and then optimised once we had enough of a working stack to play around in= =20 Linux. The values that go into the registers for each property appear to be= =20 identical to CS42L42, so it should be possible to implement at least some o= f=20 these properties if that is what is preferred. On Tuesday 22 October 2024 8:15:50=E2=80=AFAM AEST Mark Brown wrote: > I don't know if the Cirrus people who are listed as maintainers of that > binding might have concerns about doing things that acknowledge this > particular part. I suspect, based on the past behaviour of Apple vendors including Cirrus=20 themselves, that they either won't or can't publicly acknowledge the existe= nce=20 of this chip. Given this, and the fact that the chip will almost certainly= =20 never be used on any other platform, it is probably better for everyone=20 involved if we cut them out of the loop. Regards, James