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AJvYcCVqV48ZUbASM+zWs5li1sXKdwnlscHuyTCpiH9dQQZLu7VeoCbKcXdy795E5QuAA7L8P2V8rA==@lists.linux.dev X-Gm-Message-State: AOJu0YzhiM2YjF30kk89hBaC+NqU4jyazrzBt0Vprk5Ycfnpi3Yu+yUx 8FKETfcNb0zVmeIy4k51VB6P4MMdfd/w3ehgY+Nunmy2VdHpfjkw X-Google-Smtp-Source: AGHT+IHB47DfkPIG6EABi7c3A4sZkbbs5h6c9kgYfhjhgGCwt12i673zqIXuCwiVGpye+ETlK7eIXQ== X-Received: by 2002:a05:6a00:3e0f:b0:71d:f012:6de7 with SMTP id d2e1a72fcca58-71df0127189mr10460413b3a.27.1728284921533; Mon, 07 Oct 2024 00:08:41 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-71df0ccd1a3sm3764147b3a.66.2024.10.07.00.08.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Oct 2024 00:08:41 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: Nick Chan , Krzysztof Kozlowski Subject: [PATCH v6 01/20] dt-bindings: arm: cpus: Add Apple A7-A11 CPU cores Date: Mon, 7 Oct 2024 15:05:26 +0800 Message-ID: <20241007070758.9961-2-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241007070758.9961-1-towinchenmi@gmail.com> References: <20241007070758.9961-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the following CPU cores: - apple,cyclone: A7 cores - apple,typhoon: A8 cores - apple,twister: A9 cores - apple,hurricane-zephyr: A10 logical cores - apple,monsoon: A11 performance cores - apple,mistral: A11 efficiency cores In the Apple A10, there are physical performance-efficiency cores that forms logical cores to software depending on the current p-state, and only one type of core may be active at one time. Acked-by: Krzysztof Kozlowski Signed-off-by: Nick Chan --- Documentation/devicetree/bindings/arm/cpus.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index e41a8aec6066..3035985f275e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -87,8 +87,14 @@ properties: enum: - apple,avalanche - apple,blizzard - - apple,icestorm + - apple,cyclone - apple,firestorm + - apple,hurricane-zephyr + - apple,icestorm + - apple,mistral + - apple,monsoon + - apple,twister + - apple,typhoon - arm,arm710t - arm,arm720t - arm,arm740t -- 2.46.2