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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?AQD8lHf0TnnoxfzihS7WsHeL0vRGr/Rmgt16eLkCAQl8MLxOP5cJ/wDheUXj?= =?us-ascii?Q?L6elLlLVghlP3gFMqXfXBbUIRFKeYFt6pVT9sO+u1WIFTaI2yiX6qkRNozPd?= =?us-ascii?Q?sEG9ZLvLkXqySPDb+EIJx6Qq4yEMD10i6HFh0WQ9Kc5RMP+FLIMNG4lFad2y?= =?us-ascii?Q?Xtl7BAjw9snL3OFqG7SKtwK0dP0unP2uZff1RFyjNxUnfSEOD6Oqkl7T7IZH?= =?us-ascii?Q?PpNkGTEdqeBUTM/x1HJlETj4u7FeZ1o7axCUlQnr9G5k5VxLClvjKN+2hz30?= =?us-ascii?Q?eRVd5HTIJiA3YdVpATP+bvOsx9jQ0DrcQX74iDP6lKC53QeH/IT8PrXciuiv?= =?us-ascii?Q?BgYpoELIKAVfnEuy0LQRkacRGGNha74tRgr7KOs43bxhV4spU0FIN0L92nRW?= =?us-ascii?Q?m06AZV7GV+Xt7+Mzf3q31AKbAbxr1wO53ghehWEl40Oomk2rqWhjF56zgnr1?= =?us-ascii?Q?rvbKOTKO+SaKtK9/m0SbObUvN+mP7IgJ1zpk4HFO1hcP4T4o5IzYlgNDcVvR?= =?us-ascii?Q?esHOpe13/r3N3sgcQqUEOaxnMA74ii52KXYQWjitd3nXmU9m4K8OtC+mrtO6?= =?us-ascii?Q?wcP6cKoWmCeTnRqf2yh9zsqBjUWFOu0HiHJ7k2QJjIHyC5/h7t4GJgdI8UA2?= =?us-ascii?Q?5IOIIoIBVFvJpTe4YZT/gAs0EiU+kdTWth2eYY3bxzMlZsfZ0NJTuG2TTK/a?= =?us-ascii?Q?YmFSMT+Etfl8uEClX2IV/vGiq0uX0l0JcyThF4WojLWhHStOqLoC6jxOv14N?= =?us-ascii?Q?d44xUI/0nRYK3pzEHuJxhmf+FXEjxyCEJFcfBCExfdf3VAK/rYOjEMafQ1RC?= =?us-ascii?Q?TMB5OtXQlI/+DJstPezs76bbxIKAclQ4oaV3tnKiF/TJlvFG9Pfp74rf3RR0?= =?us-ascii?Q?XIoN5VKBwcQWlrei62/qGgj/032nBbTzfRXf0Mrf/uvotA7oPfgeijPcOhqP?= =?us-ascii?Q?4Y/4MpLRiYmRHhkJ4YnQH9kkZj0fadoa2fiVM36KqDl/Gs3M8zLNHbdgmooc?= =?us-ascii?Q?KoCOu4MLndQ5mvmlT7NjPRvEaPGRCmkDt9ZA/P0BZT4ypdw3AI/Gf+3kOO+e?= =?us-ascii?Q?B9CPnmciTMEsXtY7spqkW8Vbhhhw2fotSdf2oAXQQvQk8shZ9+fgrFezTwWx?= =?us-ascii?Q?1DPB0kRWY2uj2PyjyhVYrIqJLYhIT1MntVmLdNryXdr4tVISKAOd21uzZ6TO?= =?us-ascii?Q?WttHzvh5IDAp74XR3j/4ZpKR6bUzvXEtav0laPYGa+mtySb9jCDPqEMjoGHv?= =?us-ascii?Q?FgY+UBQZAog/geH4wxKjJIv//MrdB/zL295+dhT4xuXAD8VahJ68prBPBjSk?= =?us-ascii?Q?8J1R6wLdzyfltqCLTIMYVne1stL+7d+HZJnpuEldvve85Xqn2Y9d/9goTYl+?= =?us-ascii?Q?VHLob6r68zfBwoafN+DdRxRe7VIBa4YMPXEd+iE4u7qlCC/+5wzIA+ltj2E6?= =?us-ascii?Q?1yRFURYjcxgQcHY0aw+gyjsswvScXhnciqZ9Me6SMdLO33FGmkeypPrSNXFh?= =?us-ascii?Q?7m5dMugwp5sqMYHqyZ2rPTwh8PPk6EKKN+sSIxeX/HKtVQmheD8EkfYLfIjJ?= =?us-ascii?Q?Fwu7y2/Q+2//jyiZtzo=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7bbbb457-cdd8-4c81-b56f-08dd45ff9585 X-MS-Exchange-CrossTenant-AuthSource: CH3PR12MB8659.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2025 16:10:18.5860 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 21qidtMarIgWnp8EBfNVOnl1yMidhRr3LOm7t0HU5YM6P0QHT8RYxsqhkuJHf9jK X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5803 On Wed, Feb 05, 2025 at 03:47:03PM +0000, Robin Murphy wrote: > On 2025-02-04 6:34 pm, Jason Gunthorpe wrote: > > Convert most of the places calling get_order() as an argument to the > > iommu-pages allocator into order_base_2() or the _sz flavour > > instead. These places already have an exact size, there is no particular > > reason to use order here. > > > > Signed-off-by: Jason Gunthorpe > > --- > [...] > > @@ -826,7 +825,7 @@ void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu, gfp_t gfp, > > size_t size) > > { > > int order = get_order(size); > > - void *buf = iommu_alloc_pages(gfp, order); > > + void *buf = iommu_alloc_pages_lg2(gfp, order + PAGE_SHIFT); > > This is a size, really - it's right there above. I didn't want to make major surgery to this thing, but yes it could be: void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu, gfp_t gfp, size_t size) { void *buf; size = PAGE_ALIGN(size); buf = iommu_alloc_pages_sz(gfp, size); if (buf && check_feature(FEATURE_SNP) && set_memory_4k((unsigned long)buf, size / PAGE_SIZE )) { iommu_free_page(buf); buf = NULL; } return buf; } > (although alloc_cwwb_sem() passing 1 looks highly suspicious - judging by > other cmd_sem references that probably should be PAGE_SIZE...) Indeed, amd folks? > > if (buf && > > check_feature(FEATURE_SNP) && > [...] > > @@ -1702,8 +1701,10 @@ int dmar_enable_qi(struct intel_iommu *iommu) > > * Need two pages to accommodate 256 descriptors of 256 bits each > > * if the remapping hardware supports scalable mode translation. > > */ > > - order = ecap_smts(iommu->ecap) ? 1 : 0; > > - desc = iommu_alloc_pages_node(iommu->node, GFP_ATOMIC, order); > > + desc = iommu_alloc_pages_node_lg2(iommu->node, GFP_ATOMIC, > > + ecap_smts(iommu->ecap) ? > > + order_base_2(SZ_8K) : > > + order_base_2(SZ_4K)); > > These are also clearly sizes. I didn't make a size wrapper version of the _node_ variation because there are only three callers. > I don't see any need to have the log2 stuff at all, I think we just > switch iommu_alloc_pages{_node}() to take a size and keep things > simple. Ok it is easy to remove lg2 calls from the drivers, but I would keep the internal function like this because most of the size callers have constants and the order_base_2() will become a constexpr when inlined. Only a few places are not like that. Thanks, Jason