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[2403:580a:80ed:0:4835:5a07:49e7:f115]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-aee7de19cdasm1074217a12.24.2025.02.27.04.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:10:33 -0800 (PST) From: James Calligeros Date: Thu, 27 Feb 2025 22:07:40 +1000 Subject: [PATCH v3 13/20] ASoC: tas2764: expose die temp to hwmon Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20250227-apple-codec-changes-v3-13-cbb130030acf@gmail.com> References: <20250227-apple-codec-changes-v3-0-cbb130030acf@gmail.com> In-Reply-To: <20250227-apple-codec-changes-v3-0-cbb130030acf@gmail.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Shenghao Ding , Kevin Lu , Baojun Xu , Dan Murphy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shi Fu , Jean Delvare , Guenter Roeck Cc: Alyssa Rosenzweig , =?utf-8?q?Martin_Povi=C5=A1er?= , Hector Martin , linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, asahi@lists.linux.dev, linux-hwmon@vger.kernel.org, James Calligeros X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4898; i=jcalligeros99@gmail.com; h=from:subject:message-id; bh=qHvfUmN1R+D3X/0kel7hIGI1UTjzGT/2lxJjDvieRlA=; b=owGbwMvMwCV2xczoYuD3ygTG02pJDOkHQk8t2cbyPE5qxrTuhu0bDHv+flROcNqiGCwtyXVX8 vcpg6VOHaUsDGJcDLJiiiwbmoQ8Zhux3ewXqdwLM4eVCWQIAxenAEzE2YWR4VPsljXee0+eOSMz 7dC+hZt2O62QK9H/d5ZlTe6KmRLrONcx/OEQcu2cw3HA8UKfckT5vej5oT6TEyMZ7nlsXPXnasu yci4A X-Developer-Key: i=jcalligeros99@gmail.com; a=openpgp; fpr=B08212489B3206D98F1479BDD43632D151F77960 TAS2764 contains an ADC that reports the chip's die temperature. The temperature in degrees Celsius is yielded by subtracting 93 from the raw value reported by the ADC. Expose the codec die temperature to the hwmon interface. The chip will initialise the temperature register to 2.6 *C to avoid triggering over temp protection. As the ADC is powered down during software shutdown, this value will persist until the chip is fully powered up (e.g. when the PCM it's attached to is opened). When the chip is powered back down, the last value sampled will persist in the register. Co-developed-by: Martin Povišer Signed-off-by: Martin Povišer Signed-off-by: James Calligeros --- sound/soc/codecs/tas2764.c | 96 +++++++++++++++++++++++++ sound/soc/codecs/tas2764.h | 3 + 2 files changed, 99 insertions(+) diff --git a/sound/soc/codecs/tas2764.c b/sound/soc/codecs/tas2764.c index 0234a41deecd62e860c9d54a7a3206abc0bdac54..b42bd5a50ee566ee83755d4ed7e2071b60951457 100644 --- a/sound/soc/codecs/tas2764.c +++ b/sound/soc/codecs/tas2764.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -578,6 +579,87 @@ static int tas2764_apply_init_quirks(struct tas2764_priv *tas2764) return 0; } +static int tas2764_read_die_temp(struct tas2764_priv *tas2764, long *result) +{ + int ret; + + /* + * component could be uninitialised if the codec is not + * attached to a machine driver + */ + if (!tas2764->component) + return -EINVAL; + + ret = snd_soc_component_read(tas2764->component, TAS2764_TEMP); + if (ret < 0) + return ret; + /* + * As per datasheet, subtract 93 from raw value to get degrees + * Celsius. hwmon wants millidegrees. + * + * NOTE: The chip will initialise the TAS2764_TEMP register to + * 2.6 *C to avoid triggering temperature protection. Since the + * ADC is powered down during software shutdown, this value will + * persist until the chip is fully powered up (e.g. the PCM it's + * attached to is opened). The ADC will power down again when + * the chip is put back into software shutdown, with the last + * value sampled persisting in the ADC's register. + */ + *result = (ret - 93) * 1000; + return 0; +} + +static umode_t tas2764_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, u32 attr, + int channel) +{ + if (type != hwmon_temp) + return 0; + + switch (attr) { + case hwmon_temp_input: + return 0444; + default: + break; + } + + return 0; +} + +static int tas2764_hwmon_read(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct tas2764_priv *tas2764 = dev_get_drvdata(dev); + int ret; + + switch (attr) { + case hwmon_temp_input: + ret = tas2764_read_die_temp(tas2764, val); + break; + default: + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +static const struct hwmon_channel_info *const tas2764_hwmon_info[] = { + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), + NULL +}; + +static const struct hwmon_ops tas2764_hwmon_ops = { + .is_visible = tas2764_hwmon_is_visible, + .read = tas2764_hwmon_read, +}; + +static const struct hwmon_chip_info tas2764_hwmon_chip_info = { + .ops = &tas2764_hwmon_ops, + .info = tas2764_hwmon_info, +}; + static int tas2764_codec_probe(struct snd_soc_component *component) { struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component); @@ -848,6 +930,20 @@ static int tas2764_i2c_probe(struct i2c_client *client) } } + if (IS_REACHABLE(CONFIG_HWMON)) { + struct device *hwmon; + + hwmon = devm_hwmon_device_register_with_info(&client->dev, "tas2764", + tas2764, + &tas2764_hwmon_chip_info, + NULL); + if (IS_ERR(hwmon)) { + return dev_err_probe(&client->dev, PTR_ERR(hwmon), + "Failed to register temp sensor\n"); + } + } + + return devm_snd_soc_register_component(tas2764->dev, &soc_component_driver_tas2764, tas2764_dai_driver, diff --git a/sound/soc/codecs/tas2764.h b/sound/soc/codecs/tas2764.h index 4cf0f7f112d6c3002203fa32e900efd640ef3f22..4a419c11d4b08eebb915762db00af5c06ff3dd42 100644 --- a/sound/soc/codecs/tas2764.h +++ b/sound/soc/codecs/tas2764.h @@ -117,6 +117,9 @@ #define TAS2764_INT_LTCH3 TAS2764_REG(0x0, 0x50) #define TAS2764_INT_LTCH4 TAS2764_REG(0x0, 0x51) +/* Readout Registers */ +#define TAS2764_TEMP TAS2764_REG(0x0, 0x56) + /* Clock/IRQ Settings */ #define TAS2764_INT_CLK_CFG TAS2764_REG(0x0, 0x5c) #define TAS2764_INT_CLK_CFG_IRQZ_CLR BIT(2) -- 2.48.1