[PATCH 0/2] Extend nvmem patternProperties and then fix W=1 warnings in Apple dts

[PATCH 0/2] Extend nvmem patternProperties and then fix W=1 warnings in Apple dts

[Sven Peter]

Hi,

This brief series fixes a W=1 warning recently introduced with the Apple
Silicon PMIC NVMEM nodes. We have cells that are the same bytes but a
different bit offset and these currently result in the same node name.
The legcy layout already allows to specify the bit offset in the name as
a suffix but this isn't possible in the new fixed-layout.
Thus first adjust the fixed-layout cell patternProperties to the same pattern
as the legacy one and then fix the node names in our device tree files.

Best,

Sven

Signed-off-by: Sven Peter <sven@kernel.org>
---
Sven Peter (2):
      dt-bindings: nvmem: fixed-layout: Allow optional bit positions
      arm64: dts: apple: Add bit offset to PMIC NVMEM node names

 Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml | 2 +-
 arch/arm64/boot/dts/apple/t600x-die0.dtsi                         | 6 +++---
 arch/arm64/boot/dts/apple/t8103.dtsi                              | 6 +++---
 arch/arm64/boot/dts/apple/t8112.dtsi                              | 6 +++---
 4 files changed, 10 insertions(+), 10 deletions(-)
---
base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494
change-id: 20250523-nvmem-bit-pattern-1dbc39fe4681

Best regards,
-- 
Sven Peter <sven@kernel.org>

[PATCH 1/2] dt-bindings: nvmem: fixed-layout: Allow optional bit positions

[Sven Peter]

NVMEM nodes can optionally include the bits property to specify the bit
position of the cell within a byte.
Extend patternProperties to allow adding the bit offset to the node
address to be able to distinguish nodes with the same address but
different bit positions, e.g.

   trim@54,4 {
        reg = <0x54 1>;
        bits = <4 2>;
    };
    trim@54,0 {
        reg = <0x54 1>;
        bits = <0 4>;
    };

Before the conversion to NVMEM layouts in commit bd912c991d2e
("dt-bindings: nvmem: layouts: add fixed-layout") this extension was
originally added with commit 4b2545dd19ed ("dt-bindings: nvmem: Extend
patternProperties to optionally indicate bit position") to the now
deprecated layout.

Signed-off-by: Sven Peter <sven@kernel.org>
---
 Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml
index 9bd34bd5af30d83ae03d48b10f3b2c5be2ee9586..b01567f9928443fd0f6d4f252cf2632dbec0de9a 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml
@@ -27,7 +27,7 @@ properties:
     const: 1
 
 patternProperties:
-  "@[a-f0-9]+$":
+  "@[a-f0-9]+(,[0-7])?$":
     type: object
     $ref: fixed-cell.yaml
     unevaluatedProperties: false

-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: nvmem: fixed-layout: Allow optional bit positions

[Rob Herring (Arm)]

On Tue, 10 Jun 2025 17:17:34 +0000, Sven Peter wrote:
> NVMEM nodes can optionally include the bits property to specify the bit
> position of the cell within a byte.
> Extend patternProperties to allow adding the bit offset to the node
> address to be able to distinguish nodes with the same address but
> different bit positions, e.g.
> 
>    trim@54,4 {
>         reg = <0x54 1>;
>         bits = <4 2>;
>     };
>     trim@54,0 {
>         reg = <0x54 1>;
>         bits = <0 4>;
>     };
> 
> Before the conversion to NVMEM layouts in commit bd912c991d2e
> ("dt-bindings: nvmem: layouts: add fixed-layout") this extension was
> originally added with commit 4b2545dd19ed ("dt-bindings: nvmem: Extend
> patternProperties to optionally indicate bit position") to the now
> deprecated layout.
> 
> Signed-off-by: Sven Peter <sven@kernel.org>
> ---
>  Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH 2/2] arm64: dts: apple: Add bit offset to PMIC NVMEM node names

[Sven Peter]

Now that the dt-binding has been extended to allow indicating the bit
position the following warning about a duplicate unit address with W=1
can be fixed:

arch/arm64/boot/dts/apple/t8103.dtsi:764.46-767.8: Warning (unique_unit_address_if_enabled): /soc/spmi@23d0d9300/pmic@f/nvmem-layout/boot-error-count@9f02: duplicate unit-address (also used in node /soc/spmi@23d0d9300/pmic@f/nvmem-layout/panic-count@9f02)

Fixes: 14b7178a76e2 ("arm64: dts: apple: Add PMIC NVMEM")
Signed-off-by: Sven Peter <sven@kernel.org>
---
 arch/arm64/boot/dts/apple/t600x-die0.dtsi | 6 +++---
 arch/arm64/boot/dts/apple/t8103.dtsi      | 6 +++---
 arch/arm64/boot/dts/apple/t8112.dtsi      | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
index 110bc6719512e334e04b496fb157cb4368679957..17ad9328baa14de66ff0f0fdf9e26b3f4a80524a 100644
--- a/arch/arm64/boot/dts/apple/t600x-die0.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
@@ -72,12 +72,12 @@ boot_stage: boot-stage@6001 {
 					reg = <0x6001 0x1>;
 				};
 
-				boot_error_count: boot-error-count@6002 {
+				boot_error_count: boot-error-count@6002,0 {
 					reg = <0x6002 0x1>;
 					bits = <0 4>;
 				};
 
-				panic_count: panic-count@6002 {
+				panic_count: panic-count@6002,4 {
 					reg = <0x6002 0x1>;
 					bits = <4 4>;
 				};
@@ -86,7 +86,7 @@ boot_error_stage: boot-error-stage@6003 {
 					reg = <0x6003 0x1>;
 				};
 
-				shutdown_flag: shutdown-flag@600f {
+				shutdown_flag: shutdown-flag@600f,3 {
 					reg = <0x600f 0x1>;
 					bits = <3 1>;
 				};
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 20faf0c0d80927b2e18dd966a61b5507b322c72f..76bab19f99c89d5c0a025fb313b53bac1f703bc9 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -761,12 +761,12 @@ boot_stage: boot-stage@9f01 {
 						reg = <0x9f01 0x1>;
 					};
 
-					boot_error_count: boot-error-count@9f02 {
+					boot_error_count: boot-error-count@9f02,0 {
 						reg = <0x9f02 0x1>;
 						bits = <0 4>;
 					};
 
-					panic_count: panic-count@9f02 {
+					panic_count: panic-count@9f02,4 {
 						reg = <0x9f02 0x1>;
 						bits = <4 4>;
 					};
@@ -775,7 +775,7 @@ boot_error_stage: boot-error-stage@9f03 {
 						reg = <0x9f03 0x1>;
 					};
 
-					shutdown_flag: shutdown-flag@9f0f {
+					shutdown_flag: shutdown-flag@9f0f,3 {
 						reg = <0x9f0f 0x1>;
 						bits = <3 1>;
 					};
diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi
index e95711d8337f6cea898e88a3d564caf2c4f94404..a27e2312b0c73d5352a80dd050c7b314786add4a 100644
--- a/arch/arm64/boot/dts/apple/t8112.dtsi
+++ b/arch/arm64/boot/dts/apple/t8112.dtsi
@@ -809,12 +809,12 @@ boot_stage: boot-stage@f701 {
 						reg = <0xf701 0x1>;
 					};
 
-					boot_error_count: boot-error-count@f702 {
+					boot_error_count: boot-error-count@f702,0 {
 						reg = <0xf702 0x1>;
 						bits = <0 4>;
 					};
 
-					panic_count: panic-count@f702 {
+					panic_count: panic-count@f702,4 {
 						reg = <0xf702 0x1>;
 						bits = <4 4>;
 					};
@@ -823,7 +823,7 @@ boot_error_stage: boot-error-stage@f703 {
 						reg = <0xf703 0x1>;
 					};
 
-					shutdown_flag: shutdown-flag@f70f {
+					shutdown_flag: shutdown-flag@f70f,3 {
 						reg = <0xf70f 0x1>;
 						bits = <3 1>;
 					};

-- 
2.34.1

Re: (subset) [PATCH 0/2] Extend nvmem patternProperties and then fix W=1 warnings in Apple dts

[Srinivas Kandagatla]

On Tue, 10 Jun 2025 17:17:33 +0000, Sven Peter wrote:
> This brief series fixes a W=1 warning recently introduced with the Apple
> Silicon PMIC NVMEM nodes. We have cells that are the same bytes but a
> different bit offset and these currently result in the same node name.
> The legcy layout already allows to specify the bit offset in the name as
> a suffix but this isn't possible in the new fixed-layout.
> Thus first adjust the fixed-layout cell patternProperties to the same pattern
> as the legacy one and then fix the node names in our device tree files.
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: nvmem: fixed-layout: Allow optional bit positions
      commit: 6aa656ce94693c8712c004045375e2221b157659

Best regards,
-- 
Srinivas Kandagatla <srini@kernel.org>

Re: (subset) [PATCH 0/2] Extend nvmem patternProperties and then fix W=1 warnings in Apple dts

[Sven Peter]

On Tue, 10 Jun 2025 17:17:33 +0000, Sven Peter wrote:
> This brief series fixes a W=1 warning recently introduced with the Apple
> Silicon PMIC NVMEM nodes. We have cells that are the same bytes but a
> different bit offset and these currently result in the same node name.
> The legcy layout already allows to specify the bit offset in the name as
> a suffix but this isn't possible in the new fixed-layout.
> Thus first adjust the fixed-layout cell patternProperties to the same pattern
> as the legacy one and then fix the node names in our device tree files.
> 
> [...]

Applied to git@github.com:AsahiLinux/linux.git (asahi-soc/for-next), thanks!

[2/2] arm64: dts: apple: Add bit offset to PMIC NVMEM node names
      https://github.com/AsahiLinux/linux/commit/a622259af9eb

Best regards,
-- 
Sven Peter <sven@kernel.org>