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From: Nick Chan <towinchenmi@gmail.com>
To: Kwanghoon Son <k.son@samsung.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-serial@vger.kernel.org
Cc: asahi@lists.linux.dev
Subject: Re: [PATCH v4 3/3] tty: serial: samsung: Fix serial rx on Apple A7-A9
Date: Tue, 10 Sep 2024 10:59:54 +0800	[thread overview]
Message-ID: <866d51a6-1eae-4dc6-8298-df2d608d2507@gmail.com> (raw)
In-Reply-To: <36a7a634b001bf23ef41daa1b8d7644c6aab133f.camel@samsung.com>



On 10/9/2024 09:59, Kwanghoon Son wrote:
> On Mon, 2024-09-09 at 17:51 +0800, Nick Chan wrote:
>>
>> On 9/9/2024 17:43, Kwanghoon Son wrote:
>>> On Mon, 2024-09-09 at 16:37 +0800, Nick Chan wrote:
>>>> Apple's older A7-A9 SoCs seems to use bit 3 in UTRSTAT as RXTO, which is
>>>> enabled by bit 11 in UCON.
>>>>
>>>> Access these bits in addition to the original RXTO and RXTO enable bits,
>>>> to allow serial rx to function on A7-A9 SoCs. This change does not
>>>> appear to affect the A10 SoC and up.
>>>>
>>>> Signed-off-by: Nick Chan <towinchenmi@gmail.com>
>>>>
>>>
>>> [snip]
>>>
>>>> diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
>>>> index 1e8686695487..964a4fbf2626 100644
>>>> --- a/include/linux/serial_s3c.h
>>>> +++ b/include/linux/serial_s3c.h
>>>> @@ -246,24 +246,28 @@
>>>>  				 S5PV210_UFCON_TXTRIG4 |	\
>>>>  				 S5PV210_UFCON_RXTRIG4)
>>>>  
>>>> -#define APPLE_S5L_UCON_RXTO_ENA		9
>>>> -#define APPLE_S5L_UCON_RXTHRESH_ENA	12
>>>> -#define APPLE_S5L_UCON_TXTHRESH_ENA	13
>>>> -#define APPLE_S5L_UCON_RXTO_ENA_MSK	BIT(APPLE_S5L_UCON_RXTO_ENA)
>>>> -#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK	BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
>>>> -#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK	BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
>>>> +#define APPLE_S5L_UCON_RXTO_ENA			9
>>>> +#define APPLE_S5L_UCON_RXTO_LEGACY_ENA		11
>>>> +#define APPLE_S5L_UCON_RXTHRESH_ENA		12
>>>> +#define APPLE_S5L_UCON_TXTHRESH_ENA		13
>>>> +#define APPLE_S5L_UCON_RXTO_ENA_MSK		BIT(APPLE_S5L_UCON_RXTO_ENA)
>>>> +#define APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK	BIT(APPLE_S5L_UCON_RXTO_LEGACY_ENA)
>>>> +#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK		BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
>>>> +#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK		BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
>>>
>>> Small thing, but other diff is not needed except
>>> APPLE_S5L_UCON_RXTO_LEGACY_ENA.
>>>
>>> Kwang.
>> The other diffs are there to keep everything aligned, it looks like a
>> jumbled mess here in the email, but in an editor like nano it is all
>> aligned, before or after this series.
> 
> I know why you did. But still there is way keep aligned and only one
> line added. 
> 
> you just added one more tab to other lines.
> If one tab with APPLE_S5L_UCON_RXTO_LEGACY_ENA, then everything will
> fine.
> 
> I think less changes better when see git show or blame.
While as you said, APPLE_S5L_UCON_RXTO_LEGACY_ENA would be fine,
APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK is too long for that to be aligned, see
below without +, - or > distorting everything.

Before:
#define APPLE_S5L_UCON_RXTO_ENA		9
#define APPLE_S5L_UCON_RXTHRESH_ENA	12
#define APPLE_S5L_UCON_TXTHRESH_ENA	13
#define APPLE_S5L_UCON_RXTO_ENA_MSK	(1 << APPLE_S5L_UCON_RXTO_ENA)
#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK	(1 << APPLE_S5L_UCON_RXTHRESH_ENA)
#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK	(1 << APPLE_S5L_UCON_TXTHRESH_ENA)

Patch 1:
#define APPLE_S5L_UCON_RXTO_ENA		9
#define APPLE_S5L_UCON_RXTHRESH_ENA	12
#define APPLE_S5L_UCON_TXTHRESH_ENA	13
#define APPLE_S5L_UCON_RXTO_ENA_MSK	BIT(APPLE_S5L_UCON_RXTO_ENA)
#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK	BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK	BIT(APPLE_S5L_UCON_TXTHRESH_ENA)

After:
#define APPLE_S5L_UCON_RXTO_ENA			9
#define APPLE_S5L_UCON_RXTO_LEGACY_ENA		11
#define APPLE_S5L_UCON_RXTHRESH_ENA		12
#define APPLE_S5L_UCON_TXTHRESH_ENA		13
#define APPLE_S5L_UCON_RXTO_ENA_MSK		BIT(APPLE_S5L_UCON_RXTO_ENA)
#define APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK
BIT(APPLE_S5L_UCON_RXTO_LEGACY_ENA)
#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK		BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK		BIT(APPLE_S5L_UCON_TXTHRESH_ENA)

> 
> Best regards,
> Kwang.
> 
>>
>>>
>>>>  
>>>>  #define APPLE_S5L_UCON_DEFAULT		(S3C2410_UCON_TXIRQMODE | \
>>>>  					 S3C2410_UCON_RXIRQMODE | \
>>>>  					 S3C2410_UCON_RXFIFO_TOI)
>>>>  #define APPLE_S5L_UCON_MASK		(APPLE_S5L_UCON_RXTO_ENA_MSK | \
>>>> +					 APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK | \
>>>>  					 APPLE_S5L_UCON_RXTHRESH_ENA_MSK | \
>>>>  					 APPLE_S5L_UCON_TXTHRESH_ENA_MSK)
>>>>  
>>>> +#define APPLE_S5L_UTRSTAT_RXTO_LEGACY	BIT(3)
>>>>  #define APPLE_S5L_UTRSTAT_RXTHRESH	BIT(4)
>>>>  #define APPLE_S5L_UTRSTAT_TXTHRESH	BIT(5)
>>>>  #define APPLE_S5L_UTRSTAT_RXTO		BIT(9)
>>>> -#define APPLE_S5L_UTRSTAT_ALL_FLAGS	(0x3f0)
>>>> +#define APPLE_S5L_UTRSTAT_ALL_FLAGS	(0x3f8)
>>>>  
>>>>  #ifndef __ASSEMBLY__
>>>>  
>>>
>>
>> Nick Chan
> 

Nick Chan


  reply	other threads:[~2024-09-10  2:59 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-09  8:37 [PATCH v4 0/3] tty: serial: samsung: Serial fixes for Apple A7-A11 SoCs Nick Chan
2024-09-09  8:37 ` [PATCH v4 1/3] tty: serial: samsung: Use BIT() macro for APPLE_S5L_* Nick Chan
2024-09-10 12:48   ` Andi Shyti
2024-09-10 14:26     ` Nick Chan
2024-09-10 15:33       ` Andi Shyti
2024-09-09  8:37 ` [PATCH v4 2/3] tty: serial: samsung: Fix A7-A11 serial earlycon SError Nick Chan
2024-09-09  8:37 ` [PATCH v4 3/3] tty: serial: samsung: Fix serial rx on Apple A7-A9 Nick Chan
2024-09-09  9:43   ` Kwanghoon Son
2024-09-09  9:51     ` Nick Chan
2024-09-10  1:59       ` Kwanghoon Son
2024-09-10  2:59         ` Nick Chan [this message]
2024-09-10  4:15           ` Kwanghoon Son
2024-09-10 12:41   ` Andi Shyti
2024-09-10 12:49     ` Andi Shyti
2024-09-09 13:10 ` [PATCH v4 0/3] tty: serial: samsung: Serial fixes for Apple A7-A11 SoCs Janne Grunau
2024-09-10 12:21 ` Neal Gompa

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