From: Kalle Valo <kvalo@qca.qualcomm.com>
To: Yanbo Li <yanbol@qca.qualcomm.com>
Cc: dreamfly281@gmail.com, linux-wireless@vger.kernel.org,
ath10k@lists.infradead.org
Subject: Re: [PATCH] ath10k: Adjust the RX packet pad offset at QCA99X0 4addr mode
Date: Fri, 23 Oct 2015 08:24:49 +0300 [thread overview]
Message-ID: <877fme40ny.fsf@kamboji.qca.qualcomm.com> (raw)
In-Reply-To: <1445575816-4500-1-git-send-email-yanbol@qca.qualcomm.com> (Yanbo Li's message of "Thu, 22 Oct 2015 21:50:16 -0700")
Yanbo Li <yanbol@qca.qualcomm.com> writes:
> The QCA99X0 4 addresses RX packets pad 2 bytes at the beginning of
> MSDU instead the end of ieee80211 header to keep align. The currently
> RX data path can't parse the header correctly in this case. This
> patch fixes it for QCA99X0
>
> Signed-off-by: Yanbo Li <yanbol@qca.qualcomm.com>
>
> diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
> index 13de3617d5ab..3c1d07c191d5 100644
> --- a/drivers/net/wireless/ath/ath10k/core.c
> +++ b/drivers/net/wireless/ath/ath10k/core.c
> @@ -58,6 +58,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> .otp_exe_param = 0,
> .channel_counters_freq_hz = 88000,
> .max_probe_resp_desc_thres = 0,
> + .loc_4addr_pad = ATH10K_4ADDR_PAD_AFT,
> .fw = {
> .dir = QCA988X_HW_2_0_FW_DIR,
> .fw = QCA988X_HW_2_0_FW_FILE,
> @@ -75,6 +76,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> .otp_exe_param = 0,
> .channel_counters_freq_hz = 88000,
> .max_probe_resp_desc_thres = 0,
> + .loc_4addr_pad = ATH10K_4ADDR_PAD_AFT,
> .fw = {
> .dir = QCA6174_HW_2_1_FW_DIR,
> .fw = QCA6174_HW_2_1_FW_FILE,
> @@ -92,6 +94,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> .otp_exe_param = 0,
> .channel_counters_freq_hz = 88000,
> .max_probe_resp_desc_thres = 0,
> + .loc_4addr_pad = ATH10K_4ADDR_PAD_AFT,
> .fw = {
> .dir = QCA6174_HW_3_0_FW_DIR,
> .fw = QCA6174_HW_3_0_FW_FILE,
> @@ -109,6 +112,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> .otp_exe_param = 0,
> .channel_counters_freq_hz = 88000,
> .max_probe_resp_desc_thres = 0,
> + .loc_4addr_pad = ATH10K_4ADDR_PAD_AFT,
> .fw = {
> /* uses same binaries as hw3.0 */
> .dir = QCA6174_HW_3_0_FW_DIR,
> @@ -128,6 +132,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> .continuous_frag_desc = true,
> .channel_counters_freq_hz = 150000,
> .max_probe_resp_desc_thres = 24,
> + .loc_4addr_pad = ATH10K_4ADDR_PAD_PRE,
> .fw = {
> .dir = QCA99X0_HW_2_0_FW_DIR,
> .fw = QCA99X0_HW_2_0_FW_FILE,
> diff --git a/drivers/net/wireless/ath/ath10k/core.h b/drivers/net/wireless/ath/ath10k/core.h
> index 7cc7cdd56c95..b4db8bbf85ce 100644
> --- a/drivers/net/wireless/ath/ath10k/core.h
> +++ b/drivers/net/wireless/ath/ath10k/core.h
> @@ -646,6 +646,9 @@ struct ath10k {
> */
> u32 max_probe_resp_desc_thres;
>
> + /* The padding bytes's location is different on various chips */
> + enum ath10k_loc_4addr_pad loc_4addr_pad;
I think that loc prefix is a bit misleading, it reminds me of
locationing/positioning etc. What about ath10k_hw_4addr_pad?
--
Kalle Valo
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next prev parent reply other threads:[~2015-10-23 5:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 4:50 [PATCH] ath10k: Adjust the RX packet pad offset at QCA99X0 4addr mode Yanbo Li
2015-10-23 5:24 ` Kalle Valo [this message]
2015-10-23 6:10 ` Li, Yanbo
2015-11-16 20:57 ` Kalle Valo
2015-11-20 13:32 ` Mohammed Shafi Shajakhan
2015-11-20 17:59 ` Li, Yanbo
2015-11-23 15:20 ` Kalle Valo
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