From: Kalle Valo <kvalo@qca.qualcomm.com>
To: ath10k@lists.infradead.org
Cc: linux-wireless@vger.kernel.org,
Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Subject: Re: [PATCH v4] ath10k: bypass PLL setting on target init for QCA9888
Date: Mon, 1 Jun 2015 10:18:44 +0300 [thread overview]
Message-ID: <87r3pvvquj.fsf@kamboji.qca.qualcomm.com> (raw)
In-Reply-To: <1432736253-30040-1-git-send-email-kvalo@qca.qualcomm.com> (Kalle Valo's message of "Wed, 27 May 2015 17:17:33 +0300")
Kalle Valo <kvalo@qca.qualcomm.com> writes:
> From: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
>
> Some of of qca988x solutions are having global reset issue
> during target initialization. Bypassing PLL setting before
> downloading firmware and letting the SoC run on REF_CLK is fixing
> the problem. Corresponding firmware change is also needed to set
> the clock source once the target is initialized. Since 10.2.4
> firmware is having this ROM patch, applying skip_clock_init only
> for 10.2.4 firmware versions.
>
> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Thanks, applied.
--
Kalle Valo
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prev parent reply other threads:[~2015-06-01 7:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-27 14:17 [PATCH v4] ath10k: bypass PLL setting on target init for QCA9888 Kalle Valo
2015-06-01 7:18 ` Kalle Valo [this message]
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