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Sun, 23 May 2021 21:15:18 -0700 (PDT) Date: Mon, 24 May 2021 09:45:14 +0530 From: Manivannan Sadhasivam To: Baochen Qiang Cc: hemantk@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, ath11k@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH v2] bus: mhi: Wait for M2 state during system resume Message-ID: <20210524041514.GA8823@work> References: <20210524040312.14409-1-bqiang@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210524040312.14409-1-bqiang@codeaurora.org> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210523_211521_534567_2E743A9B X-CRM114-Status: GOOD ( 24.76 ) X-BeenThere: ath11k@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "ath11k" Errors-To: ath11k-bounces+ath11k=archiver.kernel.org@lists.infradead.org On Mon, May 24, 2021 at 12:03:12PM +0800, Baochen Qiang wrote: > During system resume, MHI host triggers M3->M0 transition and then waits > for target device to enter M0 state. Once done, the device queues a state > change event into ctrl event ring and notifies MHI host by raising an > interrupt, where a tasklet is scheduled to process this event. In most cases, > the tasklet is served timely and wait operation succeeds. > > However, there are cases where CPU is busy and cannot serve this tasklet > for some time. Once delay goes long enough, the device moves itself to M1 > state and also interrupts MHI host after inserting a new state change > event to ctrl ring. Later CPU finally has time to process the ring, however > there are two events in it now: > 1. for M3->M0 event, which is processed first as queued first, > tasklet handler updates device state to M0 and wakes up the task, > i.e., the MHI host. > 2. for M0->M1 event, which is processed later, tasklet handler > triggers M1->M2 transition and updates device state to M2 directly, > then wakes up the MHI host(if still sleeping on this wait queue). > Note that although MHI host has been woken up while processing the first > event, it may still has no chance to run before the second event is processed. > In other words, MHI host has to keep waiting till timeout cause the M0 state > has been missed. > > kernel log here: > ... > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.911251] mhi 0000:06:00.0: Entered with PM state: M3, MHI state: M3 > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.917762] mhi 0000:06:00.0: State change event to state: M0 > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.917767] mhi 0000:06:00.0: State change event to state: M1 > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4338.788231] mhi 0000:06:00.0: Did not enter M0 state, MHI state: M2, PM state: M2 > ... > > Fix this issue by simply adding M2 as a valid state for resume. > > Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 > > Fixes: 0c6b20a1d720 ("bus: mhi: core: Add support for MHI suspend and resume") > Signed-off-by: Baochen Qiang > Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > drivers/bus/mhi/core/pm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c > index e2e59a341fef..59b009a3ee9b 100644 > --- a/drivers/bus/mhi/core/pm.c > +++ b/drivers/bus/mhi/core/pm.c > @@ -934,6 +934,7 @@ int mhi_pm_resume(struct mhi_controller *mhi_cntrl) > > ret = wait_event_timeout(mhi_cntrl->state_event, > mhi_cntrl->dev_state == MHI_STATE_M0 || > + mhi_cntrl->dev_state == MHI_STATE_M2 || > MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), > msecs_to_jiffies(mhi_cntrl->timeout_ms)); > > -- > 2.25.1 > -- ath11k mailing list ath11k@lists.infradead.org http://lists.infradead.org/mailman/listinfo/ath11k