From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Johannes Berg" <johannes@sipsolutions.net>,
"Jeff Johnson" <jjohnson@kernel.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev,
linux-wireless@vger.kernel.org, ath11k@lists.infradead.org,
qiang.yu@oss.qualcomm.com, quic_vbadigan@quicinc.com,
quic_vpernami@quicinc.com, quic_mrana@quicinc.com,
"Jeff Johnson" <jeff.johnson@oss.qualcomm.com>
Subject: Re: [PATCH v3 02/11] PCI/bwctrl: Add support to scale bandwidth before & after link re-training
Date: Mon, 19 May 2025 16:41:14 +0300 (EEST) [thread overview]
Message-ID: <2a539ddc-95d6-7c37-4cfe-3a54ffce0861@linux.intel.com> (raw)
In-Reply-To: <20250519-mhi_bw_up-v3-2-3acd4a17bbb5@oss.qualcomm.com>
On Mon, 19 May 2025, Krishna Chaitanya Chundru wrote:
> If the driver wants to move to higher data rate/speed than the current data
> rate then the controller driver may need to change certain votes so that
> link may come up at requested data rate/speed like QCOM PCIe controllers
> need to change their RPMh (Resource Power Manager-hardened) state. Once
> link retraining is done controller drivers needs to adjust their votes
> based on the final data rate.
>
> Some controllers also may need to update their bandwidth voting like
> ICC bw votings etc.
>
> So, add pre_scale_bus_bw() & post_scale_bus_bw() op to call before & after
> the link re-train. There is no explicit locking mechanisms as these are
> called by a single client endpoint driver.
>
> In case of PCIe switch, if there is a request to change target speed for a
> downstream port then no need to call these function ops as these are
> outside the scope of the controller drivers.
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> ---
> drivers/pci/pcie/bwctrl.c | 15 +++++++++++++++
> include/linux/pci.h | 14 ++++++++++++++
> 2 files changed, 29 insertions(+)
>
> diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c
> index d8d2aa85a22928b99c5bba1d2bcc5647c0edeeb6..3525bc0cd10f1dd7794abbe84ccb10e2c53a10af 100644
> --- a/drivers/pci/pcie/bwctrl.c
> +++ b/drivers/pci/pcie/bwctrl.c
> @@ -161,6 +161,8 @@ static int pcie_bwctrl_change_speed(struct pci_dev *port, u16 target_speed, bool
> int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
> bool use_lt)
> {
> + struct pci_host_bridge *host = pci_find_host_bridge(port->bus);
> + bool is_rootbus = pci_is_root_bus(port->bus);
> struct pci_bus *bus = port->subordinate;
> u16 target_speed;
> int ret;
> @@ -173,6 +175,16 @@ int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
>
> target_speed = pcie_bwctrl_select_speed(port, speed_req);
>
> + /*
> + * The host bridge driver may need to be scaled for targeted speed
> + * otherwise link might not come up at requested speed.
> + */
> + if (is_rootbus && host->pre_scale_bus_bw) {
> + ret = host->pre_scale_bus_bw(host, port, target_speed);
> + if (ret)
> + return ret;
> + }
> +
> scoped_guard(rwsem_read, &pcie_bwctrl_setspeed_rwsem) {
> struct pcie_bwctrl_data *data = port->link_bwctrl;
>
> @@ -197,6 +209,9 @@ int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
> !list_empty(&bus->devices))
> ret = -EAGAIN;
>
> + if (bus && is_rootbus && host->post_scale_bus_bw)
> + host->post_scale_bus_bw(host, port, pci_bus_speed2lnkctl2(bus->cur_bus_speed));
> +
> return ret;
> }
>
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 51e2bd6405cda5acc33d268bbe1d491b145e083f..7eb0856ba0ed20bd1336683b68add124c7483902 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -601,6 +601,20 @@ struct pci_host_bridge {
> void (*release_fn)(struct pci_host_bridge *);
> int (*enable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
> void (*disable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
> + /*
> + * Callback to the host bridge drivers to update ICC bw votes, clock frequencies etc
BW
> + * for the link re-train to come up in targeted speed. These are intended to be
> + * called by devices directly attached to the root port. These are called by a single
Root Port
> + * client endpoint driver, so there is no need for explicit locking mechanisms.
Endpoint
> + */
> + int (*pre_scale_bus_bw)(struct pci_host_bridge *bridge, struct pci_dev *dev, int speed);
> + /*
> + * Callback to the host bridge drivers to adjust ICC bw votes, clock frequencies etc
> + * to the updated speed after link re-train. These are intended to be called by
> + * devices directly attached to the root port. These are called by a single client
> + * endpoint driver, so there is no need for explicit locking mechanisms.
> + */
Please fold comments to 80 characters.
> + void (*post_scale_bus_bw)(struct pci_host_bridge *bridge, struct pci_dev *dev, int speed);
I still don't like the names. Maybe simply pre/post_link_speed_change
would sound more generic.
Not a show-stopper but the current name sounds pretty esoteric.
> void *release_data;
> unsigned int ignore_reset_delay:1; /* For entire hierarchy */
> unsigned int no_ext_tags:1; /* No Extended Tags */
>
>
--
i.
next prev parent reply other threads:[~2025-05-19 13:43 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-19 9:42 [PATCH v3 00/11] bus: mhi: host: Add support for mhi bus bw Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 01/11] PCI: Update current bus speed as part of pci_pwrctrl_notify() Krishna Chaitanya Chundru
2025-05-19 13:09 ` Ilpo Järvinen
2025-05-20 4:05 ` Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 02/11] PCI/bwctrl: Add support to scale bandwidth before & after link re-training Krishna Chaitanya Chundru
2025-05-19 13:41 ` Ilpo Järvinen [this message]
2025-05-20 4:06 ` Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 03/11] PCI/ASPM: Return enabled ASPM states as part of pcie_aspm_enabled() Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 04/11] PCI/ASPM: Clear aspm_disable as part of __pci_enable_link_state() Krishna Chaitanya Chundru
2025-05-19 13:21 ` Ilpo Järvinen
2025-05-20 4:12 ` Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 05/11] PCI: qcom: Extract core logic from qcom_pcie_icc_opp_update() Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 06/11] PCI: qcom: Add support for PCIe bus bw scaling Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 07/11] bus: mhi: host: Add support to read MHI capabilities Krishna Chaitanya Chundru
2025-05-21 14:52 ` Jeffrey Hugo
2025-05-21 15:06 ` Krishna Chaitanya Chundru
2025-05-21 15:32 ` Jeffrey Hugo
2025-05-19 9:42 ` [PATCH v3 08/11] bus: mhi: host: Add support for Bandwidth scale Krishna Chaitanya Chundru
2025-05-19 13:48 ` Ilpo Järvinen
2025-05-19 9:42 ` [PATCH v3 09/11] PCI: Export pci_set_target_speed() Krishna Chaitanya Chundru
2025-05-19 13:30 ` Ilpo Järvinen
2025-05-19 9:42 ` [PATCH v3 10/11] PCI: Add function to convert lnkctl2speed to pci_bus_speed Krishna Chaitanya Chundru
2025-05-19 9:42 ` [PATCH v3 11/11] wifi: ath11k: Add support for MHI bandwidth scaling Krishna Chaitanya Chundru
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2a539ddc-95d6-7c37-4cfe-3a54ffce0861@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=ath11k@lists.infradead.org \
--cc=bhelgaas@google.com \
--cc=brgl@bgdev.pl \
--cc=jeff.johnson@oss.qualcomm.com \
--cc=jingoohan1@gmail.com \
--cc=jjohnson@kernel.org \
--cc=johannes@sipsolutions.net \
--cc=krishna.chundru@oss.qualcomm.com \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-wireless@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=mhi@lists.linux.dev \
--cc=qiang.yu@oss.qualcomm.com \
--cc=quic_mrana@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=quic_vpernami@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox