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Fri, 01 Mar 2024 16:16:18 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 421GGHa7015847 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 1 Mar 2024 16:16:17 GMT Received: from [10.110.42.209] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 1 Mar 2024 08:16:17 -0800 Message-ID: <6bdcffce-e657-4990-bd60-5dd67abbb9c9@quicinc.com> Date: Fri, 1 Mar 2024 08:16:16 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] wifi: ath11k: adjust a comment to reflect reality Content-Language: en-US To: Kevin Lo , CC: Kalle Valo , References: From: Jeff Johnson In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: H6N7GW0bgFRtuYB6wISkgmCb7NRoJ7Et X-Proofpoint-GUID: H6N7GW0bgFRtuYB6wISkgmCb7NRoJ7Et X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-01_17,2024-03-01_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 spamscore=0 clxscore=1011 priorityscore=1501 adultscore=0 impostorscore=0 mlxscore=0 mlxlogscore=896 lowpriorityscore=0 bulkscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2403010135 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_081625_676875_61360A10 X-CRM114-Status: GOOD ( 12.19 ) X-BeenThere: ath11k@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "ath11k" Errors-To: ath11k-bounces+ath11k=archiver.kernel.org@lists.infradead.org On 2/26/2024 6:45 PM, Kevin Lo wrote: > In ath11k_mhi_set_mhictrl_reset(), I observed on QCA6390/QCN9074/WCN6855, > MHISTATUS has SYSERR bit always been set after SOC_GLOBAL_RESET. > > Signed-off-by: Kevin Lo > --- > diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c > index 3de7fa6f88d0..1198e80d9dff 100644 > --- a/drivers/net/wireless/ath/ath11k/mhi.c > +++ b/drivers/net/wireless/ath/ath11k/mhi.c > @@ -158,8 +158,8 @@ void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab) > > ath11k_dbg(ab, ATH11K_DBG_PCI, "mhistatus 0x%x\n", val); > > - /* Observed on QCA6390 that after SOC_GLOBAL_RESET, MHISTATUS > - * has SYSERR bit set and thus need to set MHICTRL_RESET > + /* After SOC_GLOBAL_RESET, MHISTATUS has SYSERR bit > + * always been set and thus need to set MHICTRL_RESET > * to clear SYSERR. > */ > ath11k_pcic_write32(ab, MHICTRL, MHICTRL_RESET_MASK); Unless you've verified this is always true for every supported chipset I'd rather more accurately say something like: After SOC_GLOBAL_RESET, MHISTATUS may still have SYSERR bit set and thus...