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Thu, 02 May 2024 12:27:12 -0700 (PDT) Received: from [192.168.1.105] ([188.113.43.9]) by smtp.gmail.com with ESMTPSA id s12-20020a19ad4c000000b0051c5570f573sm277186lfd.23.2024.05.02.12.27.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 02 May 2024 12:27:11 -0700 (PDT) Message-ID: Date: Thu, 2 May 2024 22:27:31 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] wifi: ath11k: fix remapped ce accessing issue on 64bit OS To: Jeff Johnson , Ziyang Huang , kvalo@kernel.org Cc: jjohnson@kernel.org, linux-wireless@vger.kernel.org, ath11k@lists.infradead.org, linux-kernel@vger.kernel.org References: <6336ffc7-d8ae-4cfd-8b66-d6d91cb0d15e@quicinc.com> Content-Language: en-US From: Sergey Ryazanov In-Reply-To: <6336ffc7-d8ae-4cfd-8b66-d6d91cb0d15e@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240502_122716_301114_0D2D680C X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: ath11k@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "ath11k" Errors-To: ath11k-bounces+ath11k=archiver.kernel.org@lists.infradead.org Hi Jeff, On 01.05.2024 19:56, Jeff Johnson wrote: > On 5/1/2024 9:14 AM, Ziyang Huang wrote: >> On 64bit OS, when ab->mem_ce is lower than or 4G far away from ab->mem, >> u32 is not enough to store the offsets, which makes ath11k_ahb_read32() >> and ath11k_ahb_write32() access incorrect address and causes Data Abort >> Exception. > > Are you actually observing this issue? > Or is this a hypothetical situation? Yep. This is the real issue. I faced it on IPQ5018 with 64bits kernel. >> Let's use the high bits of offsets to decide where to access, which is >> similar as ath11k_pci_get_window_start() done. In the future, we can merge >> these functions for unified regs accessing. > > Performing unnecessary tests and masking for every ioread/write operation will > potentially impact performance. > > What other fixes were considered (i.e. did you consider making all the > register addresses u64?) Probably, making argument u64 could also be too much. I/O address space of this chip fits 4GB so u32 should be enough. I have a bit different fix for this bug. It introduces an indirect call for the CE registers access and a dedicated set of accessing functions for chips that has the CE region outside the main I/O area. I am going to publish it in a couple of weeks, when I will come from a trip. The patch still needs some polishing. -- Sergey