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[213.36.7.13]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccbe9080sm493255405e9.5.2024.05.22.00.28.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 May 2024 00:28:05 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 22 May 2024 09:28:05 +0200 Message-Id: Subject: Re: [PATCH 3/3] wifi: ath12k: fix firmware crash during reo reinject From: "Nicolas Escande" To: "Praneesh P" , Cc: X-Mailer: aerc 0.17.0 References: <20240520070045.631029-1-quic_ppranees@quicinc.com> <20240520070045.631029-4-quic_ppranees@quicinc.com> In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240522_002809_557140_0A05C34F X-CRM114-Status: GOOD ( 19.84 ) X-BeenThere: ath12k@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "ath12k" Errors-To: ath12k-bounces+ath12k=archiver.kernel.org@lists.infradead.org On Wed May 22, 2024 at 9:15 AM CEST, Praneesh P wrote: > > > On 5/21/2024 2:20 PM, Nicolas Escande wrote: > > On Mon May 20, 2024 at 9:00 AM CEST, P Praneesh wrote: > >> When handling fragmented packets, the ath12k driver reassembles each > >> fragment into a normal packet and then reinjects it into the HW ring. > >> However, a firmware crash occurs during this reinjection process. > >> The issue arises because the driver populates peer metadata in > >> reo_ent_ring->queue_addr_lo, while the firmware expects the physical > >> address obtained from the corresponding peer=E2=80=99s queue descripto= r. Fix it > >> by filling peer's queue descriptor's physical address in queue_addr_lo= . > >> > >> Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00209-QCAHKSWPL_SILICONZ-1 > >> > >> Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 device= s") > >> Signed-off-by: P Praneesh > >> --- > >> drivers/net/wireless/ath/ath12k/dp_rx.c | 14 ++++++-------- > >> 1 file changed, 6 insertions(+), 8 deletions(-) > >> > >> diff --git a/drivers/net/wireless/ath/ath12k/dp_rx.c b/drivers/net/wir= eless/ath/ath12k/dp_rx.c > >> index 2bfcc19d15ea..2adb6c7d4a42 100644 > >> --- a/drivers/net/wireless/ath/ath12k/dp_rx.c > >> +++ b/drivers/net/wireless/ath/ath12k/dp_rx.c > >> @@ -2967,7 +2967,7 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(st= ruct ath12k *ar, > >> struct hal_srng *srng; > >> dma_addr_t link_paddr, buf_paddr; > >> u32 desc_bank, msdu_info, msdu_ext_info, mpdu_info; > >> - u32 cookie, hal_rx_desc_sz, dest_ring_info0; > >> + u32 cookie, hal_rx_desc_sz, dest_ring_info0, queue_addr_hi; > >> int ret; > >> struct ath12k_rx_desc_info *desc_info; > >> enum hal_rx_buf_return_buf_manager idle_link_rbm =3D dp->idle_link_= rbm; > >> @@ -3060,13 +3060,11 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(= struct ath12k *ar, > >> reo_ent_ring->rx_mpdu_info.peer_meta_data =3D > >> reo_dest_ring->rx_mpdu_info.peer_meta_data; > >> =20 > >> - /* Firmware expects physical address to be filled in queue_addr_lo i= n > >> - * the MLO scenario and in case of non MLO peer meta data needs to b= e > >> - * filled. > >> - * TODO: Need to handle for MLO scenario. > >> - */ > >> - reo_ent_ring->queue_addr_lo =3D reo_dest_ring->rx_mpdu_info.peer_met= a_data; > >> - reo_ent_ring->info0 =3D le32_encode_bits(dst_ind, > >> + reo_ent_ring->queue_addr_lo =3D cpu_to_le32(lower_32_bits(rx_tid->pa= ddr)); > >> + queue_addr_hi =3D upper_32_bits(rx_tid->paddr); > > Shouldn't there be a cpu_to_le32 somewhere here ? It just seems asymetr= ical > > between the two values extracted from rx_tid->paddr > le32_encode_bits of queue_addr_hi does that conversion, so there is no=20 > need to explicitly convert cpu_to_le32 while fetching rx_tid->paddr's=20 > upper 32 bits. OK, got it, > >> + reo_ent_ring->info0 =3D le32_encode_bits(queue_addr_hi, > >> + HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI) | > >> + le32_encode_bits(dst_ind, > >> HAL_REO_ENTR_RING_INFO0_DEST_IND); > >> =20 > >> reo_ent_ring->info1 =3D le32_encode_bits(rx_tid->cur_sn, > >=20 Thanks