From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adrian Chadd Date: Tue, 2 Aug 2016 10:45:28 -0700 Subject: [ath9k-devel] ath9k MSI interupts In-Reply-To: References: Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org Hi! Firstly - please post your diffs somewhere so people can start to help. :) ok, so: I have an open copy of the ar9380 HAL in freebsd - find a freebsd tree (eg github.com/freebsd/freebsd), it's in sys/contrib/dev/ath/ath_hal/ar9300/ . Grep _MSI *.c and you'll see wha'ts going on. TL;DR: * there are different INTCFG register bits for MSI: ar9300reg.h:#define AR_INTCFG_REQ 0x00000001 // Interrupt request flag ar9300reg.h:#define AR_INTCFG_MSI_RXOK 0x00000000 // Rx interrupt for MSI logic is RXOK ar9300reg.h:#define AR_INTCFG_MSI_RXINTM 0x00000004 // Rx interrupt for MSI logic is RXINTM ar9300reg.h:#define AR_INTCFG_MSI_RXMINTR 0x00000006 // Rx interrupt for MSI logic is RXMINTR ar9300reg.h:#define AR_INTCFG_MSI_TXOK 0x00000000 // Rx interrupt for MSI logic is TXOK ar9300reg.h:#define AR_INTCFG_MSI_TXINTM 0x00000010 // Rx interrupt for MSI logic is TXINTM ar9300reg.h:#define AR_INTCFG_MSI_TXMINTR 0x00000018 // Rx interrupt for MSI logic is TXMINTR .. and the register: ar9300reg.h:#define AR_INTCFG AR_MAC_DMA_OFFSET(MAC_DMA_INTER) osprey_reg_map.h: volatile u_int32_t MAC_DMA_INTER; /* 0x5c - 0x60 */ .. and it's offset into the register window as 0x0, so it's actually register 0x5c. ok, so that's required to get the MSI interrupts to fire. there's different logic in get_pending_interrupts() based on whether it's MSI or not. Ther'es also this: ar9300.h: u_int32_t ah_msi_reg; /* copy of AR_PCIE_MSI */ ar9300.h: u_int32_t AR_PCIE_MSI; ar9300reg.h:#define AR_PCIE_MSI_ENABLE 0x00000001 ar9300reg.h:#define AR_PCIE_MSI_HW_DBI_WR_EN 0x02000000 ar9300reg.h:#define AR_PCIE_MSI_HW_INT_PENDING_ADDR 0xFFA0C1FF // bits 8..11: value must be 0x5060 ar9300reg.h:#define AR_PCIE_MSI_HW_INT_PENDING_ADDR_MSI_64 0xFFA0C9FF // bits 8..11: value must be 0x5064 There's code at the end of ar9300_get_pending_interrupts() and ar9300_set_interrupts() that messes with the MSI interrupt register above. So I'd grep the ar9300 HAL code for: _MSI *c ah_msi_reg AR_INTCFG AR_PCIE_MSI HTH, -adrian