From mboxrd@z Thu Jan 1 00:00:00 1970 From: Date: Fri, 25 May 2012 15:26:18 -0000 Subject: No subject Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org "enabled" in the device driver. I will scour the ath9k source code for this config. =20 Thank you for your input. =20 Hasan R. =20 =20 From: adrian.chadd@gmail.com [mailto:adrian.chadd at gmail.com] On Behalf Of Adrian Chadd Sent: Sunday, May 27, 2012 7:18 PM To: Hasan Rashid Cc: ath9k-devel at lists.ath9k.org Subject: Re: [ath9k-devel] Atheros AR9382 W_DISABLE_L PIN 20 Mini-PCIe =20 Hi, =20 So the 30 second version of rfkill is this: =20 * it can be software driven (ie, the driver implements rfkill by stopping TX/RX and baseband activity, possibly shutting down the NIC) * it can be hardware driven (ie, there's an RFKill line to the NIC via= a GPIO pin) =20 The pin itself can be controlled by: =20 * hardware - ie, a physical switch to the rfkill pin; * software - ie, some ACPI controlled function maps to the rfkill pin. =20 What you have above seems to be (2) and (1) respectively - ie, that pin is mapped to GPIO7 on the NIC, and now you need to program GPIO7 to be an RFkill pin. There's code in ath9k somewhere to configure the GPIO pin correctly to implement hardware rfkill. =20 Good luck! =20 =20 Adrian This communication contains information that may be confidential or priv= ileged. The information is solely intended for the use of the addressee.= If you are not the intended recipient, be advised that any disclosure,= copy, distribution, or use of the contents of this communication is pro= hibited. If you have received this communication in error, please immediately notify the sender by telephone or by electroni= c mail. ------_=_NextPart_001_01CD3DB5.D3C19EF1 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

From your email I gather I have a RFKILL switch but it needs to be R= 20;enabled” in the device driver. I will scour  the ath9k sou= rce code for this config.

 

Thank= you for your input.

<= o:p> 

Hasan R.

 

<= p class=3DMsoNormal> 

From: adrian.chadd@= gmail.com [mailto:adrian.chadd at gmail.com] On Behalf Of Adrian Cha= dd
Sent: Sunday, May 27, 2012 7:18 PM
To: Hasan Rash= id
Cc: ath9k-devel at lists.ath9k.org
Subject: Re: [ath= 9k-devel] Atheros AR9382 W_DISABLE_L PIN 20 Mini-PCIe<= /p>

 

=

Hi,

<= p class=3DMsoNormal style=3D'margin-left:.5in'> 

So the 30 second= version of rfkill is this:

 

* it can be software driven (ie,= the driver implements rfkill by stopping TX/RX and baseband activity,= possibly shutting down the NIC)

* it can be hardware driven (ie, there= 's an RFKill line to the NIC via a GPIO pin)

 

The pin itself can= be controlled by:

 

* hardware - ie, a physical switch to the= rfkill pin;

* software - ie, some ACPI controlled function maps to the= rfkill pin.

 

What you have above seems to be (2) and (1) respec= tively - ie, that pin is mapped to GPIO7 on the NIC, and now you need= to program GPIO7 to be an RFkill pin. There's code in ath9k somewhere= to configure the GPIO pin correctly to implement hardware rfkill.<= /o:p>

 

Good luck!

 

 

Adrian

This communication contains information that may be confidential or= privileged. The information is solely intended for the use of the addre= ssee. If you are not the intended recipient, be advised that any disclos= ure, copy, distribution, or use of the contents of this communication= is prohibited. If you have received this communication in
error, ple= ase immediately notify the sender by telephone or by electronic mail.

Export Notice: This email may contain technical data controlled under= the  International Traffic in Arms Regulations (ITAR) by the U.S.= Department of State (22 CFR 120-130) or under the U.S Export Administra= tion Regulations (EAR) by the Department of Commerce (15 CFR 730-744).&n= bsp; Violations of these export laws are subject to severe criminal pena= lties. 

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