From mboxrd@z Thu Jan 1 00:00:00 1970 From: Date: Fri, 27 Feb 2009 19:01:43 -0000 Subject: No subject Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org // ?? nice pointer arithmetic... should use PTR_ALIGN here? off = ((unsigned long) skb->data) % sc->cachelsz; if (off != 0) skb_reserve(skb, sc->cachelsz); in other words, when we allocate, round up to the next cache line greater than IEEE80211_MAX_LEN, then add an extra cache_line-1 bytes so we can map starting from it. dev_alloc_skb already does some padding and alignment, and it's configurable on a per-arch basis (though looks like only powerpc sets it to L1 cache size, everywhere else it's 32 bytes.) I guess if someone is bored some benchmarking would be useful. -- Bob Copeland %% www.bobcopeland.com