* [PATCH 2/3] ssb: pci: fix mdio writes on newer cores (rev 10+)
2011-04-01 10:07 [PATCH 1/3] ssb: pci: trivial: drop useless pointer Rafał Miłecki
@ 2011-04-01 10:07 ` Rafał Miłecki
2011-04-01 10:07 ` [PATCH 3/3] ssb: pci: implement mdio reading Rafał Miłecki
1 sibling, 0 replies; 3+ messages in thread
From: Rafał Miłecki @ 2011-04-01 10:07 UTC (permalink / raw)
To: Michael Büsch, linux-wireless, John W. Linville
Cc: b43-dev, Rafał Miłecki
Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
---
drivers/ssb/driver_pcicore.c | 34 ++++++++++++++++++++++++++++++++--
1 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index e0cf29e..08fa6fd 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -444,11 +444,35 @@ static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data)
pcicore_write32(pc, 0x134, data);
}
+static void ssb_pcie_mdio_set_phy(struct ssb_pcicore *pc, u8 phy)
+{
+ const u16 mdio_control = 0x128;
+ const u16 mdio_data = 0x12C;
+ u32 v;
+ int i;
+
+ v = (1 << 30); /* Start of Transaction */
+ v |= (1 << 28); /* Write Transaction */
+ v |= (1 << 17); /* Turnaround */
+ v |= (0x1F << 18);
+ v |= (phy << 4);
+ pcicore_write32(pc, mdio_data, v);
+
+ udelay(10);
+ for (i = 0; i < 200; i++) {
+ v = pcicore_read32(pc, mdio_control);
+ if (v & 0x100 /* Trans complete */)
+ break;
+ msleep(1);
+ }
+}
+
static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
u8 address, u16 data)
{
const u16 mdio_control = 0x128;
const u16 mdio_data = 0x12C;
+ int max_retries = 10;
u32 v;
int i;
@@ -456,16 +480,22 @@ static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
v |= 0x2; /* MDIO Clock Divisor */
pcicore_write32(pc, mdio_control, v);
+ if (pc->dev->id.revision >= 10) {
+ max_retries = 200;
+ ssb_pcie_mdio_set_phy(pc, device);
+ }
+
v = (1 << 30); /* Start of Transaction */
v |= (1 << 28); /* Write Transaction */
v |= (1 << 17); /* Turnaround */
- v |= (u32)device << 22;
+ if (pc->dev->id.revision < 10)
+ v |= (u32)device << 22;
v |= (u32)address << 18;
v |= data;
pcicore_write32(pc, mdio_data, v);
/* Wait for the device to complete the transaction */
udelay(10);
- for (i = 0; i < 10; i++) {
+ for (i = 0; i < max_retries; i++) {
v = pcicore_read32(pc, mdio_control);
if (v & 0x100 /* Trans complete */)
break;
--
1.7.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH 3/3] ssb: pci: implement mdio reading
2011-04-01 10:07 [PATCH 1/3] ssb: pci: trivial: drop useless pointer Rafał Miłecki
2011-04-01 10:07 ` [PATCH 2/3] ssb: pci: fix mdio writes on newer cores (rev 10+) Rafał Miłecki
@ 2011-04-01 10:07 ` Rafał Miłecki
1 sibling, 0 replies; 3+ messages in thread
From: Rafał Miłecki @ 2011-04-01 10:07 UTC (permalink / raw)
To: Michael Büsch, linux-wireless, John W. Linville
Cc: b43-dev, Rafał Miłecki
Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
---
drivers/ssb/driver_pcicore.c | 43 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 08fa6fd..76cbf96 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -467,6 +467,49 @@ static void ssb_pcie_mdio_set_phy(struct ssb_pcicore *pc, u8 phy)
}
}
+#if 0
+//done but not used yet
+static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address)
+{
+ const u16 mdio_control = 0x128;
+ const u16 mdio_data = 0x12C;
+ int max_retries = 10;
+ u16 ret = 0;
+ u32 v;
+ int i;
+
+ v = 0x80; /* Enable Preamble Sequence */
+ v |= 0x2; /* MDIO Clock Divisor */
+ pcicore_write32(pc, mdio_control, v);
+
+ if (pc->dev->id.revision >= 10) {
+ max_retries = 200;
+ ssb_pcie_mdio_set_phy(pc, device);
+ }
+
+ v = (1 << 30); /* Start of Transaction */
+ v |= (1 << 29); /* Read Transaction */
+ v |= (1 << 17); /* Turnaround */
+ if (pc->dev->id.revision < 10)
+ v |= (u32)device << 22;
+ v |= (u32)address << 18;
+ pcicore_write32(pc, mdio_data, v);
+ /* Wait for the device to complete the transaction */
+ udelay(10);
+ for (i = 0; i < 200; i++) {
+ v = pcicore_read32(pc, mdio_control);
+ if (v & 0x100 /* Trans complete */) {
+ udelay(10);
+ ret = pcicore_read32(pc, mdio_data);
+ break;
+ }
+ msleep(1);
+ }
+ pcicore_write32(pc, mdio_control, 0);
+ return ret;
+}
+#endif
+
static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
u8 address, u16 data)
{
--
1.7.1
^ permalink raw reply related [flat|nested] 3+ messages in thread