From: Kalle Valo <kvalo@adurom.com>
To: b43-dev@lists.infradead.org
Subject: Enabling PLL timeout on BCMA bus
Date: Sun, 17 Jul 2011 13:22:41 +0300 [thread overview]
Message-ID: <87ipr1urym.fsf@purkki.adurom.net> (raw)
In-Reply-To: <CACna6rwtv2noEAEg8O4sOy5sUY_rLJWfdk3EDpkTkkEMu3ADag@mail.gmail.com> ("Rafał Miłecki"'s message of "Sat\, 16 Jul 2011 11\:51\:52 +0200")
Rafa? Mi?ecki <zajec5@gmail.com> writes:
> W dniu 16 lipca 2011 03:14 u?ytkownik Rafa? Mi?ecki <zajec5@gmail.com> napisa?:
>> My last hope is to find some magic in PCI config space.
>
> After dumping PCI config space ops, I've noticed there are writes to 4
> uniq registers:
> 0x0D ? latency timer (setting to 64)
> 0x40 ? Disabling RETRY_TIMEOUT register (0x41)
> 0x80 ? PCI_BAR0_WIN
> 0xAC ? PCI_BAR0_WIN2
>
> No magic here :( I've no idea what now. I don't see a single
> difference between b43 and wl.
What about timing? Maybe wl is slower in some cases?
--
Kalle Valo
next prev parent reply other threads:[~2011-07-17 10:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-15 22:34 Enabling PLL timeout on BCMA bus Rafał Miłecki
2011-07-15 23:51 ` Rafał Miłecki
2011-07-16 1:14 ` Rafał Miłecki
2011-07-16 9:51 ` Rafał Miłecki
2011-07-17 10:22 ` Kalle Valo [this message]
2011-07-17 16:40 ` Rafał Miłecki
2011-07-17 16:41 ` Rafał Miłecki
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