* [PATCH 2/9] ARM lds: remove unused got
From: Sascha Hauer @ 2012-07-19 8:12 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/lib/barebox.lds.S | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S
index 3fd271b..736e5f0 100644
--- a/arch/arm/lib/barebox.lds.S
+++ b/arch/arm/lib/barebox.lds.S
@@ -80,9 +80,6 @@ SECTIONS
. = ALIGN(4);
.data : { *(.data*) }
- . = ALIGN(4);
- .got : { *(.got*) }
-
. = .;
__barebox_cmd_start = .;
.barebox_cmd : { BAREBOX_CMDS }
--
1.7.10.4
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^ permalink raw reply related
* [PATCH 3/9] ARM: remove board linker script option
From: Sascha Hauer @ 2012-07-19 8:12 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342685582-13244-1-git-send-email-s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/Kconfig | 12 ------------
arch/arm/Makefile | 3 +--
arch/arm/lib/Makefile | 3 +--
3 files changed, 2 insertions(+), 16 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index af4cb59..d988455 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,15 +1,3 @@
-#
-#
-#
-config BOARD_LINKER_SCRIPT
- bool
- default n
-
-config GENERIC_LINKER_SCRIPT
- bool
- default y
- depends on !BOARD_LINKER_SCRIPT
-
config ARM
bool
select HAS_KALLSYMS
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1225df7..cbbc0a0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -207,7 +207,6 @@ endif
common-y += $(BOARD) $(MACH)
common-y += arch/arm/lib/ arch/arm/cpu/
-lds-$(CONFIG_GENERIC_LINKER_SCRIPT) := arch/arm/lib/barebox.lds
-lds-$(CONFIG_BOARD_LINKER_SCRIPT) := $(BOARD)/barebox.lds
+lds-y := arch/arm/lib/barebox.lds
CLEAN_FILES += include/generated/mach-types.h arch/arm/lib/barebox.lds
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 27a4b88..1eaf474 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -20,5 +20,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memcpy.o
obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memset.o
obj-$(CONFIG_ARM_UNWIND) += unwind.o
obj-$(CONFIG_MODULES) += module.o
-extra-$(CONFIG_GENERIC_LINKER_SCRIPT) += barebox.lds
-
+extra-y += barebox.lds
--
1.7.10.4
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^ permalink raw reply related
* [PATCH 2/3 v2] gpmc: Add reset to gpmc_generic_init
From: Jan Weitzel @ 2012-07-19 7:58 UTC (permalink / raw)
To: barebox
In-Reply-To: <20120718221003.GR30009@pengutronix.de>
Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
---
v2: fix timeout endless loop
arch/arm/mach-omap/gpmc.c | 12 +++++++++++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..b3fa56c 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
+#include <clock.h>
#include <init.h>
#include <io.h>
#include <mach/silicon.h>
@@ -48,13 +49,22 @@
*/
void gpmc_generic_init(unsigned int cfg)
{
+ uint64_t start;
unsigned int reg = GPMC_REG(CONFIG7_0);
char x = 0;
debug("gpmccfg=%x\n", cfg);
/* Generic Configurations */
+ /* reset gpmc */
+ start = get_time_ns();
/* No idle, L3 clock free running */
- writel(0x10, GPMC_REG(SYS_CONFIG));
+ writel(0x12, GPMC_REG(SYS_CONFIG));
+ while (!readl(GPMC_REG(SYS_STATUS)))
+ if (is_timeout(start, MSECOND)) {
+ printf("timeout on gpmc reset\n");
+ break;
+ }
+
/* No Timeout */
writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
/* No IRQs */
--
1.7.0.4
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^ permalink raw reply related
* [PATCH 1/3 v2] OMAP GPMC NAND: use buswidth from GPMC
From: Jan Weitzel @ 2012-07-19 7:54 UTC (permalink / raw)
To: barebox
In-Reply-To: <20120718221127.GS30009@pengutronix.de>
GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.
If gpmc register isn't configured for NAND, fallback to 8bit by gpmc reset
state.
Use autodetect on pcm049
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
---
v2: Update commit message
arch/arm/boards/pcm049/board.c | 4 ++--
arch/arm/mach-omap/devices-gpmc-nand.c | 23 ++++++++++++++++++-----
arch/arm/mach-omap/gpmc.c | 19 +++++++++++++++++++
arch/arm/mach-omap/include/mach/gpmc.h | 8 ++++++++
4 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
pcm049_network_init();
- gpmc_generic_nand_devices_init(0, 8,
+ /* Autodetect buswidth*/
+ gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
-
#ifdef CONFIG_PARTITION
devfs_add_partition("nand0", 0x00000, SZ_128K,
DEVFS_PARTITION_FIXED, "xload_raw");
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
#include <mach/silicon.h>
#include <mach/gpmc.h>
#include <mach/gpmc_nand.h>
-
-#define GPMC_CONF1_VALx8 0x00000800
-#define GPMC_CONF1_VALx16 0x00001800
+#include <mach/xload.h>
/** NAND platform specific settings settings */
static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
*
* @return success/fail based on device function
*/
+
int gpmc_generic_nand_devices_init(int cs, int width,
enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
{
nand_plat.cs = cs;
+ if (width == 0) {
+ struct gpmc_config cfg;
+ /* try to get buswidth from gpmc */
+ gpmc_get_config(cs, &cfg);
+ width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+ if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
+ debug("GPMC not configured for NAND, "
+ "try width %d bit\n", width);
+
+ debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
+ }
+
if (width == 16)
- nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
+ nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+ GPMC_CONFIG1_DEVICESIZE_16;
else
- nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
+ nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
nand_plat.device_width = width;
nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
mdelay(1); /* Settling time */
}
EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+ unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+ unsigned int cfg7;
+ unsigned char i;
+
+ /* Read the CFG1-6 regs */
+ for (i = 0; i < 6; i++) {
+ config->cfg[i] = readl(reg);
+ reg += GPMC_CONFIG_REG_OFF;
+ }
+
+ cfg7 = readl(reg);
+
+ config->size = (cfg7 >> 8) & 0xf;
+ config->base = (cfg7 & 0x3F) << 24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
#define NAND_WP_BIT 0x00000010
+#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12)
+#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
+
#ifndef __ASSEMBLY__
/** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
/** Configuration for a specific chip select */
void gpmc_cs_config(char cs, struct gpmc_config *config);
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
#endif
#endif /* __ASM_ARCH_OMAP_GPMC_H */
--
1.7.0.4
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^ permalink raw reply related
* Re: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
From: Sascha Hauer @ 2012-07-18 22:11 UTC (permalink / raw)
To: Jan Weitzel; +Cc: barebox
In-Reply-To: <1342615033-3232-2-git-send-email-j.weitzel@phytec.de>
Hi Jan,
On Wed, Jul 18, 2012 at 02:37:11PM +0200, Jan Weitzel wrote:
> GPMC could be already configured by xloader or rom bootloader
> Use the configured buswidth (width == 0) or set it explicit in the board file.
What happens if it hasn't been configured by the ROM or xloader, for
example when booting from MMC?
Sascha
>
> Use autodetect on pcm049
>
> Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
> ---
> arch/arm/boards/pcm049/board.c | 4 ++--
> arch/arm/mach-omap/devices-gpmc-nand.c | 23 ++++++++++++++++++-----
> arch/arm/mach-omap/gpmc.c | 19 +++++++++++++++++++
> arch/arm/mach-omap/include/mach/gpmc.h | 8 ++++++++
> 4 files changed, 47 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> index 3a2b574..4f056e0 100644
> --- a/arch/arm/boards/pcm049/board.c
> +++ b/arch/arm/boards/pcm049/board.c
> @@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
>
> pcm049_network_init();
>
> - gpmc_generic_nand_devices_init(0, 8,
> + /* Autodetect buswidth*/
> + gpmc_generic_nand_devices_init(0, 0,
> OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
> -
> #ifdef CONFIG_PARTITION
> devfs_add_partition("nand0", 0x00000, SZ_128K,
> DEVFS_PARTITION_FIXED, "xload_raw");
> diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
> index cf87b57..06f9576 100644
> --- a/arch/arm/mach-omap/devices-gpmc-nand.c
> +++ b/arch/arm/mach-omap/devices-gpmc-nand.c
> @@ -35,9 +35,7 @@
> #include <mach/silicon.h>
> #include <mach/gpmc.h>
> #include <mach/gpmc_nand.h>
> -
> -#define GPMC_CONF1_VALx8 0x00000800
> -#define GPMC_CONF1_VALx16 0x00001800
> +#include <mach/xload.h>
>
> /** NAND platform specific settings settings */
> static struct gpmc_nand_platform_data nand_plat = {
> @@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
> *
> * @return success/fail based on device function
> */
> +
> int gpmc_generic_nand_devices_init(int cs, int width,
> enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
> {
> nand_plat.cs = cs;
>
> + if (width == 0) {
> + struct gpmc_config cfg;
> + /* try to get buswidth from gpmc */
> + gpmc_get_config(cs, &cfg);
> + width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
> +
> + if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
> + debug("GPMC not configured for NAND, "
> + "try width %d bit\n", width);
> +
> + debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
> + }
> +
> if (width == 16)
> - nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
> + nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
> + GPMC_CONFIG1_DEVICESIZE_16;
> else
> - nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
> + nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
>
> nand_plat.device_width = width;
> nand_plat.ecc_mode = eccmode;
> diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> index e8946d7..399f68a 100644
> --- a/arch/arm/mach-omap/gpmc.c
> +++ b/arch/arm/mach-omap/gpmc.c
> @@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
> mdelay(1); /* Settling time */
> }
> EXPORT_SYMBOL(gpmc_cs_config);
> +
> +void gpmc_get_config(char cs, struct gpmc_config *config)
> +{
> + unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
> + unsigned int cfg7;
> + unsigned char i;
> +
> + /* Read the CFG1-6 regs */
> + for (i = 0; i < 6; i++) {
> + config->cfg[i] = readl(reg);
> + reg += GPMC_CONFIG_REG_OFF;
> + }
> +
> + cfg7 = readl(reg);
> +
> + config->size = (cfg7 >> 8) & 0xf;
> + config->base = (cfg7 & 0x3F) << 24;
> +}
> +EXPORT_SYMBOL(gpmc_get_config);
> diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
> index 3ddc5f5..84260fc 100644
> --- a/arch/arm/mach-omap/include/mach/gpmc.h
> +++ b/arch/arm/mach-omap/include/mach/gpmc.h
> @@ -140,6 +140,11 @@
>
> #define NAND_WP_BIT 0x00000010
>
> +#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12)
> +#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
> +#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
> +#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
> +
> #ifndef __ASSEMBLY__
>
> /** Generic GPMC configuration structure to be used to configure a
> @@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
> /** Configuration for a specific chip select */
> void gpmc_cs_config(char cs, struct gpmc_config *config);
>
> +/** Get Configuration for a specific chip select */
> +void gpmc_get_config(char cs, struct gpmc_config *config);
> +
> #endif
>
> #endif /* __ASM_ARCH_OMAP_GPMC_H */
> --
> 1.7.0.4
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply
* Re: [PATCH 2/3] gpmc: Add reset to gpmc_generic_init
From: Sascha Hauer @ 2012-07-18 22:10 UTC (permalink / raw)
To: Jan Weitzel; +Cc: barebox
In-Reply-To: <1342615033-3232-3-git-send-email-j.weitzel@phytec.de>
Hi Jan,
On Wed, Jul 18, 2012 at 02:37:12PM +0200, Jan Weitzel wrote:
> Add reset to gpmc_generic_init as proposed by TRM.
> This also fixes some strange timing issue while GPMC Initialization for
> NAND OMAP4460
>
> Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
> ---
> arch/arm/mach-omap/gpmc.c | 10 +++++++++-
> 1 files changed, 9 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
> index 399f68a..4649a1d 100644
> --- a/arch/arm/mach-omap/gpmc.c
> +++ b/arch/arm/mach-omap/gpmc.c
> @@ -28,6 +28,7 @@
> * MA 02111-1307 USA
> */
> #include <common.h>
> +#include <clock.h>
> #include <init.h>
> #include <io.h>
> #include <mach/silicon.h>
> @@ -48,13 +49,20 @@
> */
> void gpmc_generic_init(unsigned int cfg)
> {
> + uint64_t start;
> unsigned int reg = GPMC_REG(CONFIG7_0);
> char x = 0;
>
> debug("gpmccfg=%x\n", cfg);
> /* Generic Configurations */
> + /* reset gpmc */
> + start = get_time_ns();
> /* No idle, L3 clock free running */
> - writel(0x10, GPMC_REG(SYS_CONFIG));
> + writel(0x12, GPMC_REG(SYS_CONFIG));
> + while (!readl(GPMC_REG(SYS_STATUS)))
> + if (is_timeout(start, MSECOND))
> + printf("timeout on gpmc reset\n");
This will hang forever in the printk on timeout.
Sascha
--
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^ permalink raw reply
* Re: AT91SAM9263-EK
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-07-18 16:38 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Stutz Sven
In-Reply-To: <20120718150616.GK30009@pengutronix.de>
On 17:06 Wed 18 Jul , Sascha Hauer wrote:
> Hi Sven,
>
> On Wed, Jul 18, 2012 at 11:44:29AM +0200, Stutz Sven wrote:
> >
> > Hello Sascha,
> >
> > thanks a lot for your help.
> >
> > When I completely switch off the ecc, Barebox is loading the Linux kernel.
> > But I guess that the ecc is necessary especially for NAND-Flash devices.
>
> Indeed. You shouldn't use NAND without ecc.
>
> >
> >
> > The AT91SAM9263 controller has a ecc unit implemented. There are
> > three registers and the error calculation is done automatically,
> > only the error correction must be done in software.
> > Or is it better to you use the software ecc and I should try to fix
> > the software problem?
>
> If possible you should use hardware ecc. It may be though that it has
> bugs that force you to use software ecc, but I'm not familiar with the
> atmel hardware.
the hw ecc work on 9263 but we do not use it on the kernel
>
> > Can you give me some hints to fix this problem?
>
> Does it work in the kernel? If yes, try looking for differences. The
> NAND layers are sufficiently similar.
the drivers as the same on both barebox and linux
>
> >
> > Btw. I have found the description table for the NAND devices. But
> > what would happen if I change the connections between the controller
> > and the NAND-Flash, where are those port description stored or the
> > timings to access the data bus?
smc
Best Regards,
J.
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^ permalink raw reply
* Re: AT91SAM9263-EK
From: Sascha Hauer @ 2012-07-18 15:06 UTC (permalink / raw)
To: Stutz Sven; +Cc: barebox
In-Reply-To: <5006857D.4020505@web.de>
Hi Sven,
On Wed, Jul 18, 2012 at 11:44:29AM +0200, Stutz Sven wrote:
>
> Hello Sascha,
>
> thanks a lot for your help.
>
> When I completely switch off the ecc, Barebox is loading the Linux kernel.
> But I guess that the ecc is necessary especially for NAND-Flash devices.
Indeed. You shouldn't use NAND without ecc.
>
>
> The AT91SAM9263 controller has a ecc unit implemented. There are
> three registers and the error calculation is done automatically,
> only the error correction must be done in software.
> Or is it better to you use the software ecc and I should try to fix
> the software problem?
If possible you should use hardware ecc. It may be though that it has
bugs that force you to use software ecc, but I'm not familiar with the
atmel hardware.
> Can you give me some hints to fix this problem?
Does it work in the kernel? If yes, try looking for differences. The
NAND layers are sufficiently similar.
>
> Btw. I have found the description table for the NAND devices. But
> what would happen if I change the connections between the controller
> and the NAND-Flash, where are those port description stored or the
> timings to access the data bus?
I have no idea.
Sascha
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^ permalink raw reply
* Re: [PATCHv5] Enable a way to provide the reason for "being here"
From: Sascha Hauer @ 2012-07-18 14:22 UTC (permalink / raw)
To: Juergen Beisert; +Cc: barebox
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
On Wed, Jul 18, 2012 at 10:46:46AM +0200, Juergen Beisert wrote:
> Many architectures support a way to detect why the bootloader is running.
> This patch adds a global variable to be able to use the cause in some kind of
> shell code to do special things on demand. For example to do an emergency boot,
> when the last boot fails and the watchdog reactivates the hanging system.
>
> V2 includes Marc's suggesion.
> V3 includes the detection for the i.MX28 SoC and fixes its usage for other
> i.MX SoCs.
> V4 includes Marc's recent suggestion.
> V5 includes Sascha's comments.
>
> Comments are still welcome.
>
Applied, thanks
Sascha
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* [PATCH] phyCARD-A-L1: Create xload configuration.
From: Juergen Kilb @ 2012-07-18 12:58 UTC (permalink / raw)
To: barebox; +Cc: Juergen Kilb
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
This configuration can be used to use barebox as
x-loader replacement.
Also the ECC-Mode is changed from SOFT to BCH8.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
---
arch/arm/boards/phycard-a-l1/pca-a-l1.c | 10 ++----
arch/arm/configs/phycard_a_l1_xload_defconfig | 43 +++++++++++++++++++++++++
arch/arm/mach-omap/Kconfig | 1 +
3 files changed, 47 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/configs/phycard_a_l1_xload_defconfig
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 8fae405..a388f63 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -312,6 +312,7 @@ struct omap_hsmmc_platform_data pcaal1_hsmmc_plat = {
static int pcaal1_init_devices(void)
{
+ gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_BCH8_CODE_HW, &omap3_nand_cfg);
#ifdef CONFIG_MCI_OMAP_HSMMC
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
IORESOURCE_MEM, &pcaal1_hsmmc_plat);
@@ -332,12 +333,7 @@ device_initcall(pcaal1_init_devices);
static int pcaal1_late_init(void)
{
- struct device_d *nand;
-
- gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_SOFT, &omap3_nand_cfg);
-
- nand = get_device_by_name("nand0");
-
+#ifdef CONFIG_PARTITION
devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "x-loader");
dev_add_bb_dev("self_raw", "x_loader0");
@@ -346,7 +342,7 @@ static int pcaal1_late_init(void)
devfs_add_partition("nand0", 0x260000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
-
+#endif
return 0;
}
late_initcall(pcaal1_late_init);
diff --git a/arch/arm/configs/phycard_a_l1_xload_defconfig b/arch/arm/configs/phycard_a_l1_xload_defconfig
new file mode 100644
index 0000000..30253cb
--- /dev/null
+++ b/arch/arm/configs/phycard_a_l1_xload_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARCH_OMAP=y
+CONFIG_OMAP_BUILD_IFT=y
+CONFIG_MACH_PCAAL1=y
+CONFIG_AEABI=y
+CONFIG_THUMB2_BAREBOX=y
+# CONFIG_CMD_ARM_CPUINFO is not set
+# CONFIG_ARM_EXCEPTIONS is not set
+CONFIG_ENVIRONMENT_VARIABLES=y
+CONFIG_TEXT_BASE=0x40200000
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x0000f000
+CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x0000f000
+CONFIG_MEMORY_LAYOUT_FIXED=y
+CONFIG_STACK_BASE=0x4020F000
+CONFIG_STACK_SIZE=0xc00
+CONFIG_MALLOC_BASE=0x84000000
+CONFIG_MALLOC_SIZE=0x1000000
+CONFIG_MALLOC_DUMMY=y
+CONFIG_PROMPT="X-load pca-a-l1>"
+CONFIG_CBSIZE=128
+CONFIG_SHELL_NONE=y
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_TIMESTAMP is not set
+# CONFIG_CONSOLE_FULL is not set
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
+# CONFIG_SPI is not set
+CONFIG_MTD=y
+# CONFIG_MTD_WRITE is not set
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_NAND=y
+# CONFIG_NAND_ECC_SOFT is not set
+# CONFIG_NAND_ECC_HW_SYNDROME is not set
+# CONFIG_NAND_ECC_HW_NONE is not set
+# CONFIG_NAND_BBT is not set
+CONFIG_NAND_OMAP_GPMC=y
+CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
+# CONFIG_MCI_WRITE is not set
+CONFIG_MCI_OMAP_HSMMC=y
+# CONFIG_FS_RAMFS is not set
+# CONFIG_FS_DEVFS is not set
+CONFIG_FS_FAT=y
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 386c484..d735284 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -151,6 +151,7 @@ config MACH_PCM049
config MACH_PCAAL1
bool "Phytec phyCARD-A-L1"
select OMAP_CLOCK_ALL
+ select HAVE_NOSHELL
depends on ARCH_OMAP3
help
Say Y here if you are using a phyCARD-A-L1 PCA-A-L1
--
1.7.0.4
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* [PATCH] pca-a-l1: added memory device for int. 60kB RAM.
From: Juergen Kilb @ 2012-07-18 12:58 UTC (permalink / raw)
To: barebox; +Cc: Juergen Kilb
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
---
arch/arm/boards/phycard-a-l1/pca-a-l1.c | 2 ++
arch/arm/mach-omap/include/mach/omap3-silicon.h | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 1cc2815..8fae405 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -292,6 +292,8 @@ static int pcaal1_mem_init(void)
*/
gpmc_generic_init(0x10);
#endif
+ add_mem_device("sram0", OMAP_SRAM_BASE, 60 * SZ_1K,
+ IORESOURCE_MEM_WRITEABLE);
arm_add_mem_device("ram0", OMAP_SDRC_CS0, get_sdr_cs_size(SDRC_CS0_OSET));
diff --git a/arch/arm/mach-omap/include/mach/omap3-silicon.h b/arch/arm/mach-omap/include/mach/omap3-silicon.h
index 361d25e..e4002e6 100644
--- a/arch/arm/mach-omap/include/mach/omap3-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap3-silicon.h
@@ -107,6 +107,7 @@
#define OMAP_EHCI_BASE (OMAP_L4_CORE_BASE + 0x64800)
/** Interrupt Vector base address */
+#define OMAP_SRAM_BASE 0x40200000
#define OMAP_SRAM_INTVECT 0x4020F800
#define OMAP_SRAM_INTVECT_COPYSIZE 0x64
/** Temporary stack for us to use C calls in low_level_init */
--
1.7.0.4
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* [PATCH] omap_hsmmc: Hack allert! Add delay in omap_hsmmc.
From: Juergen Kilb @ 2012-07-18 12:58 UTC (permalink / raw)
To: barebox; +Cc: Juergen Kilb
In-Reply-To: <1342616327-2765-1-git-send-email-J.Kilb@phytec.de>
Most of the time, a SD card was not found during probing.
This hack fixed the problem.
Further investigation needed !!
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
---
drivers/mci/omap_hsmmc.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mci/omap_hsmmc.c b/drivers/mci/omap_hsmmc.c
index e0b245b..125e8a4 100644
--- a/drivers/mci/omap_hsmmc.c
+++ b/drivers/mci/omap_hsmmc.c
@@ -472,6 +472,8 @@ static int mmc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
writel(cmd->cmdarg, &mmc_base->arg);
writel((cmd->cmdidx << 24) | flags, &mmc_base->cmd);
+ mdelay(5); /* wait 5 ms */
+
start = get_time_ns();
do {
mmc_stat = readl(&mmc_base->stat);
--
1.7.0.4
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* [PATCH] Added SDR-size auto detection.
From: Juergen Kilb @ 2012-07-18 12:58 UTC (permalink / raw)
To: barebox; +Cc: Juergen Kilb
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
---
arch/arm/boards/phycard-a-l1/pca-a-l1.c | 169 +++++++++++++++++++++++--------
1 files changed, 125 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index a388f63..1dc7678 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -73,10 +73,82 @@
#define SMC911X_BASE 0x2c000000
+/* Slower full frequency range default timings for x32 operation */
+#define SDP_SDRC_SHARING 0x00000100
+/* Diabling power down mode using CKE pin */
+#define SDP_SDRC_POWER_POP 0x00000081
+/* rkw - need to find of 90/72 degree recommendation for speed like before. */
+#define SDP_SDRC_DLLAB_CTRL ((DLL_ENADLL << 3) | \
+ (DLL_LOCKDLL << 2) | (DLL_DLLPHASE_90 << 1))
+
+/* used to create an array of memory configuartions. */
+struct sdrc_config {
+ u32 cs_cfg;
+ u32 mcfg;
+ u32 mr;
+ u32 actim_ctrla;
+ u32 actim_ctrlb;
+ u32 rfr_ctrl;
+} const sdrc_config[] = {
+/* max cs_size for autodetection, common timing */
+/* 2x256MByte, 14 Rows, 10 Columns , RBC (BAL=2) */
+{ 0x00000004, 0x03590099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
+/* MT46H32M32LF 2x128MByte, 13 Rows, 10 Columns */
+{ 0x00000001, 0x02584099, 0x00000032, 0x9A9DB4C6, 0x00011216, 0x0004e201},
+/* MT46H64M32LF 1x256MByte, 14 Rows, 10 Columns */
+{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
+/* MT64H128M32L2 2x256MByte, 14 Rows, 10 Columns */
+{ 0x00000002, 0x03588099, 0x00000032, 0x629DB4C6, 0x00011113, 0x0004e201},
+};
+
/*
* Boot-time initialization(s)
*/
+/*********************************************************************
+ * init_sdram_ddr() - Init DDR controller.
+ *********************************************************************/
+void init_sdram_ddr(void)
+{
+ /* reset sdrc controller */
+ writel(SOFTRESET, SDRC_REG(SYSCONFIG));
+ wait_on_value(1<<0, 1<<0, SDRC_REG(STATUS), 12000000);
+ writel(0, SDRC_REG(SYSCONFIG));
+
+ /* setup sdrc to ball mux */
+ writel(SDP_SDRC_SHARING, SDRC_REG(SHARING));
+ writel(SDP_SDRC_POWER_POP, SDRC_REG(POWER));
+
+ /* set up dll */
+ writel(SDP_SDRC_DLLAB_CTRL, SDRC_REG(DLLA_CTRL));
+ sdelay(0x2000); /* give time to lock */
+
+}
+/*********************************************************************
+ * config_sdram_ddr() - Init DDR on dev board.
+ *********************************************************************/
+void config_sdram_ddr(u8 cs, u8 cfg)
+{
+
+ writel(sdrc_config[cfg].mcfg, SDRC_REG(MCFG_0) + (0x30 * cs));
+ writel(sdrc_config[cfg].actim_ctrla, SDRC_REG(ACTIM_CTRLA_0) + (0x28 * cs));
+ writel(sdrc_config[cfg].actim_ctrlb, SDRC_REG(ACTIM_CTRLB_0) + (0x28 * cs));
+ writel(sdrc_config[cfg].rfr_ctrl, SDRC_REG(RFR_CTRL_0) + (0x30 * cs));
+
+ writel(CMD_NOP, SDRC_REG(MANUAL_0) + (0x30 * cs));
+
+ sdelay(5000);
+
+ writel(CMD_PRECHARGE, SDRC_REG(MANUAL_0) + (0x30 * cs));
+ writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
+ writel(CMD_AUTOREFRESH, SDRC_REG(MANUAL_0) + (0x30 * cs));
+
+ /* set mr0 */
+ writel(sdrc_config[cfg].mr, SDRC_REG(MR_0) + (0x30 * cs));
+
+ sdelay(2000);
+}
+
/**
* @brief Initialize the SDRC module
* Initialisation for 1x256MByte but normally
@@ -85,49 +157,55 @@
*/
static void pcaal1_sdrc_init(void)
{
- /* SDRAM software reset */
- /* No idle ack and RESET enable */
- writel(0x1A, SDRC_REG(SYSCONFIG));
- sdelay(100);
- /* No idle ack and RESET disable */
- writel(0x18, SDRC_REG(SYSCONFIG));
-
- /* SDRC Sharing register */
- /* 32-bit SDRAM on data lane [31:0] - CS0 */
- /* pin tri-stated = 1 */
- writel(0x00000100, SDRC_REG(SHARING));
-
- /* ----- SDRC Registers Configuration --------- */
- /* SDRC_MCFG0 register */
- writel(0x03588099, SDRC_REG(MCFG_0));
-
- /* SDRC_RFR_CTRL0 register */
- writel(0x0004e201, SDRC_REG(RFR_CTRL_0));
-
- /* SDRC_ACTIM_CTRLA0 register */
- writel(0x629DB4C6, SDRC_REG(ACTIM_CTRLA_0));
-
- /* SDRC_ACTIM_CTRLB0 register */
- writel(0x00011113, SDRC_REG(ACTIM_CTRLB_0));
-
- /* Disble Power Down of CKE due to 1 CKE on combo part */
- writel(0x00000081, SDRC_REG(POWER));
-
- /* SDRC_MANUAL command register */
- /* NOP command */
- writel(0x00000000, SDRC_REG(MANUAL_0));
- /* Precharge command */
- writel(0x00000001, SDRC_REG(MANUAL_0));
- /* Auto-refresh command */
- writel(0x00000002, SDRC_REG(MANUAL_0));
- /* Auto-refresh command */
- writel(0x00000002, SDRC_REG(MANUAL_0));
-
- /* SDRC MR0 register Burst length=4 */
- writel(0x00000032, SDRC_REG(MR_0));
-
- /* SDRC DLLA control register */
- writel(0x0000000A, SDRC_REG(DLLA_CTRL));
+ u32 test0, test1;
+ char cfg;
+
+ init_sdram_ddr();
+
+ config_sdram_ddr(0, 0); /* 256MByte at CS0 */
+ config_sdram_ddr(1, 0); /* 256MByte at CS1 */
+
+ test0 = get_ram_size((long *) 0x80000000, SZ_256M);
+ test1 = get_ram_size((long *) 0xA0000000, SZ_256M);
+
+ /* mask out lower nible, its not tested with
+ in common/memsize.c */
+ test1 &= 0xfffffff0;
+
+ if ((test1 > 0) && (test1 != test0))
+ hang();
+
+ cfg = -1; /* illegal configuration found */
+
+ if (test1 == 0) {
+ init_sdram_ddr();
+ writel((sdrc_config[(uchar) cfg].mcfg & 0xfffc00ff), SDRC_REG(MCFG_1));
+
+ /* 1 x 256MByte */
+ if (test0 == SZ_256M)
+ cfg = 2;
+
+ if (cfg != -1) {
+ config_sdram_ddr(0, cfg);
+ writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
+ }
+ return;
+ }
+
+ /* reinit both cs with correct size */
+ /* 2 x 128MByte */
+ if (test0 == SZ_128M)
+ cfg = 1;
+ /* 2 x 256MByte */
+ if (test0 == SZ_256M)
+ cfg = 3;
+
+ if (cfg != -1) {
+ init_sdram_ddr();
+ writel(sdrc_config[(uchar) cfg].cs_cfg, SDRC_REG(CS_CFG));
+ config_sdram_ddr(0, cfg);
+ config_sdram_ddr(1, cfg);
+ }
}
/**
@@ -296,9 +374,12 @@ static int pcaal1_mem_init(void)
IORESOURCE_MEM_WRITEABLE);
arm_add_mem_device("ram0", OMAP_SDRC_CS0, get_sdr_cs_size(SDRC_CS0_OSET));
+ printf("found %s at SDCS0\n", size_human_readable(get_sdr_cs_size(SDRC_CS0_OSET)));
- if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0))
+ if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0)) {
arm_add_mem_device("ram1", get_sdr_cs1_base(), get_sdr_cs_size(SDRC_CS1_OSET));
+ printf("found %s at SDCS1\n", size_human_readable(get_sdr_cs_size(SDRC_CS1_OSET)));
+ }
return 0;
}
--
1.7.0.4
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* [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC
From: Jan Weitzel @ 2012-07-18 12:37 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.
Use autodetect on pcm049
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
---
arch/arm/boards/pcm049/board.c | 4 ++--
arch/arm/mach-omap/devices-gpmc-nand.c | 23 ++++++++++++++++++-----
arch/arm/mach-omap/gpmc.c | 19 +++++++++++++++++++
arch/arm/mach-omap/include/mach/gpmc.h | 8 ++++++++
4 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
pcm049_network_init();
- gpmc_generic_nand_devices_init(0, 8,
+ /* Autodetect buswidth*/
+ gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
-
#ifdef CONFIG_PARTITION
devfs_add_partition("nand0", 0x00000, SZ_128K,
DEVFS_PARTITION_FIXED, "xload_raw");
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
#include <mach/silicon.h>
#include <mach/gpmc.h>
#include <mach/gpmc_nand.h>
-
-#define GPMC_CONF1_VALx8 0x00000800
-#define GPMC_CONF1_VALx16 0x00001800
+#include <mach/xload.h>
/** NAND platform specific settings settings */
static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
*
* @return success/fail based on device function
*/
+
int gpmc_generic_nand_devices_init(int cs, int width,
enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
{
nand_plat.cs = cs;
+ if (width == 0) {
+ struct gpmc_config cfg;
+ /* try to get buswidth from gpmc */
+ gpmc_get_config(cs, &cfg);
+ width = (cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+ if (!(cfg.cfg[0] & GPMC_CONFIG1_DEVICETYPE_NAND))
+ debug("GPMC not configured for NAND, "
+ "try width %d bit\n", width);
+
+ debug("%s cfg0 %x width %d\n", __func__, cfg.cfg[0], width);
+ }
+
if (width == 16)
- nand_cfg->cfg[0] = GPMC_CONF1_VALx16;
+ nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+ GPMC_CONFIG1_DEVICESIZE_16;
else
- nand_cfg->cfg[0] = GPMC_CONF1_VALx8;
+ nand_cfg->cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
nand_plat.device_width = width;
nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
mdelay(1); /* Settling time */
}
EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+ unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+ unsigned int cfg7;
+ unsigned char i;
+
+ /* Read the CFG1-6 regs */
+ for (i = 0; i < 6; i++) {
+ config->cfg[i] = readl(reg);
+ reg += GPMC_CONFIG_REG_OFF;
+ }
+
+ cfg7 = readl(reg);
+
+ config->size = (cfg7 >> 8) & 0xf;
+ config->base = (cfg7 & 0x3F) << 24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
#define NAND_WP_BIT 0x00000010
+#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12)
+#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(2)
+
#ifndef __ASSEMBLY__
/** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
/** Configuration for a specific chip select */
void gpmc_cs_config(char cs, struct gpmc_config *config);
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
#endif
#endif /* __ASM_ARCH_OMAP_GPMC_H */
--
1.7.0.4
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* [PATCH 0/3] omap gpmc nand autodetect
From: Jan Weitzel @ 2012-07-18 12:37 UTC (permalink / raw)
To: barebox
Jan Weitzel (3):
OMAP GPMC NAND: use buswidth from GPMC
gpmc: Add reset to gpmc_generic_init
mtd omap nand: reconfigure buswidth
arch/arm/boards/pcm049/board.c | 4 ++--
arch/arm/mach-omap/devices-gpmc-nand.c | 23 ++++++++++++++++++-----
arch/arm/mach-omap/gpmc.c | 29 ++++++++++++++++++++++++++++-
arch/arm/mach-omap/include/mach/gpmc.h | 8 ++++++++
drivers/mtd/nand/nand_omap_gpmc.c | 30 ++++++++++++++++++++++++++++--
5 files changed, 84 insertions(+), 10 deletions(-)
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^ permalink raw reply
* [RFC 3/3] mtd omap nand: reconfigure buswidth
From: Jan Weitzel @ 2012-07-18 12:37 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
If nand_scan_ident fail try to reconfigure buswidth from 8bit to 16bit or
the other way around.
There are still the ugly debug messages like:
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xb3 (Micron NAND 1GiB 1,8V 16-bit)
NAND bus width 8 instead 16 bit
No NAND device found (-22)!
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xb3 (Micron NAND 1GiB 1,8V 16-bit)
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
---
drivers/mtd/nand/nand_omap_gpmc.c | 30 ++++++++++++++++++++++++++++--
1 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index d55dcaa..b80ac14 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -803,6 +803,27 @@ static int omap_gpmc_eccmode_set(struct device_d *dev, struct param_d *param, co
return omap_gpmc_eccmode(oinfo, i);
}
+void gpmc_reconfigure_buswidth(struct gpmc_nand_info *oinfo)
+{
+ struct nand_chip *nand = &oinfo->nand;
+ struct gpmc_config cfg;
+
+ gpmc_get_config(oinfo->gpmc_cs, &cfg);
+
+ if (nand->options & NAND_BUSWIDTH_16) {
+ cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
+ nand->options ^= NAND_BUSWIDTH_16;
+ } else {
+ cfg.cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+ GPMC_CONFIG1_DEVICESIZE_16;
+ nand->options |= NAND_BUSWIDTH_16;
+ }
+ debug("reconfigure buswidth to %d bit\n",
+ (nand->options & NAND_BUSWIDTH_16) ? 16 : 8);
+
+ gpmc_cs_config(oinfo->gpmc_cs, &cfg);
+}
+
/**
* @brief nand device probe.
*
@@ -924,8 +945,13 @@ static int gpmc_nand_probe(struct device_d *pdev)
/* first scan to find the device and get the page size */
if (nand_scan_ident(minfo, 1)) {
- err = -ENXIO;
- goto out_release_mem;
+ /* retry with changed buswidth*/
+ gpmc_reconfigure_buswidth(oinfo);
+
+ if (nand_scan_ident(minfo, 1)) {
+ err = -ENXIO;
+ goto out_release_mem;
+ }
}
switch (pdata->device_width) {
--
1.7.0.4
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^ permalink raw reply related
* [PATCH 2/3] gpmc: Add reset to gpmc_generic_init
From: Jan Weitzel @ 2012-07-18 12:37 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342615033-3232-1-git-send-email-j.weitzel@phytec.de>
Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
---
arch/arm/mach-omap/gpmc.c | 10 +++++++++-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..4649a1d 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
+#include <clock.h>
#include <init.h>
#include <io.h>
#include <mach/silicon.h>
@@ -48,13 +49,20 @@
*/
void gpmc_generic_init(unsigned int cfg)
{
+ uint64_t start;
unsigned int reg = GPMC_REG(CONFIG7_0);
char x = 0;
debug("gpmccfg=%x\n", cfg);
/* Generic Configurations */
+ /* reset gpmc */
+ start = get_time_ns();
/* No idle, L3 clock free running */
- writel(0x10, GPMC_REG(SYS_CONFIG));
+ writel(0x12, GPMC_REG(SYS_CONFIG));
+ while (!readl(GPMC_REG(SYS_STATUS)))
+ if (is_timeout(start, MSECOND))
+ printf("timeout on gpmc reset\n");
+
/* No Timeout */
writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
/* No IRQs */
--
1.7.0.4
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^ permalink raw reply related
* AT91SAM9263-EK
From: Stutz Sven @ 2012-07-18 9:44 UTC (permalink / raw)
To: barebox
In-Reply-To: <50065575.4090808@web.de>
Hello Sascha,
thanks a lot for your help.
When I completely switch off the ecc, Barebox is loading the Linux kernel.
But I guess that the ecc is necessary especially for NAND-Flash devices.
The AT91SAM9263 controller has a ecc unit implemented. There are three
registers and the error calculation is done automatically, only the
error correction must be done in software.
Or is it better to you use the software ecc and I should try to fix the
software problem?
Can you give me some hints to fix this problem?
Btw. I have found the description table for the NAND devices. But what
would happen if I change the connections between the controller and the
NAND-Flash, where are those port description stored or the timings to
access the data bus?
best regards Sven
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^ permalink raw reply
* Re: Board's naming style
From: Sascha Hauer @ 2012-07-18 9:01 UTC (permalink / raw)
To: Juergen Beisert; +Cc: barebox
In-Reply-To: <201207181053.29925.jbe@pengutronix.de>
On Wed, Jul 18, 2012 at 10:53:29AM +0200, Juergen Beisert wrote:
> Hi,
>
> a look into "arch/arm/boards/" offers various boards starting with the
> vendor's name in their directory name (eukrea/freescale).
> I would like to have the same for the FriendlyARM boards. Currently the
> Mini2440 and Tiny210 are part of the tree and I'm still working on the
> Mini6410 and Tiny6410 inclusion. Can we rename the currently existing
> Mini2440 and Tiny210 to friendlyarm-mini2440 and friendlyarm-tiny210?
Good idea.
>
> @Sascha: Do you need a patch for this?
Yes. Please generate the patches with -M to make the patches reviewable.
Sascha
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Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply
* Board's naming style
From: Juergen Beisert @ 2012-07-18 8:53 UTC (permalink / raw)
To: barebox
Hi,
a look into "arch/arm/boards/" offers various boards starting with the
vendor's name in their directory name (eukrea/freescale).
I would like to have the same for the FriendlyARM boards. Currently the
Mini2440 and Tiny210 are part of the tree and I'm still working on the
Mini6410 and Tiny6410 inclusion. Can we rename the currently existing
Mini2440 and Tiny210 to friendlyarm-mini2440 and friendlyarm-tiny210?
@Sascha: Do you need a patch for this?
Regards,
Juergen
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Linux Solutions for Science and Industry | http://www.pengutronix.de/ |
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* [PATCH 2/4] ARM/Samsung: add support to detect the reset source
From: Juergen Beisert @ 2012-07-18 8:46 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
---
arch/arm/mach-samsung/Makefile | 1 +
arch/arm/mach-samsung/reset_source.c | 56 ++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+)
create mode 100644 arch/arm/mach-samsung/reset_source.c
diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..f7db1f7 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,4 +1,5 @@
obj-y += s3c-timer.o generic.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
new file mode 100644
index 0000000..2456e3f
--- /dev/null
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/s3c-iomap.h>
+
+/* S3C2440 relevant */
+#define S3C2440_GSTATUS2 0xb4
+# define S3C2440_GSTATUS2_PWRST (1 << 0)
+# define S3C2440_GSTATUS2_SLEEPRST (1 << 1)
+# define S3C2440_GSTATUS2_WDRST (1 << 2)
+
+static int s3c_detect_reset_source(void)
+{
+ u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
+
+ if (reg & S3C2440_GSTATUS2_PWRST) {
+ set_reset_source(RESET_POR);
+ writel(S3C2440_GSTATUS2_PWRST,
+ S3C_GPIO_BASE + S3C2440_GSTATUS2);
+ return 0;
+ }
+
+ if (reg & S3C2440_GSTATUS2_SLEEPRST) {
+ set_reset_source(RESET_WKE);
+ writel(S3C2440_GSTATUS2_SLEEPRST,
+ S3C_GPIO_BASE + S3C2440_GSTATUS2);
+ return 0;
+ }
+
+ if (reg & S3C2440_GSTATUS2_WDRST) {
+ set_reset_source(RESET_WDG);
+ writel(S3C2440_GSTATUS2_WDRST,
+ S3C_GPIO_BASE + S3C2440_GSTATUS2);
+ return 0;
+ }
+
+ /* else keep the default 'unknown' state */
+ return 0;
+}
+
+device_initcall(s3c_detect_reset_source);
--
1.7.10.4
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* [PATCH 1/4] Enable a way to provide the reason for "being here"
From: Juergen Beisert @ 2012-07-18 8:46 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivate the hanging system.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
---
common/Kconfig | 8 ++++++++
common/Makefile | 1 +
common/reset_source.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
include/reset_source.h | 27 +++++++++++++++++++++++++++
4 files changed, 80 insertions(+)
create mode 100644 common/reset_source.c
create mode 100644 include/reset_source.h
diff --git a/common/Kconfig b/common/Kconfig
index 5fe997d..9652e5d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -554,6 +554,14 @@ config BAREBOXENV_TARGET
config POLLER
bool "generic polling infrastructure"
+config RESET_SOURCE
+ bool "detect Reset cause"
+ depends on GLOBALVAR
+ help
+ Provide a global variable at runtine which reflects the possible cause
+ of the reset and why the bootloader is currently running. It can be
+ useful for any kind of system recovery or repair.
+
endmenu
menu "Debugging "
diff --git a/common/Makefile b/common/Makefile
index d99dfa2..d74dffb 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -30,6 +30,7 @@ obj-y += startup.o
obj-y += misc.o
obj-y += memsize.o
obj-$(CONFIG_GLOBALVAR) += globalvar.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
obj-$(CONFIG_FILETYPE) += filetype.o
obj-y += resource.o
obj-$(CONFIG_MENU) += menu.o
diff --git a/common/reset_source.c b/common/reset_source.c
new file mode 100644
index 0000000..2a7f9ff
--- /dev/null
+++ b/common/reset_source.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <reset_source.h>
+
+static const char * const reset_src_names[] = {
+ [RESET_UKWN] = "unknown",
+ [RESET_POR] = "POR",
+ [RESET_RST] = "RST",
+ [RESET_WDG] = "WDG",
+ [RESET_WKE] = "WKE",
+ [RESET_JTAG] = "JTAG",
+};
+
+void set_reset_source(enum reset_src_type st)
+{
+ setenv("global.system.reset", reset_src_names[st]);
+}
+EXPORT_SYMBOL(set_reset_source);
+
+/* ensure this runs after the 'global' device is already registerd */
+static int init_reset_source(void)
+{
+ globalvar_add_simple("system.reset");
+ set_reset_source(RESET_UKWN);
+ return 0;
+}
+
+coredevice_initcall(init_reset_source);
diff --git a/include/reset_source.h b/include/reset_source.h
new file mode 100644
index 0000000..6734fbde
--- /dev/null
+++ b/include/reset_source.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_RESET_SOURCE_H
+# define __INCLUDE_RESET_SOURCE_H
+
+enum reset_src_type {
+ RESET_UKWN, /* maybe the SoC cannot detect the reset source */
+ RESET_POR, /* Power On Reset (cold start) */
+ RESET_RST, /* generic ReSeT (warm start) */
+ RESET_WDG, /* watchdog */
+ RESET_WKE, /* wake-up (some SoCs can handle this) */
+ RESET_JTAG, /* JTAG reset */
+};
+
+void set_reset_source(enum reset_src_type);
+
+#endif /* __INCLUDE_RESET_SOURCE_H */
--
1.7.10.4
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* [PATCH 3/4] ARM/i.MX: add support to detect the reset source
From: Juergen Beisert @ 2012-07-18 8:46 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
---
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mach-imx/reset_source.c | 72 ++++++++++++++++++++++++++++++++++++++
2 files changed, 73 insertions(+)
create mode 100644 arch/arm/mach-imx/reset_source.c
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 89a8946..2ff537a 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,4 +1,5 @@
obj-y += clocksource.o gpio.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
obj-$(CONFIG_ARCH_IMX1) += speed-imx1.o imx1.o iomux-v1.o
obj-$(CONFIG_ARCH_IMX25) += speed-imx25.o imx25.o iomux-v3.o
obj-$(CONFIG_ARCH_IMX21) += speed-imx21.o imx21.o iomux-v1.o
diff --git a/arch/arm/mach-imx/reset_source.c b/arch/arm/mach-imx/reset_source.c
new file mode 100644
index 0000000..e7b2a90
--- /dev/null
+++ b/arch/arm/mach-imx/reset_source.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/imx-regs.h>
+
+#ifdef CONFIG_ARCH_IMX1
+# define IMX_RESET_SRC_WDOG (1 << 1)
+# define IMX_RESET_SRC_HRDRESET (1 << 0)
+/* let the compiler sort out useless code on this arch */
+# define IMX_RESET_SRC_WARMSTART 0
+# define IMX_RESET_SRC_COLDSTART 0
+#else
+ /* WRSR checked for i.MX25, i.MX27, i.MX31, i.MX35 and i.MX51 */
+# define WDOG_WRSR 0x04
+ /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+# define IMX_RESET_SRC_WARMSTART (1 << 0)
+ /* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
+# define IMX_RESET_SRC_WDOG (1 << 1)
+ /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+# define IMX_RESET_SRC_HRDRESET (1 << 3)
+ /* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
+# define IMX_RESET_SRC_COLDSTART (1 << 4)
+#endif
+
+static unsigned read_detection_register(void)
+{
+#ifdef CONFIG_ARCH_IMX1
+ return readl(IMX_SYSCTRL_BASE);
+#else
+ return readw(IMX_WDT_BASE + WDOG_WRSR);
+#endif
+}
+
+static int imx_detect_reset_source(void)
+{
+ unsigned reg = read_detection_register();
+
+ if (reg & IMX_RESET_SRC_COLDSTART) {
+ set_reset_source(RESET_POR);
+ return 0;
+ }
+
+ if (reg & (IMX_RESET_SRC_HRDRESET | IMX_RESET_SRC_WARMSTART)) {
+ set_reset_source(RESET_RST);
+ return 0;
+ }
+
+ if (reg & IMX_RESET_SRC_WDOG) {
+ set_reset_source(RESET_WDG);
+ return 0;
+ }
+
+ /* else keep the default 'unknown' state */
+ return 0;
+}
+
+device_initcall(imx_detect_reset_source);
--
1.7.10.4
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* [PATCH 4/4] ARM/MXS: add reset cause detection
From: Juergen Beisert @ 2012-07-18 8:46 UTC (permalink / raw)
To: barebox
In-Reply-To: <1342601210-17849-1-git-send-email-jbe@pengutronix.de>
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
---
drivers/watchdog/im28wd.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/watchdog/im28wd.c b/drivers/watchdog/im28wd.c
index b016910..1f987de 100644
--- a/drivers/watchdog/im28wd.c
+++ b/drivers/watchdog/im28wd.c
@@ -21,6 +21,7 @@
#include <errno.h>
#include <malloc.h>
#include <watchdog.h>
+#include <reset_source.h>
#define MXS_RTC_CTRL 0x0
#define MXS_RTC_SET_ADDR 0x4
@@ -73,6 +74,27 @@ static int imx28_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
return 0;
}
+static void __maybe_unused imx28_detect_reset_source(const struct imx28_wd *p)
+{
+ u32 reg;
+
+ reg = readl(p->regs + MXS_RTC_PERSISTENT0);
+ if (reg & MXS_RTC_PERSISTENT0_EXT_RST) {
+ writel(MXS_RTC_PERSISTENT0_EXT_RST,
+ p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+ set_reset_source(RESET_POR);
+ return;
+ }
+ if (reg & MXS_RTC_PERSISTENT0_THM_RST) {
+ writel(MXS_RTC_PERSISTENT0_THM_RST,
+ p->regs + MXS_RTC_PERSISTENT0 + MXS_RTC_CLR_ADDR);
+ set_reset_source(RESET_RST);
+ return;
+ }
+
+ set_reset_source(RESET_RST);
+}
+
static int imx28_wd_probe(struct device_d *dev)
{
struct imx28_wd *priv;
@@ -94,6 +116,9 @@ static int imx28_wd_probe(struct device_d *dev)
if (rc != 0)
goto on_error;
+ if (IS_ENABLED(CONFIG_RESET_SOURCE))
+ imx28_detect_reset_source(priv);
+
dev->priv = priv;
return 0;
--
1.7.10.4
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* [PATCHv5] Enable a way to provide the reason for "being here"
From: Juergen Beisert @ 2012-07-18 8:46 UTC (permalink / raw)
To: barebox
Many architectures support a way to detect why the bootloader is running.
This patch adds a global variable to be able to use the cause in some kind of
shell code to do special things on demand. For example to do an emergency boot,
when the last boot fails and the watchdog reactivates the hanging system.
V2 includes Marc's suggesion.
V3 includes the detection for the i.MX28 SoC and fixes its usage for other
i.MX SoCs.
V4 includes Marc's recent suggestion.
V5 includes Sascha's comments.
Comments are still welcome.
Juergen
The following changes since commit 6e566b211351bba74d6118f983f5fcd29e78a5b6:
Merge branch 'for-next/imx-keypad' into next (2012-07-17 20:46:17 +0200)
are available in the git repository at:
git://git.pengutronix.de/git/jbe/barebox.git next_provide_reset_sourceV5
for you to fetch changes up to 92cc203ac2806fe0818d2aa4ad5bea04bdb4121b:
ARM/MXS: add reset cause detection (2012-07-18 10:40:22 +0200)
----------------------------------------------------------------
Juergen Beisert (4):
Enable a way to provide the reason for "being here"
ARM/Samsung: add support to detect the reset source
ARM/i.MX: add support to detect the reset source
ARM/MXS: add reset cause detection
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mach-imx/reset_source.c | 72 ++++++++++++++++++++++++++++++++++
arch/arm/mach-samsung/Makefile | 1 +
arch/arm/mach-samsung/reset_source.c | 56 ++++++++++++++++++++++++++
common/Kconfig | 8 ++++
common/Makefile | 1 +
common/reset_source.c | 44 +++++++++++++++++++++
drivers/watchdog/im28wd.c | 25 ++++++++++++
include/reset_source.h | 27 +++++++++++++
9 files changed, 235 insertions(+)
create mode 100644 arch/arm/mach-imx/reset_source.c
create mode 100644 arch/arm/mach-samsung/reset_source.c
create mode 100644 common/reset_source.c
create mode 100644 include/reset_source.h
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