* [PATCH 02/12] ARM: i.MX53 Vincell: Reset phy consistently from device tree
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The phy reset for the Vincell board is done from device tree whereas
the Vincell-LT resets the phy from board init code. Since both boards
share the same code base the regular Vincell board ends up with a
duplicated phy reset, with the second reset being done after the
FEC has been initialized.
Fix this by removing the phy reset from the board code and adding the
phy reset to the Vincell-LT dts file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/guf-vincell/board.c | 11 -----------
arch/arm/dts/imx53-guf-vincell-lt.dts | 1 +
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c
index 43c1952..ee5be10 100644
--- a/arch/arm/boards/guf-vincell/board.c
+++ b/arch/arm/boards/guf-vincell/board.c
@@ -29,15 +29,6 @@
#include <mach/bbu.h>
#include <mach/imx5.h>
-#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
-
-static void vincell_fec_reset(void)
-{
- gpio_direction_output(LOCO_FEC_PHY_RST, 0);
- mdelay(1);
- gpio_set_value(LOCO_FEC_PHY_RST, 1);
-}
-
static int vincell_devices_init(void)
{
if (!of_machine_is_compatible("guf,imx53-vincell") &&
@@ -49,8 +40,6 @@ static int vincell_devices_init(void)
clk_set_rate(clk_lookup("emi_slow_podf"), 133333334);
clk_set_rate(clk_lookup("nfc_podf"), 33333334);
- vincell_fec_reset();
-
imx53_bbu_internal_nand_register_handler("nand",
BBU_HANDLER_FLAG_DEFAULT, SZ_512K);
diff --git a/arch/arm/dts/imx53-guf-vincell-lt.dts b/arch/arm/dts/imx53-guf-vincell-lt.dts
index bcc378d..67a4133 100644
--- a/arch/arm/dts/imx53-guf-vincell-lt.dts
+++ b/arch/arm/dts/imx53-guf-vincell-lt.dts
@@ -136,6 +136,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
+ phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
--
2.8.1
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* [PATCH 08/12] mtd: imx-nand: Move v3 register definitions to include file
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
Move v3 register definitions to include file so that they can
be reused for the early nand boot code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imx-nand.h | 49 +++++++++++++++++++++++++++++++
drivers/mtd/nand/nand_imx.c | 49 -------------------------------
2 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx-nand.h b/arch/arm/mach-imx/include/mach/imx-nand.h
index b9305e2..0adba09 100644
--- a/arch/arm/mach-imx/include/mach/imx-nand.h
+++ b/arch/arm/mach-imx/include/mach/imx-nand.h
@@ -59,6 +59,55 @@ struct imx_nand_platform_data {
#define NFC_V2_SPAS_SPARESIZE(spas) ((spas) >> 1)
+#define NFC_V3_FLASH_CMD (host->regs_axi + 0x00)
+#define NFC_V3_FLASH_ADDR0 (host->regs_axi + 0x04)
+
+#define NFC_V3_CONFIG1 (host->regs_axi + 0x34)
+#define NFC_V3_CONFIG1_SP_EN (1 << 0)
+#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7 ) << 4)
+
+#define NFC_V3_ECC_STATUS_RESULT (host->regs_axi + 0x38)
+
+#define NFC_V3_LAUNCH (host->regs_axi + 0x40)
+
+#define NFC_V3_WRPROT (host->regs_ip + 0x0)
+#define NFC_V3_WRPROT_LOCK_TIGHT (1 << 0)
+#define NFC_V3_WRPROT_LOCK (1 << 1)
+#define NFC_V3_WRPROT_UNLOCK (1 << 2)
+#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6)
+
+#define NFC_V3_WRPROT_UNLOCK_BLK_ADD0 (host->regs_ip + 0x04)
+
+#define NFC_V3_CONFIG2 (host->regs_ip + 0x24)
+#define NFC_V3_CONFIG2_PS_512 (0 << 0)
+#define NFC_V3_CONFIG2_PS_2048 (1 << 0)
+#define NFC_V3_CONFIG2_PS_4096 (2 << 0)
+#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2)
+#define NFC_V3_CONFIG2_ECC_EN (1 << 3)
+#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4)
+#define NFC_V3_CONFIG2_NUM_ADDR_PHASE0 (1 << 5)
+#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6)
+#define NFC_V3_MX51_CONFIG2_PPB(x) (((x) & 0x3) << 7)
+#define NFC_V3_MX53_CONFIG2_PPB(x) (((x) & 0x3) << 8)
+#define NFC_V3_CONFIG2_NUM_ADDR_PHASE1(x) (((x) & 0x3) << 12)
+#define NFC_V3_CONFIG2_INT_MSK (1 << 15)
+#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24)
+#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16)
+
+#define NFC_V3_CONFIG3 (host->regs_ip + 0x28)
+#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0)
+#define NFC_V3_CONFIG3_FW8 (1 << 3)
+#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8)
+#define NFC_V3_CONFIG3_NUM_OF_DEVICES(x) (((x) & 0x7) << 12)
+#define NFC_V3_CONFIG3_RBB_MODE (1 << 15)
+#define NFC_V3_CONFIG3_NO_SDMA (1 << 20)
+
+#define NFC_V3_IPC (host->regs_ip + 0x2C)
+#define NFC_V3_IPC_CREQ (1 << 0)
+#define NFC_V3_IPC_INT (1 << 31)
+
+#define NFC_V3_DELAY_LINE (host->regs_ip + 0x34)
+
/*
* Operation modes for the NFC. Valid for v1, v2 and v3
* type controllers.
diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c
index 6f31c28..e0d840b 100644
--- a/drivers/mtd/nand/nand_imx.c
+++ b/drivers/mtd/nand/nand_imx.c
@@ -31,55 +31,6 @@
#include <of_mtd.h>
#include <errno.h>
-#define NFC_V3_FLASH_CMD (host->regs_axi + 0x00)
-#define NFC_V3_FLASH_ADDR0 (host->regs_axi + 0x04)
-
-#define NFC_V3_CONFIG1 (host->regs_axi + 0x34)
-#define NFC_V3_CONFIG1_SP_EN (1 << 0)
-#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7 ) << 4)
-
-#define NFC_V3_ECC_STATUS_RESULT (host->regs_axi + 0x38)
-
-#define NFC_V3_LAUNCH (host->regs_axi + 0x40)
-
-#define NFC_V3_WRPROT (host->regs_ip + 0x0)
-#define NFC_V3_WRPROT_LOCK_TIGHT (1 << 0)
-#define NFC_V3_WRPROT_LOCK (1 << 1)
-#define NFC_V3_WRPROT_UNLOCK (1 << 2)
-#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6)
-
-#define NFC_V3_WRPROT_UNLOCK_BLK_ADD0 (host->regs_ip + 0x04)
-
-#define NFC_V3_CONFIG2 (host->regs_ip + 0x24)
-#define NFC_V3_CONFIG2_PS_512 (0 << 0)
-#define NFC_V3_CONFIG2_PS_2048 (1 << 0)
-#define NFC_V3_CONFIG2_PS_4096 (2 << 0)
-#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2)
-#define NFC_V3_CONFIG2_ECC_EN (1 << 3)
-#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4)
-#define NFC_V3_CONFIG2_NUM_ADDR_PHASE0 (1 << 5)
-#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6)
-#define NFC_V3_MX51_CONFIG2_PPB(x) (((x) & 0x3) << 7)
-#define NFC_V3_MX53_CONFIG2_PPB(x) (((x) & 0x3) << 8)
-#define NFC_V3_CONFIG2_NUM_ADDR_PHASE1(x) (((x) & 0x3) << 12)
-#define NFC_V3_CONFIG2_INT_MSK (1 << 15)
-#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24)
-#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16)
-
-#define NFC_V3_CONFIG3 (host->regs_ip + 0x28)
-#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0)
-#define NFC_V3_CONFIG3_FW8 (1 << 3)
-#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8)
-#define NFC_V3_CONFIG3_NUM_OF_DEVICES(x) (((x) & 0x7) << 12)
-#define NFC_V3_CONFIG3_RBB_MODE (1 << 15)
-#define NFC_V3_CONFIG3_NO_SDMA (1 << 20)
-
-#define NFC_V3_IPC (host->regs_ip + 0x2C)
-#define NFC_V3_IPC_CREQ (1 << 0)
-#define NFC_V3_IPC_INT (1 << 31)
-
-#define NFC_V3_DELAY_LINE (host->regs_ip + 0x34)
-
struct imx_nand_host {
struct mtd_info mtd;
struct nand_chip nand;
--
2.8.1
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* [PATCH 06/12] ARM: i.MX: Provide bootsource functions for early boot code
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The regular bootsource functions only work in a running barebox,
provide functions for early code. This has already been done for
i.MX6, this patch adds the same functions for the other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/boot.c | 90 ++++++++++++++++++++++++--------
arch/arm/mach-imx/include/mach/generic.h | 5 ++
2 files changed, 72 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index f6c546d..c72ec61 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -78,7 +78,7 @@ static void imx25_35_boot_save_loc(unsigned int ctrl, unsigned int type)
bootsource_set(src);
}
-void imx25_boot_save_loc(void)
+void imx25_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *ccm_base = IOMEM(MX25_CCM_BASE_ADDR);
uint32_t val;
@@ -88,7 +88,18 @@ void imx25_boot_save_loc(void)
(val >> MX25_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
}
-void imx35_boot_save_loc(void)
+void imx25_boot_save_loc(void)
+{
+ enum bootsource src = BOOTSOURCE_UNKNOWN;
+ int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+
+ imx25_get_boot_source(&src, &instance);
+
+ bootsource_set(src);
+ bootsource_set_instance(instance);
+}
+
+void imx35_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *ccm_base = IOMEM(MX35_CCM_BASE_ADDR);
uint32_t val;
@@ -98,6 +109,17 @@ void imx35_boot_save_loc(void)
(val >> MX35_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
}
+void imx35_boot_save_loc(void)
+{
+ enum bootsource src = BOOTSOURCE_UNKNOWN;
+ int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+
+ imx35_get_boot_source(&src, &instance);
+
+ bootsource_set(src);
+ bootsource_set_instance(instance);
+}
+
#define IMX27_SYSCTRL_GPCR 0x18
#define IMX27_GPCR_BOOT_SHIFT 16
#define IMX27_GPCR_BOOT_MASK (0xf << IMX27_GPCR_BOOT_SHIFT)
@@ -109,10 +131,9 @@ void imx35_boot_save_loc(void)
#define IMX27_GPCR_BOOT_32BIT_CS0 6
#define IMX27_GPCR_BOOT_8BIT_NAND_512 7
-void imx27_boot_save_loc(void)
+void imx27_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *sysctrl_base = IOMEM(MX27_SYSCTRL_BASE_ADDR);
- enum bootsource src;
uint32_t val;
val = readl(sysctrl_base + IMX27_SYSCTRL_GPCR);
@@ -121,20 +142,29 @@ void imx27_boot_save_loc(void)
switch (val) {
case IMX27_GPCR_BOOT_UART_USB:
- src = BOOTSOURCE_SERIAL;
+ *src = BOOTSOURCE_SERIAL;
break;
case IMX27_GPCR_BOOT_8BIT_NAND_2k:
case IMX27_GPCR_BOOT_16BIT_NAND_2k:
case IMX27_GPCR_BOOT_16BIT_NAND_512:
case IMX27_GPCR_BOOT_8BIT_NAND_512:
- src = BOOTSOURCE_NAND;
+ *src = BOOTSOURCE_NAND;
break;
default:
- src = BOOTSOURCE_NOR;
+ *src = BOOTSOURCE_NOR;
break;
}
+}
+
+void imx27_boot_save_loc(void)
+{
+ enum bootsource src = BOOTSOURCE_UNKNOWN;
+ int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+
+ imx27_get_boot_source(&src, &instance);
bootsource_set(src);
+ bootsource_set_instance(instance);
}
#define IMX51_SRC_SBMR 0x4
@@ -142,10 +172,9 @@ void imx27_boot_save_loc(void)
#define IMX51_SBMR_BT_MEM_CTL_SHIFT 0
#define IMX51_SBMR_BMOD_SHIFT 14
-void imx51_boot_save_loc(void)
+void imx51_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *src_base = IOMEM(MX51_SRC_BASE_ADDR);
- enum bootsource src = BOOTSOURCE_UNKNOWN;
uint32_t reg;
unsigned int ctrl, type;
@@ -158,63 +187,78 @@ void imx51_boot_save_loc(void)
ctrl = (reg >> IMX51_SBMR_BT_MEM_CTL_SHIFT) & 0x3;
type = (reg >> IMX51_SBMR_BT_MEM_TYPE_SHIFT) & 0x3;
- src = locations[ctrl][type];
+ *src = locations[ctrl][type];
break;
case 1:
/* reserved */
- src = BOOTSOURCE_UNKNOWN;
+ *src = BOOTSOURCE_UNKNOWN;
break;
case 3:
- src = BOOTSOURCE_SERIAL;
+ *src = BOOTSOURCE_SERIAL;
break;
}
+}
+
+void imx51_boot_save_loc(void)
+{
+ enum bootsource src = BOOTSOURCE_UNKNOWN;
+ int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+
+ imx51_get_boot_source(&src, &instance);
bootsource_set(src);
+ bootsource_set_instance(instance);
}
#define IMX53_SRC_SBMR 0x4
-void imx53_boot_save_loc(void)
+void imx53_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *src_base = IOMEM(MX53_SRC_BASE_ADDR);
- enum bootsource src = BOOTSOURCE_UNKNOWN;
- int instance;
uint32_t cfg1 = readl(src_base + IMX53_SRC_SBMR);
switch ((cfg1 & 0xff) >> 4) {
case 2:
- src = BOOTSOURCE_HD;
+ *src = BOOTSOURCE_HD;
break;
case 3:
if (cfg1 & (1 << 3))
- src = BOOTSOURCE_SPI;
+ *src = BOOTSOURCE_SPI;
else
- src = BOOTSOURCE_I2C;
+ *src = BOOTSOURCE_I2C;
break;
case 4:
case 5:
case 6:
case 7:
- src = BOOTSOURCE_MMC;
+ *src = BOOTSOURCE_MMC;
break;
default:
break;
}
if (cfg1 & (1 << 7))
- src = BOOTSOURCE_NAND;
+ *src = BOOTSOURCE_NAND;
- switch (src) {
+ switch (*src) {
case BOOTSOURCE_MMC:
case BOOTSOURCE_SPI:
case BOOTSOURCE_I2C:
- instance = (cfg1 >> 20) & 0x3;
+ *instance = (cfg1 >> 20) & 0x3;
break;
default:
- instance = 0;
+ *instance = 0;
break;
}
+}
+
+void imx53_boot_save_loc(void)
+{
+ enum bootsource src = BOOTSOURCE_UNKNOWN;
+ int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
+
+ imx53_get_boot_source(&src, &instance);
bootsource_set(src);
bootsource_set_instance(instance);
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index 9279bef..7c275df 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -14,6 +14,11 @@ void imx27_boot_save_loc(void);
void imx51_boot_save_loc(void);
void imx53_boot_save_loc(void);
void imx6_boot_save_loc(void);
+
+void imx25_get_boot_source(enum bootsource *src, int *instance);
+void imx35_get_boot_source(enum bootsource *src, int *instance);
+void imx51_get_boot_source(enum bootsource *src, int *instance);
+void imx53_get_boot_source(enum bootsource *src, int *instance);
void imx6_get_boot_source(enum bootsource *src, int *instance);
int imx1_init(void);
--
2.8.1
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* [PATCH 07/12] ARM: i.MX53: Detect booting from USB
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The USB download mode can be detected by reading the BMOD[0|1]
bits. Add support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/boot.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index c72ec61..b66c29d 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -217,6 +217,12 @@ void imx53_get_boot_source(enum bootsource *src, int *instance)
void __iomem *src_base = IOMEM(MX53_SRC_BASE_ADDR);
uint32_t cfg1 = readl(src_base + IMX53_SRC_SBMR);
+ if (((cfg1 >> 24) & 0x3) == 0x3) {
+ *src = BOOTSOURCE_USB;
+ *instance = 0;
+ return;
+ }
+
switch ((cfg1 & 0xff) >> 4) {
case 2:
*src = BOOTSOURCE_HD;
--
2.8.1
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* [PATCH 04/12] ARM: i.MX53 Vincell: Add PBL console support
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
PBL console support is more useful than debug_ll. Add support
for it to the Vincell Board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/guf-vincell/lowlevel.c | 50 ++++++++++++++++++++--------------
1 file changed, 29 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
index af7c65d..3985dd7 100644
--- a/arch/arm/boards/guf-vincell/lowlevel.c
+++ b/arch/arm/boards/guf-vincell/lowlevel.c
@@ -11,6 +11,7 @@
#include <mach/generic.h>
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
+#include <asm/cache.h>
#define IOMUX_PADCTL_DDRI_DDR (1 << 9)
@@ -123,12 +124,16 @@ void disable_watchdog(void)
writew(0x0, MX53_WDOG2_BASE_ADDR + 8);
}
-static noinline void imx53_guf_vincell_init(void *fdt)
+extern char __dtb_imx53_guf_vincell_lt_start[];
+extern char __dtb_imx53_guf_vincell_start[];
+
+static noinline void imx53_guf_vincell_init(int is_lt)
{
void __iomem *ccm = (void *)MX53_CCM_BASE_ADDR;
+ void __iomem *uart = IOMEM(MX53_UART4_BASE_ADDR);
+ void *fdt;
u32 r;
- imx5_cpu_lowlevel_init();
arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8);
writel(0x0088494c, ccm + MX5_CCM_CBCDR);
@@ -137,12 +142,11 @@ static noinline void imx53_guf_vincell_init(void *fdt)
imx53_init_lowlevel_early(800);
- if (IS_ENABLED(CONFIG_DEBUG_LL)) {
- writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
- writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
- imx53_uart_setup_ll();
- putc_ll('>');
- }
+ writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
+ writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
+ imx53_uart_setup(uart);
+ pbl_set_putc(imx_uart_putc, uart);
+ pr_debug("GuF Vincell\n");
/* Skip SDRAM initialization if we run from RAM */
r = get_pc();
@@ -152,27 +156,31 @@ static noinline void imx53_guf_vincell_init(void *fdt)
imx_esdctlv4_init();
}
+ if (is_lt)
+ fdt = __dtb_imx53_guf_vincell_lt_start;
+ else
+ fdt = __dtb_imx53_guf_vincell_start;
+
imx53_barebox_entry(fdt);
}
-extern char __dtb_imx53_guf_vincell_lt_start[];
-
-ENTRY_FUNCTION(start_imx53_guf_vincell_lt, r0, r1, r2)
+static void __imx53_guf_vincell_init(int is_lt)
{
- void *fdt;
-
- fdt = __dtb_imx53_guf_vincell_lt_start - get_runtime_offset();
+ arm_early_mmu_cache_invalidate();
+ imx5_cpu_lowlevel_init();
+ relocate_to_current_adr();
+ setup_c();
+ barrier();
- imx53_guf_vincell_init(fdt);
+ imx53_guf_vincell_init(is_lt);
}
-extern char __dtb_imx53_guf_vincell_start[];
+ENTRY_FUNCTION(start_imx53_guf_vincell_lt, r0, r1, r2)
+{
+ __imx53_guf_vincell_init(1);
+}
ENTRY_FUNCTION(start_imx53_guf_vincell, r0, r1, r2)
{
- void *fdt;
-
- fdt = __dtb_imx53_guf_vincell_start - get_runtime_offset();
-
- imx53_guf_vincell_init(fdt);
+ __imx53_guf_vincell_init(0);
}
--
2.8.1
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* [PATCH 03/12] ARM: i.MX53 Vincell: Adjust bbu handler partition size to real partition size
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The bootloader partition size was increased to 0xe0000, so adjust
the barebox update handler partition size accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/guf-vincell/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c
index ee5be10..007b6dd 100644
--- a/arch/arm/boards/guf-vincell/board.c
+++ b/arch/arm/boards/guf-vincell/board.c
@@ -41,7 +41,7 @@ static int vincell_devices_init(void)
clk_set_rate(clk_lookup("nfc_podf"), 33333334);
imx53_bbu_internal_nand_register_handler("nand",
- BBU_HANDLER_FLAG_DEFAULT, SZ_512K);
+ BBU_HANDLER_FLAG_DEFAULT, 0xe0000);
return 0;
}
--
2.8.1
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* [PATCH 10/12] ARM: i.MX53 Vincell: Add NAND xload support
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The Vincell boards do the SDRAM setup from board init code, so the
image size is limited to the internal SRAM size. To overcome this
limitation use the NAND xload support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/guf-vincell/lowlevel.c | 9 +++++++++
arch/arm/mach-imx/Kconfig | 9 +++++++++
images/Makefile.imx | 14 ++++++++++----
3 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
index 3985dd7..a346a4d 100644
--- a/arch/arm/boards/guf-vincell/lowlevel.c
+++ b/arch/arm/boards/guf-vincell/lowlevel.c
@@ -12,6 +12,7 @@
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
#include <asm/cache.h>
+#include <mach/xload.h>
#define IOMUX_PADCTL_DDRI_DDR (1 << 9)
@@ -133,6 +134,8 @@ static noinline void imx53_guf_vincell_init(int is_lt)
void __iomem *uart = IOMEM(MX53_UART4_BASE_ADDR);
void *fdt;
u32 r;
+ enum bootsource src;
+ int instance;
arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8);
@@ -154,6 +157,12 @@ static noinline void imx53_guf_vincell_init(int is_lt)
disable_watchdog();
configure_dram_iomux();
imx_esdctlv4_init();
+
+ imx53_get_boot_source(&src, &instance);
+
+ if (src == BOOTSOURCE_NAND &&
+ IS_ENABLED(CONFIG_MACH_GUF_VINCELL_XLOAD))
+ imx53_nand_start_image();
}
if (is_lt)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index a80bc6b..81f78e0 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -224,6 +224,15 @@ config MACH_GUF_VINCELL
bool "Garz-Fricke Vincell"
select ARCH_IMX53
+config MACH_GUF_VINCELL_XLOAD
+ depends on MACH_GUF_VINCELL
+ bool "Garz-Fricke Vincell NAND xload support"
+ help
+ The Vincell initializes SDRAM from board code. This normally limits
+ the image size to the size of the SoC internal SRAM. Enable this
+ option to be able to use bigger images when booting from NAND. Images
+ built with this option are no longer bootable from USB though.
+
config MACH_TQMA53
bool "TQ i.MX53 TQMa53"
select ARCH_IMX53
diff --git a/images/Makefile.imx b/images/Makefile.imx
index b02fdff..1904e8b 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -97,14 +97,20 @@ CFG_start_imx53_vmx53.pblx.imximg = $(board)/freescale-mx53-vmx53/flash-header-i
FILE_barebox-freescale-imx53-vmx53.img = start_imx53_vmx53.pblx.imximg
image-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += barebox-freescale-imx53-vmx53.img
+ifdef CONFIG_MACH_GUF_VINCELL_XLOAD
+VINCELL_IMAGE := imx-sram-img
+else
+VINCELL_IMAGE := pblx.imximg
+endif
+
pblx-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell
-CFG_start_imx53_guf_vincell.pblx.imximg = $(board)/guf-vincell/flash-header.imxcfg
-FILE_barebox-guf-vincell.img = start_imx53_guf_vincell.pblx.imximg
+CFG_start_imx53_guf_vincell.$(VINCELL_IMAGE) = $(board)/guf-vincell/flash-header.imxcfg
+FILE_barebox-guf-vincell.img = start_imx53_guf_vincell.$(VINCELL_IMAGE)
image-$(CONFIG_MACH_GUF_VINCELL) += barebox-guf-vincell.img
pblx-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell_lt
-CFG_start_imx53_guf_vincell_lt.pblx.imximg = $(board)/guf-vincell/flash-header.imxcfg
-FILE_barebox-guf-vincell-lt.img = start_imx53_guf_vincell_lt.pblx.imximg
+CFG_start_imx53_guf_vincell_lt.$(VINCELL_IMAGE) = $(board)/guf-vincell/flash-header.imxcfg
+FILE_barebox-guf-vincell-lt.img = start_imx53_guf_vincell_lt.$(VINCELL_IMAGE)
image-$(CONFIG_MACH_GUF_VINCELL) += barebox-guf-vincell-lt.img
pblx-$(CONFIG_MACH_TQMA53) += start_imx53_mba53_512mib
--
2.8.1
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* [PATCH 05/12] ARM: i.MX53: do not pass base address to imx*_boot_save_loc
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The functions can determine the necessary base addresses
themselves since they are SoC specific anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/boot.c | 20 ++++++++++++++------
arch/arm/mach-imx/imx25.c | 2 +-
arch/arm/mach-imx/imx27.c | 2 +-
arch/arm/mach-imx/imx35.c | 2 +-
arch/arm/mach-imx/imx51.c | 2 +-
arch/arm/mach-imx/imx53.c | 2 +-
arch/arm/mach-imx/imx6.c | 2 +-
arch/arm/mach-imx/include/mach/generic.h | 13 ++++++-------
8 files changed, 26 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index 376e370..f6c546d 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -20,7 +20,10 @@
#include <io.h>
#include <mach/generic.h>
#include <mach/imx25-regs.h>
+#include <mach/imx27-regs.h>
#include <mach/imx35-regs.h>
+#include <mach/imx51-regs.h>
+#include <mach/imx53-regs.h>
#include <mach/imx6-regs.h>
/* [CTRL][TYPE] */
@@ -75,8 +78,9 @@ static void imx25_35_boot_save_loc(unsigned int ctrl, unsigned int type)
bootsource_set(src);
}
-void imx25_boot_save_loc(void __iomem *ccm_base)
+void imx25_boot_save_loc(void)
{
+ void __iomem *ccm_base = IOMEM(MX25_CCM_BASE_ADDR);
uint32_t val;
val = readl(ccm_base + MX25_CCM_RCSR);
@@ -84,8 +88,9 @@ void imx25_boot_save_loc(void __iomem *ccm_base)
(val >> MX25_CCM_RCSR_MEM_TYPE_SHIFT) & 0x3);
}
-void imx35_boot_save_loc(void __iomem *ccm_base)
+void imx35_boot_save_loc(void)
{
+ void __iomem *ccm_base = IOMEM(MX35_CCM_BASE_ADDR);
uint32_t val;
val = readl(ccm_base + MX35_CCM_RCSR);
@@ -104,8 +109,9 @@ void imx35_boot_save_loc(void __iomem *ccm_base)
#define IMX27_GPCR_BOOT_32BIT_CS0 6
#define IMX27_GPCR_BOOT_8BIT_NAND_512 7
-void imx27_boot_save_loc(void __iomem *sysctrl_base)
+void imx27_boot_save_loc(void)
{
+ void __iomem *sysctrl_base = IOMEM(MX27_SYSCTRL_BASE_ADDR);
enum bootsource src;
uint32_t val;
@@ -136,8 +142,9 @@ void imx27_boot_save_loc(void __iomem *sysctrl_base)
#define IMX51_SBMR_BT_MEM_CTL_SHIFT 0
#define IMX51_SBMR_BMOD_SHIFT 14
-void imx51_boot_save_loc(void __iomem *src_base)
+void imx51_boot_save_loc(void)
{
+ void __iomem *src_base = IOMEM(MX51_SRC_BASE_ADDR);
enum bootsource src = BOOTSOURCE_UNKNOWN;
uint32_t reg;
unsigned int ctrl, type;
@@ -167,8 +174,9 @@ void imx51_boot_save_loc(void __iomem *src_base)
}
#define IMX53_SRC_SBMR 0x4
-void imx53_boot_save_loc(void __iomem *src_base)
+void imx53_boot_save_loc(void)
{
+ void __iomem *src_base = IOMEM(MX53_SRC_BASE_ADDR);
enum bootsource src = BOOTSOURCE_UNKNOWN;
int instance;
uint32_t cfg1 = readl(src_base + IMX53_SRC_SBMR);
@@ -278,7 +286,7 @@ internal_boot:
return;
}
-void imx6_boot_save_loc(void __iomem *src_base)
+void imx6_boot_save_loc(void)
{
enum bootsource src = BOOTSOURCE_UNKNOWN;
int instance = BOOTSOURCE_INSTANCE_UNKNOWN;
diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c
index 2534d75..a4e27dd 100644
--- a/arch/arm/mach-imx/imx25.c
+++ b/arch/arm/mach-imx/imx25.c
@@ -52,7 +52,7 @@ int imx25_init(void)
{
int val;
- imx25_boot_save_loc((void *)MX25_CCM_BASE_ADDR);
+ imx25_boot_save_loc();
add_generic_device("imx25-esdctl", 0, NULL, MX25_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
/*
diff --git a/arch/arm/mach-imx/imx27.c b/arch/arm/mach-imx/imx27.c
index b99a4ea..81b9f53 100644
--- a/arch/arm/mach-imx/imx27.c
+++ b/arch/arm/mach-imx/imx27.c
@@ -100,7 +100,7 @@ static void imx27_init_max(void)
int imx27_init(void)
{
imx27_silicon_revision();
- imx27_boot_save_loc((void *)MX27_SYSCTRL_BASE_ADDR);
+ imx27_boot_save_loc();
add_generic_device("imx27-esdctl", DEVICE_ID_SINGLE, NULL,
MX27_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c
index 3e1aa97..d37bdfd 100644
--- a/arch/arm/mach-imx/imx35.c
+++ b/arch/arm/mach-imx/imx35.c
@@ -55,7 +55,7 @@ int imx35_init(void)
imx35_silicon_revision();
- imx35_boot_save_loc((void *)MX35_CCM_BASE_ADDR);
+ imx35_boot_save_loc();
add_generic_device("imx35-esdctl", 0, NULL, MX35_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
return 0;
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index a6784d0..ffe6a7c 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -58,7 +58,7 @@ static void imx51_ipu_mipi_setup(void)
int imx51_init(void)
{
imx_set_silicon_revision("i.MX51", imx51_silicon_revision());
- imx51_boot_save_loc((void *)MX51_SRC_BASE_ADDR);
+ imx51_boot_save_loc();
add_generic_device("imx51-esdctl", 0, NULL, MX51_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
imx51_ipu_mipi_setup();
diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 872d293..2758f1b 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -53,7 +53,7 @@ static int imx53_silicon_revision(void)
int imx53_init(void)
{
imx53_silicon_revision();
- imx53_boot_save_loc((void *)MX53_SRC_BASE_ADDR);
+ imx53_boot_save_loc();
add_generic_device("imx53-esdctl", 0, NULL, MX53_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
return 0;
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb89..c23cc54 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -120,7 +120,7 @@ int imx6_init(void)
imx6_init_lowlevel();
- imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
+ imx6_boot_save_loc();
rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index cadc501..9279bef 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -8,13 +8,12 @@
u64 imx_uid(void);
-void imx25_boot_save_loc(void __iomem *ccm_base);
-void imx35_boot_save_loc(void __iomem *ccm_base);
-void imx27_boot_save_loc(void __iomem *sysctrl_base);
-void imx50_boot_save_loc(void __iomem *src_base);
-void imx51_boot_save_loc(void __iomem *src_base);
-void imx53_boot_save_loc(void __iomem *src_base);
-void imx6_boot_save_loc(void __iomem *src_base);
+void imx25_boot_save_loc(void);
+void imx35_boot_save_loc(void);
+void imx27_boot_save_loc(void);
+void imx51_boot_save_loc(void);
+void imx53_boot_save_loc(void);
+void imx6_boot_save_loc(void);
void imx6_get_boot_source(enum bootsource *src, int *instance);
int imx1_init(void);
--
2.8.1
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* [PATCH 11/12] ARM: imx_v7_defconfig: Enable Vincell support
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
Now that we can start images bigger than internal SRAM size we can
enable the Vincell support in the imx_v7_defconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/configs/imx_v7_defconfig | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index e3a8f47..51cbf60 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -3,8 +3,10 @@ CONFIG_IMX_MULTI_BOARDS=y
CONFIG_MACH_EFIKA_MX_SMARTBOOK=y
CONFIG_MACH_EMBEDSKY_E9=y
CONFIG_MACH_FREESCALE_MX51_PDK=y
-CONFIG_MACH_FREESCALE_MX53_LOCO=y
CONFIG_MACH_CCMX53=y
+CONFIG_MACH_FREESCALE_MX53_LOCO=y
+CONFIG_MACH_GUF_VINCELL=y
+CONFIG_MACH_GUF_VINCELL_XLOAD=y
CONFIG_MACH_TQMA53=y
CONFIG_MACH_FREESCALE_MX53_VMX53=y
CONFIG_MACH_PHYTEC_SOM_IMX6=y
--
2.8.1
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* [PATCH 01/12] ARM: i.MX53: Add uart5 clock support
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/clk-imx5.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/clk-imx5.c b/arch/arm/mach-imx/clk-imx5.c
index d3cde7e..c4c47a6 100644
--- a/arch/arm/mach-imx/clk-imx5.c
+++ b/arch/arm/mach-imx/clk-imx5.c
@@ -467,6 +467,7 @@ int __init mx53_clocks_init(struct device_d *dev, void __iomem *regs)
clkdev_add_physbase(clks[IMX5_CLK_UART_ROOT], MX53_UART2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_UART_ROOT], MX53_UART3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_UART_ROOT], MX53_UART4_BASE_ADDR, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_UART_ROOT], MX53_UART5_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX53_I2C1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX53_I2C2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX53_I2C3_BASE_ADDR, NULL);
--
2.8.1
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* [PATCH 12/12] ARM: vincell_defconfig: make smaller
From: Sascha Hauer @ 2016-09-14 9:12 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473844368-13030-1-git-send-email-s.hauer@pengutronix.de>
The image built with vincell_defconfig has become too big to fit
into the SoC internal SRAM. Make it smaller by disabling UBIFS
support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/configs/vincell_defconfig | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/configs/vincell_defconfig b/arch/arm/configs/vincell_defconfig
index 83862de..81bfbed 100644
--- a/arch/arm/configs/vincell_defconfig
+++ b/arch/arm/configs/vincell_defconfig
@@ -104,7 +104,6 @@ CONFIG_USB_EHCI=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_MCI=y
-CONFIG_MCI_MMC_BOOT_PARTITIONS=y
CONFIG_MCI_IMX_ESDHC=y
CONFIG_STATE_DRV=y
CONFIG_EEPROM_AT25=y
@@ -112,5 +111,4 @@ CONFIG_EEPROM_AT24=y
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_IMX=y
CONFIG_FS_TFTP=y
-CONFIG_FS_UBIFS=y
-CONFIG_FS_UBIFS_COMPRESSION_LZO=y
+CONFIG_LZO_DECOMPRESS=y
--
2.8.1
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* [PATCH] ARM: karo-tx6: Include correct device tree
From: Sascha Hauer @ 2016-09-14 8:31 UTC (permalink / raw)
To: Barebox List
As a i.MX6dl board dts imx6dl-tx6u.dts should include imx6dl.dtsi, not
the i.MX6q variant. This fixes various pinctrl problems.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/imx6dl-tx6u.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx6dl-tx6u.dts b/arch/arm/dts/imx6dl-tx6u.dts
index 77fda62..6c26feb 100644
--- a/arch/arm/dts/imx6dl-tx6u.dts
+++ b/arch/arm/dts/imx6dl-tx6u.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-#include <arm/imx6q.dtsi>
+#include <arm/imx6dl.dtsi>
#include <arm/imx6qdl-tx6.dtsi>
#include "imx6qdl.dtsi"
#include "imx6qdl-tx6x.dtsi"
--
2.8.1
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* [PATCH] defenv-1: remove unused variable kernelimage_type
From: Sascha Hauer @ 2016-09-14 8:27 UTC (permalink / raw)
To: Barebox List
kernelimage_type is used nowwhere, remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/friendlyarm-mini6410/env/config | 4 ----
arch/arm/boards/friendlyarm-tiny6410/env/config | 4 ----
2 files changed, 8 deletions(-)
diff --git a/arch/arm/boards/friendlyarm-mini6410/env/config b/arch/arm/boards/friendlyarm-mini6410/env/config
index 74beeff..924d7b8 100644
--- a/arch/arm/boards/friendlyarm-mini6410/env/config
+++ b/arch/arm/boards/friendlyarm-mini6410/env/config
@@ -24,13 +24,9 @@ rootfs_type=ubifs
rootfsimage=root-${machine}.${rootfs_type}
# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
-kernelimage_type=zimage
kernelimage=zImage-${machine}
-#kernelimage_type=uimage
#kernelimage=uImage-$machine
-#kernelimage_type=raw
#kernelimage=Image-$machine
-#kernelimage_type=raw_lzo
#kernelimage=Image-$machine.lzo
if [ -n $user ]; then
diff --git a/arch/arm/boards/friendlyarm-tiny6410/env/config b/arch/arm/boards/friendlyarm-tiny6410/env/config
index 6422e9f..f38535b 100644
--- a/arch/arm/boards/friendlyarm-tiny6410/env/config
+++ b/arch/arm/boards/friendlyarm-tiny6410/env/config
@@ -24,13 +24,9 @@ rootfs_type=ubifs
rootfsimage=root-${machine}.${rootfs_type}
# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
-kernelimage_type=zimage
kernelimage=zImage-${machine}
-#kernelimage_type=uimage
#kernelimage=uImage-$machine
-#kernelimage_type=raw
#kernelimage=Image-$machine
-#kernelimage_type=raw_lzo
#kernelimage=Image-$machine.lzo
if [ -n $user ]; then
--
2.8.1
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* [PATCH 1/2] Add comp_copy function for use with CONFIG_IMAGE_COMPRESSION_NONE
From: Sascha Hauer @ 2016-09-14 8:21 UTC (permalink / raw)
To: Barebox List
The Makefile compression commands all append the size of the
uncompressed image. With CONFIG_IMAGE_COMPRESSION_NONE simply
'shipped' is used which does not append the size. Add and use
a special comp_copy function which adds the size. This helps
us to get the uncompressed image size in the startup code later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/pbl/Makefile | 2 +-
images/Makefile | 2 +-
scripts/Makefile.lib | 8 ++++++++
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 1ff39db..c455112 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -3,7 +3,7 @@ suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo
suffix_$(CONFIG_IMAGE_COMPRESSION_LZ4) = lz4
suffix_$(CONFIG_IMAGE_COMPRESSION_XZKERN) = xzkern
-suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = shipped
+suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = comp_copy
OBJCOPYFLAGS_zbarebox.bin = -O binary
piggy_o := piggy.$(suffix_y).o
diff --git a/images/Makefile b/images/Makefile
index da9cc8d..0537af1 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -85,7 +85,7 @@ suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo
suffix_$(CONFIG_IMAGE_COMPRESSION_LZ4) = lz4
suffix_$(CONFIG_IMAGE_COMPRESSION_XZKERN) = xzkern
-suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = shipped
+suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = comp_copy
# barebox.z - compressed barebox binary
# ----------------------------------------------------------------
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index e55bc27..e79998c 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -380,6 +380,14 @@ cmd_lz4 = (cat $(filter-out FORCE,$^) | \
%.lz4: %
$(call if_changed,lz4)
+# comp_copy
+# ---------------------------------------------------------------------------
+# Wrapper which only copies a file, but compatible to the compression
+# functions above. Appends the size to the result file
+quiet_cmd_comp_copy ?= SHIPPED_S $@
+cmd_comp_copy ?= cat $(filter-out FORCE,$^) > $@; \
+ $(call size_append, $(filter-out FORCE,$^)) >> $@
+
quiet_cmd_disasm = DISASM $@
cmd_disasm = $(OBJDUMP) -d $< > $@
--
2.8.1
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* [PATCH 2/2] ARM: Fix calling of arm_mem_barebox_image()
From: Sascha Hauer @ 2016-09-14 8:21 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473841313-4204-1-git-send-email-s.hauer@pengutronix.de>
arm_mem_barebox_image() is used to pick a suitable place where to
put the final image to. This is called from both the PBL uncompression
code and also from the final image. To make it work properly it is
crucial that it's called with the same arguments both times. Currently
it is called with the wrong image size from the PBL uncompression code.
The size passed to arm_mem_barebox_image() has to be the size of the
whole uncompressed image including the BSS segment size. The PBL code
calls it with the compressed image size instead and without the BSS
segment. This patch fixes this by reading the uncompressed image size
from the compressed binary (the uncompressed size is appended to the
end of the compressed binary by our compression wrappers). The size
of the BSS segment is unknown though by the PBL uncompression code,
so we introduce a maximum BSS size which is used instead.
The code before this patch worked by accident because the base address
of the final image was aligned down to a 1MiB boundary. The alignment
was sufficient already to make enough space. This breaks though when
the uncompressed image including BSS becomes bigger than 1MiB while
the compressed image is smaller.
Fixes: 65071bd0: arm: Clarify memory layout calculation
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/cpu/start-pbl.c | 6 ++++--
arch/arm/cpu/start.c | 3 +--
arch/arm/cpu/uncompress.c | 10 ++++++----
arch/arm/include/asm/barebox-arm.h | 9 ++++++++-
4 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
index f723edc..5f1469b 100644
--- a/arch/arm/cpu/start-pbl.c
+++ b/arch/arm/cpu/start-pbl.c
@@ -28,6 +28,7 @@
#include <asm/sections.h>
#include <asm/pgtable.h>
#include <asm/cache.h>
+#include <asm/unaligned.h>
#include "mmu-early.h"
@@ -49,7 +50,7 @@ __noreturn void barebox_single_pbl_start(unsigned long membase,
unsigned long memsize, void *boarddata)
{
uint32_t offset;
- uint32_t pg_start, pg_end, pg_len;
+ uint32_t pg_start, pg_end, pg_len, uncompressed_len;
void __noreturn (*barebox)(unsigned long, unsigned long, void *);
uint32_t endmem = membase + memsize;
unsigned long barebox_base;
@@ -63,9 +64,10 @@ __noreturn void barebox_single_pbl_start(unsigned long membase,
pg_start = (uint32_t)&input_data - offset;
pg_end = (uint32_t)&input_data_end - offset;
pg_len = pg_end - pg_start;
+ uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4));
if (IS_ENABLED(CONFIG_RELOCATABLE))
- barebox_base = arm_mem_barebox_image(membase, endmem, pg_len);
+ barebox_base = arm_mem_barebox_image(membase, endmem, uncompressed_len + MAX_BSS_SIZE);
else
barebox_base = TEXT_BASE;
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f25e592..0120117 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -143,8 +143,7 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
{
unsigned long endmem = membase + memsize;
unsigned long malloc_start, malloc_end;
- unsigned long barebox_size = barebox_image_size +
- ((unsigned long)&__bss_stop - (unsigned long)&__bss_start);
+ unsigned long barebox_size = barebox_image_size + MAX_BSS_SIZE;
if (IS_ENABLED(CONFIG_RELOCATABLE)) {
unsigned long barebox_base = arm_mem_barebox_image(membase,
diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c
index b8e2e9f..eeb5a65 100644
--- a/arch/arm/cpu/uncompress.c
+++ b/arch/arm/cpu/uncompress.c
@@ -29,6 +29,7 @@
#include <asm/sections.h>
#include <asm/pgtable.h>
#include <asm/cache.h>
+#include <asm/unaligned.h>
#include <debug_ll.h>
@@ -44,7 +45,7 @@ static int __attribute__((__used__))
void __noreturn barebox_multi_pbl_start(unsigned long membase,
unsigned long memsize, void *boarddata)
{
- uint32_t pg_len;
+ uint32_t pg_len, uncompressed_len;
void __noreturn (*barebox)(unsigned long, unsigned long, void *);
uint32_t endmem = membase + memsize;
unsigned long barebox_base;
@@ -72,10 +73,11 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
*/
pg_start = image_end + 1;
pg_len = *(image_end);
+ uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4));
if (IS_ENABLED(CONFIG_RELOCATABLE))
barebox_base = arm_mem_barebox_image(membase, endmem,
- pg_len);
+ uncompressed_len + MAX_BSS_SIZE);
else
barebox_base = TEXT_BASE;
@@ -92,8 +94,8 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
free_mem_ptr = arm_mem_early_malloc(membase, endmem);
free_mem_end_ptr = arm_mem_early_malloc_end(membase, endmem);
- pr_debug("uncompressing barebox binary at 0x%p (size 0x%08x) to 0x%08lx\n",
- pg_start, pg_len, barebox_base);
+ pr_debug("uncompressing barebox binary at 0x%p (size 0x%08x) to 0x%08lx (uncompressed size: 0x%08x)\n",
+ pg_start, pg_len, barebox_base, uncompressed_len);
pbl_barebox_uncompress((void*)barebox_base, pg_start, pg_len);
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index 0acdfa3..061296a 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -164,6 +164,13 @@ static inline unsigned long arm_mem_barebox_image(unsigned long membase,
static void __naked noinline __##name \
(uint32_t arg0, uint32_t arg1, uint32_t arg2)
-
+/*
+ * When using compressed images in conjunction with relocatable images
+ * the PBL code must pick a suitable place where to uncompress the barebox
+ * image. For doing this the PBL code must know the size of the final
+ * image including the BSS segment. The BSS size is unknown to the PBL
+ * code, so define a maximum BSS size here.
+ */
+#define MAX_BSS_SIZE SZ_1M
#endif /* _BAREBOX_ARM_H_ */
--
2.8.1
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* [PATCH 2/2] ARM: i.MX6: Sabrelite: Add PBL console support
From: Sascha Hauer @ 2016-09-14 8:21 UTC (permalink / raw)
To: Barebox List
In-Reply-To: <1473841290-3935-1-git-send-email-s.hauer@pengutronix.de>
Add PBL console support to allow for better debugging.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c | 57 +++++++++++++++++++---
1 file changed, 49 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
index abfb77a..3b51e01 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
@@ -3,29 +3,70 @@
#include <mach/generic.h>
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+#include <mach/imx6-regs.h>
+#include <io.h>
+#include <mach/debug_ll.h>
+#include <mach/esdctl.h>
+#include <asm/cache.h>
extern char __dtb_imx6q_sabrelite_start[];
-ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+static noinline void imx6q_sabrelite_start(void)
{
- void *fdt;
+ void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+ void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+ writel(0x4, iomuxbase + 0x0bc);
+
+ imx6_ungate_all_peripherals();
+ imx6_uart_setup(uart);
+ pbl_set_putc(imx_uart_putc, uart);
+ pr_debug("Freescale i.MX6q SabreLite\n");
+
+ imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+{
imx6_cpu_lowlevel_init();
- fdt = __dtb_imx6q_sabrelite_start - get_runtime_offset();
+ arm_early_mmu_cache_invalidate();
+
+ relocate_to_current_adr();
+ setup_c();
+ barrier();
- barebox_arm_entry(0x10000000, SZ_1G, fdt);
+ imx6q_sabrelite_start();
}
extern char __dtb_imx6dl_sabrelite_start[];
-ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+static noinline void imx6dl_sabrelite_start(void)
{
- void *fdt;
+ void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+ void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+ writel(0x4, iomuxbase + 0x16c);
+
+ imx6_ungate_all_peripherals();
+ imx6_uart_setup(uart);
+ pbl_set_putc(imx_uart_putc, uart);
+ pr_debug("Freescale i.MX6q SabreLite\n");
+
+ imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+{
imx6_cpu_lowlevel_init();
- fdt = __dtb_imx6dl_sabrelite_start - get_runtime_offset();
+ arm_early_mmu_cache_invalidate();
+
+ relocate_to_current_adr();
+ setup_c();
+ barrier();
- barebox_arm_entry(0x10000000, SZ_1G, fdt);
+ imx6dl_sabrelite_start();
}
--
2.8.1
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* [PATCH 1/2] pbl: console: Make it work with multiple setup_c()
From: Sascha Hauer @ 2016-09-14 8:21 UTC (permalink / raw)
To: Barebox List
setup_c() may be called multiple times. When we store the pointer
to the console in bss, then it's zeroed during setup_c() and the
pointer to the console is lost. Initialize the pointer explicitly
to a non zero value to force storing it in the data section.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
pbl/console.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/pbl/console.c b/pbl/console.c
index 4cefe748..0607a31 100644
--- a/pbl/console.c
+++ b/pbl/console.c
@@ -1,8 +1,10 @@
#include <common.h>
#include <debug_ll.h>
-static void (*__putc)(void *ctx, int c);
-static void *putc_ctx;
+#define INVALID_PTR ((void *)-1)
+
+static void (*__putc)(void *ctx, int c) = INVALID_PTR;
+static void *putc_ctx = INVALID_PTR;
/**
* pbl_set_putc() - setup UART used for PBL console
@@ -20,10 +22,10 @@ void pbl_set_putc(void (*putcf)(void *ctx, int c), void *ctx)
void console_putc(unsigned int ch, char c)
{
- if (!__putc)
- putc_ll(c);
- else
+ if (__putc != INVALID_PTR)
__putc(putc_ctx, c);
+ else
+ putc_ll(c);
}
int console_puts(unsigned int ch, const char *str)
--
2.8.1
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* [PATCH] ARM: imx6: reset PLL2's PFD2 on i.MX6D
From: Uwe Kleine-König @ 2016-09-14 7:56 UTC (permalink / raw)
To: barebox
The check for is_imx6q was introduced initially in
f1f6d76370b3 ("ARM: i.MX6: correct work flow of PFDs from uboot-sources")
to differentiate between i.MX6DL+i.MX6SL and i.MX6Q. The i.MX6D must be
handled like the latter, so drop the check. i.MX6DL+i.MX6SL can be
ignored here since since
a66596282413 ("imx6: lowlevel_init: Fix workaround for new i.MX6s chips")
the PFD handling is only done for i.MX6DQ.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/mach-imx/imx6.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb8964ac8..4391839a0b7e 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -77,7 +77,7 @@ void imx6_init_lowlevel(void)
BM_ANADIG_PFD_480_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_SET);
writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
- (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD2_CLKGATE |
BM_ANADIG_PFD_528_PFD1_CLKGATE |
BM_ANADIG_PFD_528_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_SET);
@@ -88,7 +88,7 @@ void imx6_init_lowlevel(void)
BM_ANADIG_PFD_480_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_480_CLR);
writel(BM_ANADIG_PFD_528_PFD3_CLKGATE |
- (is_imx6q ? BM_ANADIG_PFD_528_PFD2_CLKGATE : 0) |
+ BM_ANADIG_PFD_528_PFD2_CLKGATE |
BM_ANADIG_PFD_528_PFD1_CLKGATE |
BM_ANADIG_PFD_528_PFD0_CLKGATE,
MX6_ANATOP_BASE_ADDR + HW_ANADIG_PFD_528_CLR);
--
2.8.1
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* [PATCH] ARM: i.MX6: Enable parent propagation for clk_gate2
From: Sascha Hauer @ 2016-09-13 14:08 UTC (permalink / raw)
To: Barebox List
Enable parent rate propagation for clk_gate2 to allow the
clock consumers to adjust their rates.
One effect of this is that the i.MX6 NAND controller now can adjust
its rate. It already called a clk_set_rate(rate, 96000000), but this
had no effect, so the clock stayed at reset default 24MHz resulting
in a rather slow timing. This became a problem when commit
"1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
faster NAND chips. EDO mode can only work properly for cycle times
< 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
in sporadic NAND read errors on some boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/clk-gate2.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 344c2fb..faed631 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -79,6 +79,8 @@ static int clk_gate2_is_enabled(struct clk *clk)
}
static struct clk_ops clk_gate2_ops = {
+ .set_rate = clk_parent_set_rate,
+ .round_rate = clk_parent_round_rate,
.enable = clk_gate2_enable,
.disable = clk_gate2_disable,
.is_enabled = clk_gate2_is_enabled,
@@ -96,6 +98,7 @@ struct clk *clk_gate2_alloc(const char *name, const char *parent,
g->clk.name = name;
g->clk.parent_names = &g->parent;
g->clk.num_parents = 1;
+ g->clk.flags = CLK_SET_RATE_PARENT;
return &g->clk;
}
--
2.8.1
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* Re: [PATCH 1/6] ARM: add common definitions for i.MX50 SOC
From: Jason Cooper @ 2016-09-13 13:04 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Alexander Kurz
In-Reply-To: <20160913070604.qehrkh6gxrux5icg@pengutronix.de>
Hi Sascha, Alexander,
On Tue, Sep 13, 2016 at 09:06:04AM +0200, Sascha Hauer wrote:
> On Mon, Sep 12, 2016 at 10:17:18AM +0200, Alexander Kurz wrote:
> > On Mon, 12 Sep 2016, Sascha Hauer wrote:
> > > On Fri, Sep 09, 2016 at 05:43:39PM +0200, Alexander Kurz wrote:
> > > > Signed-off-by: Alexander Kurz <akurz@blala.de>
> > > > ---
> > > > Documentation/boards/imx.rst | 1 +
> > > > arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
> > > > arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
> > > > 3 files changed, 15 insertions(+)
> > >
> > > Seems to be straight forward to add i.MX50 support. I have nothing to
> > > add, except: Applied, thanks
> > >
> > > Out of curiosity: What device do you use with i.MX50? Is it some E-Book
> > > reader again?
> > The imx50 has a build-in e-ink driver, so it is more or less a SOC
> > tailored on e-books. It is used in some already outdated e-books like the
> > 4th and 5th generation Kindles, some Kobos and Tolinos.
> > The successor for the imx50 became the e-ink driver equiped variants
> > of the imx6sl, which is used in most current generation e-book readers.
> >
> > While the current patchsets will enable barebox to run on different
> > e-books e.g. when beeing booted via an installed bootloader, there is
> > still an open issue: RAM initialization.
> > Freescale used a "DRAMMC" which seems to be very unique to this SOC.
> > Documentation on it is available in the Reference Manual, but it covers
> > some details quite briefly.
> > Related on barebox:
> > it is not clear, whether DRAMMC initialization via imximg-DCD is possible
> > at all. All existing bootloaders I have seen so far used some
> > imximg-plugin code (which is currently not supported by barebox).
> > A two-stage bootloader implementation via xload may be an alternative.
>
> Yes, that could work. How I understand it the plugin image is
> responsible for initializing SDRAM and for loading the final image.
> Then the job of the ROM is done anyway, so normally I do not see a
> reason for plugin images. The only usecase seems to be HAB when the
> final image is checked by the HAB code when returning to ROM.
So, I found my Sandisk Connect WMD (Wireless Media Drive) and I also
re-located the open source dump by Sandisk [1].
The first problem I need to solve is the DDR training code. The device
shipped with U-boot, and the training code seems to be in flash_header.S
[2]. There's a large number of lines preceded by comments of the form
/* setmem /32 0x140000f8 = 0x00010101 */
which lends itself to a conversion into .imxcfg format. However,
there's quite a bit of code that doesn't appear to be doing simple
writes. Additionally, there's a lowlevel_init.S in the same directory.
There is a linker script putting flash_header.o at the beginning of the
binary image. Is it easier to just do that, bypassing imx-image? Or,
is there a conversion utility my google fu isn't pulling up?
thx,
Jason.
[1] https://github.com/SanDisk-Open-Source/wireless-media-drive
[2] https://github.com/SanDisk-Open-Source/wireless-media-drive/blob/master/u-boot-2009.08/board/freescale/mx50_rdp/flash_header.S
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^ permalink raw reply
* v2016.09.0
From: Sascha Hauer @ 2016-09-13 12:54 UTC (permalink / raw)
To: Barebox List
Hi All,
We have a September release, a little delayed this time, but still
before october begins.
The biggest user visible change with this release is that nv variables
are now saved automatically on shutdown/reset/boot whenever they
changed, so it's no longer necessary to do this manually (The
environment itself must still be saved manually though). The same
happens with state, it is saved automatically now also.
See a full list of patches below.
Sascha
----------------------------------------------------------------
Alexander Kurz (10):
scripts: imx: const function arguments
scripts: imx-usb-loader: const function args
scripts: imx-usb-loader: remove useless code
scripts: imx-usb-loader: remove useless variable
scripts: imx-usb-loader: structured protocol access
scripts: imx-usb-loader: split off topic-code into functions
mtd: spi-nor: add new variants
mc13xxx: make driver-provided SPI frequency overridable
ARM i.MX31: add SPI support
ARM i.MX31: Add i2c register convenience functions
Alexander Shiyan (4):
ARM: clps711x: clep7212: Increase the wait state for chip select 3
ARM: clps711x: Sync CLK susbsystem with kernel
ARM: clps711x: clep7212: Register board env during runtime
defaultenv: Unblank cursor at startup
Andrey Smirnov (7):
imx_thermal: Remove leftover debug output
mfd: syscon: Decouple syscon interface from platform devices
mfd: syscon: Don't check xzalloc return for NULL
mfd: syscon: Use IOMEM instead of explicit cast
i.MX: ocotp: Register regmap against orignal device
of_unflatten_dtb(): Check return value with IS_ERR
i.MX: scripts: Fix a bug in imx-image
Antony Pavlov (5):
Documentation: tplink-mr3020: fix 'Could not lex literal_block as "c"' warning
Documentation: barebox: fix 'Could not lex literal_block as "c"' warning
Documentation: variables: fix error in "code-block" directive
Documentation: usb: fix sphinx warning
Documentation: aarch64-qemu-virt: fix sphinx issues
Lucas Stach (6):
ARM: imx: add QP as supported i.MX6 variant
ARM: nitrogen6x: use upstream DTs
ARM: nitrogen6x: use imx6q_barebox_entry
ARM: nitrogen6x: disable address mirroring
ARM: add support for Nitrogen6MAX QP variant
ARM: nitrogen: rename to nitrogen6
Renaud Barbier (1):
bbu: parameters are inverted in error message
Sascha Hauer (50):
net: usb: use minimum timeout when polling for new packets
net: eth: open correct edev in eth_check_open
net: introduce for_each_netdev iterator
net: eth: add name to struct eth_device
net: Pass network device to net_answer_arp()
fs: Check for correct open mode
printk: Fix pr_cont
nv: Do not save nv variables while loading
nv: Save nv variables on shutdown
nv: Add option to explicitly save nv variables
nv: Allow to set/remove multiple variables with one command
nv: Use dev_remove_param to delete nv variable
state: Save on shutdown
blspec: remove unused blspec_boot_devicename
blspec: Remove once/default handling
blspec: remove unused function prototype
boot: Call blspec_scan_directory() only on strings containing an absolute path
lib: Add Kconfig symbol for FNMATCH
nv: Allow wildcards when removing NV vars
getopt: Add support for '--' to stop option parsing
include: Move bulk of boot.h to bootm.h
blpec: rename struct lspec -> bootentries
blspec: factor out a struct bootentry
bootentries: Add title/description
blspec: separate bootentries from blspec entries
blspec: Make blspec_boot static
bootentries: Move menu display string allocation to bootentries_alloc()
bootentries: Move struct bootentries to include/boot.h
boot: Use struct bootentries to pass around data
boot: Move code to common/
boot: add single quotes when printing boot target names
boot command: Explicitly complain when boot target list is empty
blspec: Turn message back to debug level
boot: Print a message when a boot target string does not lead to a boot target
dts: update to v4.7-rc6
dts: update to v4.7
Merge branch 'for-next/boot'
Merge branch 'for-next/clps711x'
Merge branch 'for-next/dts'
Merge branch 'for-next/imx'
Merge branch 'for-next/misc'
Merge branch 'for-next/net'
Merge branch 'for-next/nv'
Merge branch 'for-next/syscon'
Merge branch 'for-next/video-backlight'
ARM: vector_table: Fix creation of second level page table
video: backlight: fix the value of 'brightness_max'
commands: usbgadget: Fix -d option help text
blspec: Handle nfs:// pathes from boot
Release v2016.09.0
Steffen Trumtrar (1):
scripts: socfpga_get_sequencer: convert potential CRLF to LF
Teresa Remmet (1):
ARM: phytec-som-am335x: Remove kernel and oftree partiton in NAND
Ulrich Ölmann (3):
ARM: dts: i.MX6: update RIoTboard device tree
commands: ubiupdatevol: store return value of read() in a signed int
commands: ubiupdatevol: confirm success with return value 0
Uwe Kleine-König (2):
ARM: i.MX: pcm043: add a flash-header.imxcfg
xstrdup: don't panic on xstrdup(NULL)
Vicente Bergas (1):
fix ARMv8 interference with ARMv7
iw3gtf@arcor.de (4):
video/backlight-pwm: fixed a loop index going out of range.
video/backlight-pwm: fix the value of 'brightness_max'.
video/backlight-pwm: code readability improvement.
video/backlight-pwm: properly handle the case of an empty 'brightness-levels' in the device tree.
Documentation/boards/aarch64-qemu-virt.rst | 7 +-
Documentation/boards/mips/tplink-mr3020.rst | 12 +-
Documentation/user/barebox.rst | 60 ++-
Documentation/user/usb.rst | 4 +-
Documentation/user/variables.rst | 1 +
Makefile | 2 +-
arch/arm/Makefile | 3 +-
arch/arm/boards/Makefile | 2 +-
arch/arm/boards/archosg9/archos_features.c | 3 +-
.../1066mhz_4x128mx16.imxcfg | 0
.../1066mhz_4x256mx16.imxcfg | 0
.../1066mhz_4x512mx16-qp.imxcfg | 67 ++++
.../800mhz_4x128mx16.imxcfg | 0
.../800mhz_4x256mx16.imxcfg | 0
.../Makefile | 0
.../board.c | 15 +-
.../flash-header-nitrogen6dl-1g.imxcfg | 0
.../flash-header-nitrogen6dl-2g.imxcfg | 0
.../flash-header-nitrogen6q-1g.imxcfg | 0
.../flash-header-nitrogen6q-2g.imxcfg | 0
.../flash-header-nitrogen6qp-max.imxcfg | 10 +
.../lowlevel.c | 24 +-
.../ram-base.imxcfg | 4 +-
arch/arm/boards/clep7212/Makefile | 1 +
arch/arm/boards/clep7212/clep7212.c | 5 +-
.../clep7212/{env => defaultenv-clep7212}/boot/nor | 2 +-
.../{env => defaultenv-clep7212}/init/mtdparts-nor | 0
.../nv/autoboot_timeout | 0
.../clep7212/defaultenv-clep7212/nv/boot.default | 1 +
.../defaultenv-clep7212/nv/linux.bootargs.console | 1 +
.../defaultenv-clep7212/nv/linux.bootargs.debug | 1 +
arch/arm/boards/clep7212/env/init/bootsource | 9 -
.../boards/clep7212/env/nv/linux.bootargs.console | 1 -
arch/arm/boards/embest-riotboard/board.c | 2 +-
arch/arm/boards/highbank/init.c | 2 +-
.../phytec-phycore-imx35/flash-header.imxcfg | 37 ++
.../defaultenv-physom-am335x/boot/nand | 6 +-
arch/arm/configs/clps711x_defconfig | 29 +-
arch/arm/configs/imx_v7_defconfig | 2 +-
arch/arm/cpu/dtb.c | 2 +-
arch/arm/cpu/mmu.c | 2 +-
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/am335x-phytec-phycard-som.dtsi | 12 +-
arch/arm/dts/am335x-phytec-phycore-som.dtsi | 12 +-
arch/arm/dts/am335x-phytec-phyflex-som.dtsi | 12 +-
arch/arm/dts/imx6dl-nitrogen6x.dts | 8 +-
arch/arm/dts/imx6q-nitrogen6x.dts | 12 +-
arch/arm/dts/imx6qdl-nitrogen6_max.dtsi | 69 ++++
arch/arm/dts/imx6qdl-nitrogen6x.dtsi | 2 -
arch/arm/dts/imx6qp-nitrogen6_max.dts | 44 +++
arch/arm/dts/imx6s-riotboard.dts | 355 +-----------------
arch/arm/lib/bootm.c | 3 +-
arch/arm/mach-clps711x/Kconfig | 1 +
arch/arm/mach-clps711x/clock.c | 70 ++--
arch/arm/mach-clps711x/devices.c | 4 -
arch/arm/mach-imx/Kconfig | 4 +-
arch/arm/mach-imx/imx.c | 2 +
arch/arm/mach-imx/include/mach/devices-imx31.h | 21 +-
arch/arm/mach-imx/ocotp.c | 2 +-
arch/arm/mach-omap/omap_generic.c | 2 +-
arch/blackfin/lib/blackfin_linux.c | 1 +
arch/efi/efi/efi-image.c | 1 +
arch/mips/boot/dtb.c | 2 +-
arch/mips/lib/bootm.c | 1 +
arch/nios2/lib/bootm.c | 1 +
arch/openrisc/lib/dtb.c | 2 +-
arch/ppc/lib/ppclinux.c | 1 +
commands/Kconfig | 1 +
commands/boot.c | 415 ++-------------------
commands/bootm.c | 2 +-
commands/nv.c | 43 ++-
commands/ubi.c | 8 +-
commands/usbgadget.c | 2 +-
common/Kconfig | 5 +
common/Makefile | 1 +
common/bbu.c | 4 +-
common/blspec.c | 343 +++++++----------
common/boot.c | 340 +++++++++++++++++
common/bootm.c | 9 +-
common/environment.c | 4 +
common/globalvar.c | 134 ++++++-
common/image-fit.c | 2 +-
common/state/state.c | 15 +
common/state/state.h | 1 +
defaultenv/defaultenv-1/bin/init | 2 +-
defaultenv/defaultenv-2-base/bin/init | 1 +
drivers/aiodev/imx_thermal.c | 2 -
drivers/mfd/mc13xxx.c | 3 +-
drivers/mfd/syscon.c | 83 +++--
drivers/mtd/spi-nor/spi-nor.c | 5 +
drivers/net/usb/usbnet.c | 2 +-
drivers/spi/Kconfig | 2 +-
drivers/spi/imx_spi.c | 15 +-
drivers/usb/gadget/f_fastboot.c | 2 +-
drivers/video/backlight-pwm.c | 33 +-
dts/include/dt-bindings/input/linux-event-codes.h | 32 ++
dts/src/arm/armada-385-linksys.dtsi | 4 +-
dts/src/arm/sun4i-a10.dtsi | 21 +-
dts/src/arm/sun5i-a10s.dtsi | 11 +-
dts/src/arm/sun5i-r8-chip.dts | 2 +-
dts/src/arm/sun7i-a20.dtsi | 13 +-
dts/src/arm/tegra30-beaver.dts | 3 +-
fs/fs.c | 12 +-
images/Makefile.imx | 29 +-
include/blspec.h | 91 +----
include/boot.h | 139 ++-----
include/bootm.h | 125 +++++++
include/globalvar.h | 3 +
include/image-fit.h | 2 +-
include/net.h | 10 +
include/printk.h | 2 +-
include/spi/imx-spi.h | 7 +
lib/Kconfig | 3 +
lib/Makefile | 2 +-
lib/getopt.c | 5 +
lib/xfuncs.c | 7 +-
net/eth.c | 28 +-
net/net.c | 5 +-
scripts/imx/imx-image.c | 11 +-
scripts/imx/imx-usb-loader.c | 377 +++++++++----------
scripts/imx/imx.h | 7 +-
scripts/socfpga_get_sequencer | 2 +
122 files changed, 1715 insertions(+), 1680 deletions(-)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/1066mhz_4x128mx16.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/1066mhz_4x256mx16.imxcfg (100%)
create mode 100644 arch/arm/boards/boundarydevices-nitrogen6/1066mhz_4x512mx16-qp.imxcfg
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/800mhz_4x128mx16.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/800mhz_4x256mx16.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/Makefile (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/board.c (74%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/flash-header-nitrogen6dl-1g.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/flash-header-nitrogen6dl-2g.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/flash-header-nitrogen6q-1g.imxcfg (100%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/flash-header-nitrogen6q-2g.imxcfg (100%)
create mode 100644 arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/lowlevel.c (68%)
rename arch/arm/boards/{boundarydevices-nitrogen6x => boundarydevices-nitrogen6}/ram-base.imxcfg (95%)
rename arch/arm/boards/clep7212/{env => defaultenv-clep7212}/boot/nor (63%)
rename arch/arm/boards/clep7212/{env => defaultenv-clep7212}/init/mtdparts-nor (100%)
rename arch/arm/boards/clep7212/{env => defaultenv-clep7212}/nv/autoboot_timeout (100%)
create mode 100644 arch/arm/boards/clep7212/defaultenv-clep7212/nv/boot.default
create mode 100644 arch/arm/boards/clep7212/defaultenv-clep7212/nv/linux.bootargs.console
create mode 100644 arch/arm/boards/clep7212/defaultenv-clep7212/nv/linux.bootargs.debug
delete mode 100644 arch/arm/boards/clep7212/env/init/bootsource
delete mode 100644 arch/arm/boards/clep7212/env/nv/linux.bootargs.console
create mode 100644 arch/arm/boards/phytec-phycore-imx35/flash-header.imxcfg
create mode 100644 arch/arm/dts/imx6qdl-nitrogen6_max.dtsi
create mode 100644 arch/arm/dts/imx6qp-nitrogen6_max.dts
create mode 100644 common/boot.c
create mode 100644 include/bootm.h
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply
* Re: [PATCH 1/6] ARM: add common definitions for i.MX50 SOC
From: Sascha Hauer @ 2016-09-13 7:06 UTC (permalink / raw)
To: Alexander Kurz; +Cc: barebox
In-Reply-To: <alpine.DEB.2.00.1609120925590.3356@blala.de>
On Mon, Sep 12, 2016 at 10:17:18AM +0200, Alexander Kurz wrote:
>
>
> On Mon, 12 Sep 2016, Sascha Hauer wrote:
>
> > On Fri, Sep 09, 2016 at 05:43:39PM +0200, Alexander Kurz wrote:
> > > Signed-off-by: Alexander Kurz <akurz@blala.de>
> > > ---
> > > Documentation/boards/imx.rst | 1 +
> > > arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
> > > arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
> > > 3 files changed, 15 insertions(+)
> >
> > Seems to be straight forward to add i.MX50 support. I have nothing to
> > add, except: Applied, thanks
> >
> > Out of curiosity: What device do you use with i.MX50? Is it some E-Book
> > reader again?
> The imx50 has a build-in e-ink driver, so it is more or less a SOC
> tailored on e-books. It is used in some already outdated e-books like the
> 4th and 5th generation Kindles, some Kobos and Tolinos.
> The successor for the imx50 became the e-ink driver equiped variants
> of the imx6sl, which is used in most current generation e-book readers.
>
> While the current patchsets will enable barebox to run on different
> e-books e.g. when beeing booted via an installed bootloader, there is
> still an open issue: RAM initialization.
> Freescale used a "DRAMMC" which seems to be very unique to this SOC.
> Documentation on it is available in the Reference Manual, but it covers
> some details quite briefly.
> Related on barebox:
> it is not clear, whether DRAMMC initialization via imximg-DCD is possible
> at all. All existing bootloaders I have seen so far used some
> imximg-plugin code (which is currently not supported by barebox).
> A two-stage bootloader implementation via xload may be an alternative.
Yes, that could work. How I understand it the plugin image is
responsible for initializing SDRAM and for loading the final image.
Then the job of the ROM is done anyway, so normally I do not see a
reason for plugin images. The only usecase seems to be HAB when the
final image is checked by the HAB code when returning to ROM.
>
> One note "ARM i.MX50: Add iomux definitions for non-DT board
> implementations": this patch enables non-DT board code.
> While DT implementations of new board code would be a better choice,
> DT-based board code is currently not able to pass ATAGs. At least some
> Kindle-Kernels still rely on ATAGs.
You can call 'oftree -f'. This will release the internal device tree and
then ATAGs will be used to call the kernel. I'm not that happy about the
API how this is done but it should work.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply
* Re: [PATCH 1/6] ARM: add common definitions for i.MX50 SOC
From: Jason Cooper @ 2016-09-12 18:03 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox, Alexander Kurz
In-Reply-To: <20160912062643.6ulohzrsmt44uwvi@pengutronix.de>
On Mon, Sep 12, 2016 at 08:26:43AM +0200, Sascha Hauer wrote:
> On Fri, Sep 09, 2016 at 05:43:39PM +0200, Alexander Kurz wrote:
> > Signed-off-by: Alexander Kurz <akurz@blala.de>
> > ---
> > Documentation/boards/imx.rst | 1 +
> > arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
> > arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
> > 3 files changed, 15 insertions(+)
>
> Seems to be straight forward to add i.MX50 support. I have nothing to
> add, except: Applied, thanks
>
> Out of curiosity: What device do you use with i.MX50? Is it some E-Book
> reader again?
http://downloads.sandisk.com/downloads/qsg/wmd-qsg-en.pdf
Has an i.MX50 with a ti wifi card. Basically a battery powered hotspot.
Now I gotta go see if I can find it in my box 'o boards. :-)
thx,
Jason.
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^ permalink raw reply
* [PATCH] commands: exit on invalid option
From: Enrico Jorns @ 2016-09-12 10:20 UTC (permalink / raw)
To: barebox; +Cc: Enrico Jorns
Barebox commands should not perform any action and return 0 if an
invalid parameter was given. This might cause undetected unintended
behvaior when calling commands with wrong options, either manually or
from a script.
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
---
commands/boot.c | 2 ++
commands/bootm.c | 2 +-
commands/dhcp.c | 2 ++
commands/fbtest.c | 2 ++
commands/hashsum.c | 2 ++
commands/help.c | 2 ++
commands/hwclock.c | 2 ++
commands/linux16.c | 2 ++
commands/loadb.c | 3 +--
commands/loadxy.c | 3 +--
commands/ls.c | 2 ++
commands/mem.c | 2 +-
commands/menutree.c | 2 ++
commands/reset.c | 2 ++
commands/splash.c | 2 ++
commands/usb.c | 2 ++
commands/usbserial.c | 2 ++
17 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/commands/boot.c b/commands/boot.c
index 1ff0e19..284b209 100644
--- a/commands/boot.c
+++ b/commands/boot.c
@@ -53,6 +53,8 @@ static int do_boot(int argc, char *argv[])
case 'w':
boot_set_watchdog_timeout(simple_strtoul(optarg, NULL, 0));
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/bootm.c b/commands/bootm.c
index 61b9086..c7cbdbe 100644
--- a/commands/bootm.c
+++ b/commands/bootm.c
@@ -97,7 +97,7 @@ static int do_bootm(int argc, char *argv[])
data.dryrun = 1;
break;
default:
- break;
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/dhcp.c b/commands/dhcp.c
index eb98bfc..4f4f549 100644
--- a/commands/dhcp.c
+++ b/commands/dhcp.c
@@ -45,6 +45,8 @@ static int do_dhcp(int argc, char *argv[])
case 'r':
retries = simple_strtoul(optarg, NULL, 10);
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/fbtest.c b/commands/fbtest.c
index d070d1f..bd0e140 100644
--- a/commands/fbtest.c
+++ b/commands/fbtest.c
@@ -137,6 +137,8 @@ static int do_fbtest(int argc, char *argv[])
case 'c':
color = simple_strtoul(optarg, NULL, 16);
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/hashsum.c b/commands/hashsum.c
index d05e571..70aab2c 100644
--- a/commands/hashsum.c
+++ b/commands/hashsum.c
@@ -42,6 +42,8 @@ static int do_hash(char *algo, int argc, char *argv[])
key = optarg;
keylen = strlen(key);
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/help.c b/commands/help.c
index 3d36d9b..819c406 100644
--- a/commands/help.c
+++ b/commands/help.c
@@ -98,6 +98,8 @@ static int do_help(int argc, char *argv[])
case 'a':
all = 1;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/hwclock.c b/commands/hwclock.c
index 6a0fe03..5073618 100644
--- a/commands/hwclock.c
+++ b/commands/hwclock.c
@@ -123,6 +123,8 @@ static int do_hwclock(int argc, char *argv[])
ntp_to_hw = 1;
ntpserver = optarg;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/linux16.c b/commands/linux16.c
index bb678bd..db8d081 100644
--- a/commands/linux16.c
+++ b/commands/linux16.c
@@ -176,6 +176,8 @@ static int do_linux16(int argc, char *argv[])
}
}
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/loadb.c b/commands/loadb.c
index 6180ce3..8c3906c 100644
--- a/commands/loadb.c
+++ b/commands/loadb.c
@@ -634,8 +634,7 @@ static int do_load_serial_bin(int argc, char *argv[])
console_dev_name = optarg;
break;
default:
- perror(argv[0]);
- return 1;
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/loadxy.c b/commands/loadxy.c
index a4b1bec..a2aab0f 100644
--- a/commands/loadxy.c
+++ b/commands/loadxy.c
@@ -67,8 +67,7 @@ static int do_loady(int argc, char *argv[])
cname = optarg;
break;
default:
- perror(argv[0]);
- return 1;
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/ls.c b/commands/ls.c
index ce02f16..331a4d2 100644
--- a/commands/ls.c
+++ b/commands/ls.c
@@ -143,6 +143,8 @@ static int do_ls(int argc, char *argv[])
case 'l':
flags &= ~LS_COLUMN;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/mem.c b/commands/mem.c
index 907f1f7..29eaa80 100644
--- a/commands/mem.c
+++ b/commands/mem.c
@@ -74,7 +74,7 @@ int mem_parse_options(int argc, char *argv[], char *optstr, int *mode,
*swab = 1;
break;
default:
- return -1;
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/menutree.c b/commands/menutree.c
index ea5f65f..cf37b01 100644
--- a/commands/menutree.c
+++ b/commands/menutree.c
@@ -26,6 +26,8 @@ static int do_menutree(int argc, char *argv[])
case 'm':
path = optarg;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/reset.c b/commands/reset.c
index 8300480..6eac532 100644
--- a/commands/reset.c
+++ b/commands/reset.c
@@ -34,6 +34,8 @@ static int cmd_reset(int argc, char *argv[])
case 'f':
shutdown_flag = 0;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/splash.c b/commands/splash.c
index 15b296b..2b70b29 100644
--- a/commands/splash.c
+++ b/commands/splash.c
@@ -41,6 +41,8 @@ static int do_splash(int argc, char *argv[])
case 'y':
s.y = simple_strtoul(optarg, NULL, 0);
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/usb.c b/commands/usb.c
index 48c6619..9a23aa2 100644
--- a/commands/usb.c
+++ b/commands/usb.c
@@ -123,6 +123,8 @@ static int do_usb(int argc, char *argv[])
case 's':
show = 1;
break;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
diff --git a/commands/usbserial.c b/commands/usbserial.c
index e80b315..ad6bc63 100644
--- a/commands/usbserial.c
+++ b/commands/usbserial.c
@@ -44,6 +44,8 @@ static int do_usbserial(int argc, char *argv[])
case 'd':
usb_serial_unregister();
return 0;
+ default:
+ return COMMAND_ERROR_USAGE;
}
}
--
2.8.1
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^ permalink raw reply related
* Re: [PATCH 1/6] ARM: add common definitions for i.MX50 SOC
From: Alexander Kurz @ 2016-09-12 8:17 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
In-Reply-To: <20160912062643.6ulohzrsmt44uwvi@pengutronix.de>
On Mon, 12 Sep 2016, Sascha Hauer wrote:
> On Fri, Sep 09, 2016 at 05:43:39PM +0200, Alexander Kurz wrote:
> > Signed-off-by: Alexander Kurz <akurz@blala.de>
> > ---
> > Documentation/boards/imx.rst | 1 +
> > arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
> > arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
> > 3 files changed, 15 insertions(+)
>
> Seems to be straight forward to add i.MX50 support. I have nothing to
> add, except: Applied, thanks
>
> Out of curiosity: What device do you use with i.MX50? Is it some E-Book
> reader again?
The imx50 has a build-in e-ink driver, so it is more or less a SOC
tailored on e-books. It is used in some already outdated e-books like the
4th and 5th generation Kindles, some Kobos and Tolinos.
The successor for the imx50 became the e-ink driver equiped variants
of the imx6sl, which is used in most current generation e-book readers.
While the current patchsets will enable barebox to run on different
e-books e.g. when beeing booted via an installed bootloader, there is
still an open issue: RAM initialization.
Freescale used a "DRAMMC" which seems to be very unique to this SOC.
Documentation on it is available in the Reference Manual, but it covers
some details quite briefly.
Related on barebox:
it is not clear, whether DRAMMC initialization via imximg-DCD is possible
at all. All existing bootloaders I have seen so far used some
imximg-plugin code (which is currently not supported by barebox).
A two-stage bootloader implementation via xload may be an alternative.
One note "ARM i.MX50: Add iomux definitions for non-DT board
implementations": this patch enables non-DT board code.
While DT implementations of new board code would be a better choice,
DT-based board code is currently not able to pass ATAGs. At least some
Kindle-Kernels still rely on ATAGs.
Cheers, Alexander
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