* [PATCH 05/20] i.MX: Add pinctrl driver for VF610
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pinctrl/Kconfig | 5 ++
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-vf610.c | 118 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 124 insertions(+)
create mode 100644 drivers/pinctrl/pinctrl-vf610.c
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 5c69928..12fff4f 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -77,4 +77,9 @@ config PINCTRL_TEGRA_XUSB
source drivers/pinctrl/mvebu/Kconfig
+config PINCTRL_VF610
+ bool
+ default y if ARCH_VF610
+ help
+ Pinmux controller found on Vybrid VF610 family of SoCs
endif
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index af9b30d..9450dbb 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o
obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
obj-$(CONFIG_PINCTRL_TEGRA_XUSB) += pinctrl-tegra-xusb.o
+obj-$(CONFIG_PINCTRL_VF610) += pinctrl-vf610.o
obj-$(CONFIG_ARCH_MVEBU) += mvebu/
diff --git a/drivers/pinctrl/pinctrl-vf610.c b/drivers/pinctrl/pinctrl-vf610.c
new file mode 100644
index 0000000..e1d59e9
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-vf610.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <pinctrl.h>
+#include <malloc.h>
+
+enum {
+ PINCTRL_VF610_MUX_LINE_SIZE = 20,
+ PINCTRL_VF610_MUX_SHIFT = 20,
+};
+
+struct pinctrl_vf610 {
+ void __iomem *base;
+ struct pinctrl_device pinctrl;
+};
+
+static int pinctrl_vf610_set_state(struct pinctrl_device *pdev,
+ struct device_node *np)
+{
+ const __be32 *list;
+ int npins, size, i;
+
+ struct pinctrl_vf610 *iomux =
+ container_of(pdev, struct pinctrl_vf610, pinctrl);
+
+ dev_dbg(pdev->dev, "%s: %s\n", __func__, np->full_name);
+
+ list = of_get_property(np, "fsl,pins", &size);
+ if (!list)
+ return -EINVAL;
+
+ if (!size || size % PINCTRL_VF610_MUX_LINE_SIZE) {
+ dev_err(pdev->dev, "Invalid fsl,pins property in %s\n",
+ np->full_name);
+ return -EINVAL;
+ }
+
+ npins = size / PINCTRL_VF610_MUX_LINE_SIZE;
+
+ for (i = 0; i < npins; i++) {
+ u32 mux_reg = be32_to_cpu(*list++);
+ u32 input_reg = be32_to_cpu(*list++);
+ u32 mux_val = be32_to_cpu(*list++);
+ u32 input_val = be32_to_cpu(*list++);
+ u32 conf_val = be32_to_cpu(*list++);
+
+ writel(mux_val << PINCTRL_VF610_MUX_SHIFT | conf_val,
+ iomux->base + mux_reg);
+
+ if (input_reg)
+ writel(input_val, iomux->base + input_reg);
+ }
+
+ return 0;
+}
+
+static struct pinctrl_ops pinctrl_vf610_ops = {
+ .set_state = pinctrl_vf610_set_state,
+};
+
+static int pinctrl_vf610_probe(struct device_d *dev)
+{
+ int ret;
+ struct resource *io;
+ struct pinctrl_vf610 *iomux;
+
+ iomux = xzalloc(sizeof(*iomux));
+
+ io = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(io))
+ return PTR_ERR(io);
+
+ iomux->base = IOMEM(io->start);
+ iomux->pinctrl.dev = dev;
+ iomux->pinctrl.ops = &pinctrl_vf610_ops;
+
+ ret = pinctrl_register(&iomux->pinctrl);
+ if (ret)
+ free(iomux);
+
+ return ret;
+}
+
+static __maybe_unused struct of_device_id pinctrl_vf610_dt_ids[] = {
+ { .compatible = "fsl,vf610-iomuxc", },
+ { /* sentinel */ }
+};
+
+static struct driver_d pinctrl_vf610_driver = {
+ .name = "vf610-pinctrl",
+ .probe = pinctrl_vf610_probe,
+ .of_compatible = DRV_OF_COMPAT(pinctrl_vf610_dt_ids),
+};
+
+static int pinctrl_vf610_init(void)
+{
+ return platform_driver_register(&pinctrl_vf610_driver);
+}
+postcore_initcall(pinctrl_vf610_init);
--
2.5.5
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* [PATCH 12/20] vf610: Give enet_osc explicit "enet_ext" name
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Give enet_osc explicit "enet_ext" name, since without it, Barebox
version of clk_set_parent fails when trying to re-parent "enet_sel".
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/dts/vf610-twr.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
index 54b4435..5947fdb 100644
--- a/arch/arm/dts/vf610-twr.dts
+++ b/arch/arm/dts/vf610-twr.dts
@@ -12,3 +12,7 @@
&usbdev0 {
status = "disabled";
};
+
+&enet_ext {
+ clock-output-names = "enet_ext";
+};
--
2.5.5
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* [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and imx_obtain_fixed_clock()
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Port imx_check_clocks() and imx_obtain_fixed_clock() from Linux kernel.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/clk.h | 4 ++++
drivers/clk/Makefile | 1 +
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 55 insertions(+)
create mode 100644 drivers/clk/imx/Makefile
create mode 100644 drivers/clk/imx/clk.c
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 35e480f..f96e5d2 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -109,4 +109,8 @@ static inline struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg,
struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
void __iomem *reg, u8 shift, u32 exclusive_mask);
+void imx_check_clocks(struct clk *clks[], unsigned int count);
+struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate);
+
+
#endif /* __IMX_CLK_H */
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 0fe8f1e..6dc82ea 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_CLK_SOCFPGA) += socfpga.o
obj-$(CONFIG_MACH_MIPS_ATH79) += clk-ar933x.o
+obj-$(CONFIG_COMMON_CLK) += imx/
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
new file mode 100644
index 0000000..0303c0b
--- /dev/null
+++ b/drivers/clk/imx/Makefile
@@ -0,0 +1 @@
+obj-y += clk.o
diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
new file mode 100644
index 0000000..0357048
--- /dev/null
+++ b/drivers/clk/imx/clk.c
@@ -0,0 +1,49 @@
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <linux/clk.h>
+#include <io.h>
+#include <of.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+
+#include "../../../arch/arm/mach-imx/clk.h"
+
+void __init imx_check_clocks(struct clk *clks[], unsigned int count)
+{
+ unsigned i;
+
+ for (i = 0; i < count; i++)
+ if (IS_ERR(clks[i]))
+ pr_err("i.MX clk %u: register failed with %ld\n",
+ i, PTR_ERR(clks[i]));
+}
+
+static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
+{
+ struct of_phandle_args phandle;
+ struct clk *clk = ERR_PTR(-ENODEV);
+ char *path;
+
+ path = basprintf("/clocks/%s", name);
+ if (!path)
+ return ERR_PTR(-ENOMEM);
+
+ phandle.np = of_find_node_by_path(path);
+ kfree(path);
+
+ if (phandle.np)
+ clk = of_clk_get_from_provider(&phandle);
+
+ return clk;
+}
+
+struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate)
+{
+ struct clk *clk;
+
+ clk = imx_obtain_fixed_clock_from_dt(name);
+ if (IS_ERR(clk))
+ clk = clk_fixed(name, rate);
+ return clk;
+}
--
2.5.5
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* [PATCH 03/20] i.MX: scripts: Add "vf610" soc to imx-image
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Needed in order to support Vybrid SoCs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
scripts/imx/imx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c
index c8ee309..bd48321 100644
--- a/scripts/imx/imx.c
+++ b/scripts/imx/imx.c
@@ -223,6 +223,7 @@ static struct soc_type socs[] = {
{ .name = "imx51", .header_version = 1, .cpu_type = IMX_CPU_IMX51 },
{ .name = "imx53", .header_version = 2, .cpu_type = IMX_CPU_IMX53 },
{ .name = "imx6", .header_version = 2, .cpu_type = IMX_CPU_IMX6 },
+ { .name = "vf610", .header_version = 2, .cpu_type = IMX_CPU_VF610 },
};
static int do_soc(struct config_data *data, int argc, char *argv[])
--
2.5.5
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* [PATCH 08/20] i.MX: clk: Port imx_clk_gate2_cgr()
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Update clk-gate2 code to be able to accept arbitrary 'cgr' value and
introduce imx_clk_gate2_cgr() (Used by Vybrid clock tree)
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/clk-gate2.c | 12 +++++++-----
arch/arm/mach-imx/clk.h | 11 +++++++++--
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index faed631..f952f3e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -26,6 +26,7 @@ struct clk_gate2 {
struct clk clk;
void __iomem *reg;
int shift;
+ u8 cgr_val;
const char *parent;
#define CLK_GATE_INVERTED (1 << 0)
unsigned flags;
@@ -43,7 +44,7 @@ static int clk_gate2_enable(struct clk *clk)
if (g->flags & CLK_GATE_INVERTED)
val &= ~(3 << g->shift);
else
- val |= 3 << g->shift;
+ val |= g->cgr_val << g->shift;
writel(val, g->reg);
@@ -87,12 +88,13 @@ static struct clk_ops clk_gate2_ops = {
};
struct clk *clk_gate2_alloc(const char *name, const char *parent,
- void __iomem *reg, u8 shift)
+ void __iomem *reg, u8 shift, u8 cgr_val)
{
struct clk_gate2 *g = xzalloc(sizeof(*g));
g->parent = parent;
g->reg = reg;
+ g->cgr_val = cgr_val;
g->shift = shift;
g->clk.ops = &clk_gate2_ops;
g->clk.name = name;
@@ -111,12 +113,12 @@ void clk_gate2_free(struct clk *clk)
}
struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
- u8 shift)
+ u8 shift, u8 cgr_val)
{
struct clk *g;
int ret;
- g = clk_gate2_alloc(name , parent, reg, shift);
+ g = clk_gate2_alloc(name , parent, reg, shift, cgr_val);
ret = clk_register(g);
if (ret) {
@@ -133,7 +135,7 @@ struct clk *clk_gate2_inverted(const char *name, const char *parent,
struct clk *clk;
struct clk_gate2 *g;
- clk = clk_gate2(name, parent, reg, shift);
+ clk = clk_gate2(name, parent, reg, shift, 0x3);
if (IS_ERR(clk))
return clk;
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index c5913e1..2aeb356 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -2,7 +2,7 @@
#define __IMX_CLK_H
struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
- u8 shift);
+ u8 shift, u8 cgr_val);
static inline struct clk *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
@@ -51,9 +51,16 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent,
static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
- return clk_gate2(name, parent, reg, shift);
+ return clk_gate2(name, parent, reg, shift, 0x3);
}
+static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent,
+ void __iomem *reg, u8 shift, u8 cgr_val)
+{
+ return clk_gate2(name, parent, reg, shift, cgr_val);
+}
+
+
struct clk *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);
--
2.5.5
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* [PATCH 09/20] i.MX: clk: Add IMX_PLLV3_USB_VF610 support
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Add IMX_PLLV3_USB_VF610 PLLv3 types support clk-pllv3.c
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/clk-pllv3.c | 9 ++++++---
arch/arm/mach-imx/clk.h | 1 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index e38dcdf..29c0f1c 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -36,6 +36,7 @@ struct clk_pllv3 {
void __iomem *base;
bool powerup_set;
u32 div_mask;
+ u32 div_shift;
const char *parent;
};
@@ -92,7 +93,7 @@ static unsigned long clk_pllv3_recalc_rate(struct clk *clk,
unsigned long parent_rate)
{
struct clk_pllv3 *pll = to_clk_pllv3(clk);
- u32 div = readl(pll->base) & pll->div_mask;
+ u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask;
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
}
@@ -120,8 +121,8 @@ static int clk_pllv3_set_rate(struct clk *clk, unsigned long rate,
return -EINVAL;
val = readl(pll->base);
- val &= ~pll->div_mask;
- val |= div;
+ val &= ~(pll->div_mask << pll->div_shift);
+ val |= div << pll->div_shift;
writel(val, pll->base);
return 0;
@@ -292,6 +293,8 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
case IMX_PLLV3_SYS:
ops = &clk_pllv3_sys_ops;
break;
+ case IMX_PLLV3_USB_VF610:
+ pll->div_shift = 1;
case IMX_PLLV3_USB:
ops = &clk_pllv3_ops;
pll->powerup_set = true;
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 2aeb356..35e480f 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -71,6 +71,7 @@ enum imx_pllv3_type {
IMX_PLLV3_GENERIC,
IMX_PLLV3_SYS,
IMX_PLLV3_USB,
+ IMX_PLLV3_USB_VF610,
IMX_PLLV3_AV,
IMX_PLLV3_ENET,
IMX_PLLV3_MLB,
--
2.5.5
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* [PATCH 01/20] i.MX: Add primitive functions for VF610 family
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475505657-898-1-git-send-email-andrew.smirnov@gmail.com>
Add very basic functions to support VF610 family.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/Kconfig | 10 ++++++++++
arch/arm/mach-imx/cpu_init.c | 5 +++++
arch/arm/mach-imx/imx.c | 4 ++++
arch/arm/mach-imx/include/mach/generic.h | 13 +++++++++++++
arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
5 files changed, 33 insertions(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index a80bc6b..71862ef 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -149,6 +149,16 @@ config ARCH_IMX6SX
select OFTREE
select COMMON_CLK_OF_PROVIDER
+config ARCH_VF610
+ bool
+ select ARCH_HAS_L2X0
+ select ARCH_HAS_FEC_IMX
+ select CPU_V7
+ select PINCTRL
+ select OFTREE
+ select COMMON_CLK
+ select COMMON_CLK_OF_PROVIDER
+
config IMX_MULTI_BOARDS
bool "Allow multiple boards to be selected"
select HAVE_DEFAULT_ENVIRONMENT_NEW
diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index 7603883..6971d89 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -33,3 +33,8 @@ void imx6_cpu_lowlevel_init(void)
enable_arm_errata_794072_war();
enable_arm_errata_845369_war();
}
+
+void vf610_cpu_lowlevel_init(void)
+{
+ arm_cpu_lowlevel_init();
+}
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 5ab6afc..eb2adcd 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -63,6 +63,8 @@ static int imx_soc_from_dt(void)
return IMX_CPU_IMX6;
if (of_machine_is_compatible("fsl,imx6qp"))
return IMX_CPU_IMX6;
+ if (of_machine_is_compatible("fsl,vf610"))
+ return IMX_CPU_VF610;
return 0;
}
@@ -99,6 +101,8 @@ static int imx_init(void)
ret = imx53_init();
else if (cpu_is_mx6())
ret = imx6_init();
+ else if (cpu_is_vf610())
+ ret = 0;
else
return -EINVAL;
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index cadc501..ec35edc 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -41,6 +41,7 @@ int imx6_devices_init(void);
void imx5_cpu_lowlevel_init(void);
void imx6_cpu_lowlevel_init(void);
+void vf610_cpu_lowlevel_init(void);
/* There's a off-by-one betweem the gpio bank number and the gpiochip */
/* range e.g. GPIO_1_5 is gpio 5 under linux */
@@ -169,6 +170,18 @@ extern unsigned int __imx_cpu_type;
# define cpu_is_mx6() (0)
#endif
+#ifdef CONFIG_ARCH_VF610
+# ifdef imx_cpu_type
+# undef imx_cpu_type
+# define imx_cpu_type __imx_cpu_type
+# else
+# define imx_cpu_type IMX_CPU_VF610
+# endif
+# define cpu_is_vf610() (imx_cpu_type == IMX_CPU_VF610)
+#else
+# define cpu_is_vf610() (0)
+#endif
+
#define cpu_is_mx23() (0)
#define cpu_is_mx28() (0)
diff --git a/arch/arm/mach-imx/include/mach/imx_cpu_types.h b/arch/arm/mach-imx/include/mach/imx_cpu_types.h
index 8472488..50be0b6 100644
--- a/arch/arm/mach-imx/include/mach/imx_cpu_types.h
+++ b/arch/arm/mach-imx/include/mach/imx_cpu_types.h
@@ -11,5 +11,6 @@
#define IMX_CPU_IMX51 51
#define IMX_CPU_IMX53 53
#define IMX_CPU_IMX6 6
+#define IMX_CPU_VF610 610
#endif /* __MACH_IMX_CPU_TYPES_H */
--
2.5.5
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* [PATCH 00/20] Vybrid support in Barebox
From: Andrey Smirnov @ 2016-10-03 14:40 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Hello all,
This series adds some level of support for Vybrid family of SoCs in
Barebox. The development of this code was mostly being done on VF610
Tower board with some additional verification and testing on a custom
Vyrid base board (which in its core mimics Tower board).
Here's what I belive is supported with this series (every item assumes
VF610 Tower board as target HW):
- Booting :-)
- DEBUG_LL
- Clock tree
- Serial
- I2C
- SD card
I am sure this is not the final version of the patchset and I'll have
iterate on this code a couple of times. Any feedback on the code is
greatly appreciated.
Thank you,
Andrey Smirnov
Andrey Smirnov (20):
i.MX: Add primitive functions for VF610 family
i.MX: Add DEBUG_LL hooks for VF610
i.MX: scripts: Add "vf610" soc to imx-image
i.MX: Add support for VF610 Tower board
i.MX: Add pinctrl driver for VF610
clk: Port clock dependency resolution code
clk: Port of_clk_set_defautls()
i.MX: clk: Port imx_clk_gate2_cgr()
i.MX: clk: Add IMX_PLLV3_USB_VF610 support
i.MX: clk: Port imx_check_clocks() and imx_obtain_fixed_clock()
i.MX: Add VF610 clock tree initialization code
vf610: Give enet_osc explicit "enet_ext" name
i.MX: Add 'lpuart' serial driver
i.MX: i2c-imx: Add Vybrid support
i.MX: esdhc: Do not rely on CPU type for quirks
i.MX: Kconfig: Enable OCOTP on Vybrid
i.MX: ocotp: Remove unused #define
i.MX: ocotp: Account for shadow memory gaps
i.MX: ocotp: Add Vybrid support
imx-esdhc: Request "per" clock explicitly
arch/arm/boards/Makefile | 3 +-
arch/arm/boards/freescale-vf610-twr/Makefile | 4 +
arch/arm/boards/freescale-vf610-twr/board.c | 61 +
.../flash-header-vf610-twr.imxcfg | 277 +++++
arch/arm/boards/freescale-vf610-twr/lowlevel.c | 45 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/vf610-twr.dts | 18 +
arch/arm/mach-imx/Kconfig | 16 +-
arch/arm/mach-imx/clk-gate2.c | 12 +-
arch/arm/mach-imx/clk-pllv3.c | 9 +-
arch/arm/mach-imx/clk.h | 16 +-
arch/arm/mach-imx/cpu_init.c | 5 +
arch/arm/mach-imx/imx.c | 4 +
arch/arm/mach-imx/include/mach/clock-vf610.h | 215 ++++
arch/arm/mach-imx/include/mach/debug_ll.h | 27 +-
arch/arm/mach-imx/include/mach/generic.h | 13 +
arch/arm/mach-imx/include/mach/imx_cpu_types.h | 1 +
arch/arm/mach-imx/include/mach/iomux-vf610.h | 258 +++++
arch/arm/mach-imx/include/mach/vf610-regs.h | 126 ++
arch/arm/mach-imx/ocotp.c | 51 +-
common/Kconfig | 10 +-
drivers/clk/Makefile | 3 +-
drivers/clk/clk-conf.c | 144 +++
drivers/clk/clk.c | 91 +-
drivers/clk/imx/Makefile | 2 +
drivers/clk/imx/clk-vf610.c | 1224 ++++++++++++++++++++
drivers/clk/imx/clk.c | 49 +
drivers/i2c/busses/i2c-imx.c | 215 +++-
drivers/mci/imx-esdhc.c | 123 +-
drivers/pinctrl/Kconfig | 5 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-vf610.c | 118 ++
drivers/serial/Kconfig | 4 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_lpuart.c | 217 ++++
images/Makefile.imx | 5 +
include/linux/clk/clk-conf.h | 22 +
include/serial/lpuart.h | 281 +++++
scripts/imx/imx.c | 1 +
39 files changed, 3575 insertions(+), 103 deletions(-)
create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
create mode 100644 arch/arm/dts/vf610-twr.dts
create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h
create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
create mode 100644 drivers/clk/clk-conf.c
create mode 100644 drivers/clk/imx/Makefile
create mode 100644 drivers/clk/imx/clk-vf610.c
create mode 100644 drivers/clk/imx/clk.c
create mode 100644 drivers/pinctrl/pinctrl-vf610.c
create mode 100644 drivers/serial/serial_lpuart.c
create mode 100644 include/linux/clk/clk-conf.h
create mode 100644 include/serial/lpuart.h
--
2.5.5
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^ permalink raw reply
* [PATCH] sandbox: Makefile: drop unused SUBARCH stuff
From: Antony Pavlov @ 2016-10-03 11:56 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/sandbox/Makefile | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/sandbox/Makefile b/arch/sandbox/Makefile
index a539a90..8155a79 100644
--- a/arch/sandbox/Makefile
+++ b/arch/sandbox/Makefile
@@ -31,11 +31,6 @@ else
CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
endif
-SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
- -e s/arm.*/arm/ -e s/sa110/arm/ \
- -e s/s390x/s390/ -e s/parisc64/parisc/ \
- -e s/ppc.*/powerpc/ -e s/mips.*/mips/ )
-
archprepare: maketools
PHONY += maketools
--
2.9.3
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* [PATCH] net/phy: marvell: fix error handling
From: Uwe Kleine-König @ 2016-09-30 20:10 UTC (permalink / raw)
To: barebox
Without first assigning to ret it doesn't make sense to check it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/net/phy/marvell.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 6409f14ae2e2..9a963f6d5e61 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -198,7 +198,8 @@ static int m88e1121_config_init(struct phy_device *phydev)
if (ret < 0)
return ret;
- phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_PHY_DEFAULT_PAGE);
+ ret = phy_write(phydev, MII_MARVELL_PHY_PAGE,
+ MII_MARVELL_PHY_DEFAULT_PAGE);
if (ret < 0)
return ret;
--
2.9.3
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* [PATCH 0/2] H100 support
From: Lucas Stach @ 2016-09-30 16:03 UTC (permalink / raw)
To: barebox
This adds support for the H100 baseboard. Series is on top of -next
as the base DT for this board is only in Linux 4.8.
Lucas Stach (2):
ARM: microsom: use imx6q_barebox_entry
ARM: imx6: add support for Auvidea H100
arch/arm/boards/solidrun-microsom/board.c | 16 ++++++-
arch/arm/boards/solidrun-microsom/lowlevel.c | 24 +++++++---
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/imx6q-h100.dts | 70 ++++++++++++++++++++++++++++
images/Makefile.imx | 5 ++
5 files changed, 108 insertions(+), 9 deletions(-)
create mode 100644 arch/arm/dts/imx6q-h100.dts
--
2.9.3
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^ permalink raw reply
* [PATCH 1/2] ARM: microsom: use imx6q_barebox_entry
From: Lucas Stach @ 2016-09-30 16:04 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930160401.21147-1-l.stach@pengutronix.de>
Instead of hardcoding the different RAM sizes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/boards/solidrun-microsom/lowlevel.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c
index 54f1cdf9f4ea..3d5ab7a13f42 100644
--- a/arch/arm/boards/solidrun-microsom/lowlevel.c
+++ b/arch/arm/boards/solidrun-microsom/lowlevel.c
@@ -1,8 +1,7 @@
+#include <asm/barebox-arm.h>
#include <common.h>
-#include <linux/sizes.h>
+#include <mach/esdctl.h>
#include <mach/generic.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
extern char __dtb_imx6dl_hummingboard_start[];
extern char __dtb_imx6q_hummingboard_start[];
@@ -14,7 +13,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i1, r0, r1, r2)
imx6_cpu_lowlevel_init();
fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset();
- barebox_arm_entry(0x10000000, SZ_512M, fdt);
+ imx6q_barebox_entry(fdt);
}
ENTRY_FUNCTION(start_hummingboard_microsom_i2, r0, r1, r2)
@@ -24,7 +23,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i2, r0, r1, r2)
imx6_cpu_lowlevel_init();
fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset();
- barebox_arm_entry(0x10000000, SZ_1G, fdt);
+ imx6q_barebox_entry(fdt);
}
ENTRY_FUNCTION(start_hummingboard_microsom_i2ex, r0, r1, r2)
@@ -34,7 +33,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i2ex, r0, r1, r2)
imx6_cpu_lowlevel_init();
fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset();
- barebox_arm_entry(0x10000000, SZ_1G, fdt);
+ imx6q_barebox_entry(fdt);
}
ENTRY_FUNCTION(start_hummingboard_microsom_i4, r0, r1, r2)
@@ -44,5 +43,5 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i4, r0, r1, r2)
imx6_cpu_lowlevel_init();
fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset();
- barebox_arm_entry(0x10000000, SZ_2G, fdt);
+ imx6q_barebox_entry(fdt);
}
--
2.9.3
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* [PATCH 2/2] ARM: imx6: add support for Auvidea H100
From: Lucas Stach @ 2016-09-30 16:04 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930160401.21147-1-l.stach@pengutronix.de>
The Auvidea H100 is a baseboard for the SolidRun MicroSOM, which
provides HDMI IN/OUT capabilities.
Currently supported is only a combination of the H100 baseboard
with a i2eX MicroSOM.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/boards/solidrun-microsom/board.c | 16 ++++++-
arch/arm/boards/solidrun-microsom/lowlevel.c | 11 +++++
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/imx6q-h100.dts | 70 ++++++++++++++++++++++++++++
images/Makefile.imx | 5 ++
5 files changed, 102 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/dts/imx6q-h100.dts
diff --git a/arch/arm/boards/solidrun-microsom/board.c b/arch/arm/boards/solidrun-microsom/board.c
index 28a60b9e8c79..b9041687e49c 100644
--- a/arch/arm/boards/solidrun-microsom/board.c
+++ b/arch/arm/boards/solidrun-microsom/board.c
@@ -93,10 +93,24 @@ static int hummingboard_device_init(void)
}
device_initcall(hummingboard_device_init);
+static int h100_device_init(void)
+{
+ if (!of_machine_is_compatible("auvidea,h100"))
+ return 0;
+
+ microsom_eth_init();
+
+ barebox_set_hostname("h100");
+
+ return 0;
+}
+device_initcall(h100_device_init);
+
static int hummingboard_late_init(void)
{
if (!of_machine_is_compatible("solidrun,hummingboard/dl") &&
- !of_machine_is_compatible("solidrun,hummingboard/q"))
+ !of_machine_is_compatible("solidrun,hummingboard/q") &&
+ !of_machine_is_compatible("auvidea,h100"))
return 0;
imx6_bbu_internal_mmc_register_handler("sdcard", "/dev/mmc1.barebox",
diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c
index 3d5ab7a13f42..7b97f2e94797 100644
--- a/arch/arm/boards/solidrun-microsom/lowlevel.c
+++ b/arch/arm/boards/solidrun-microsom/lowlevel.c
@@ -5,6 +5,7 @@
extern char __dtb_imx6dl_hummingboard_start[];
extern char __dtb_imx6q_hummingboard_start[];
+extern char __dtb_imx6q_h100_start[];
ENTRY_FUNCTION(start_hummingboard_microsom_i1, r0, r1, r2)
{
@@ -45,3 +46,13 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i4, r0, r1, r2)
fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset();
imx6q_barebox_entry(fdt);
}
+
+ENTRY_FUNCTION(start_h100_microsom_i2ex, r0, r1, r2)
+{
+ void *fdt;
+
+ imx6_cpu_lowlevel_init();
+
+ fdt = __dtb_imx6q_h100_start - get_runtime_offset();
+ imx6q_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1a3fe8ae847..2aca5e757da0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -64,7 +64,7 @@ pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += socfpga_cyclone5_de0_nano_soc.dtb.o
pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o
-pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o
+pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o imx6q-h100.dtb.o
pbl-dtb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o
pbl-dtb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += tegra20-colibri-iris.dtb.o
pbl-dtb-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o
diff --git a/arch/arm/dts/imx6q-h100.dts b/arch/arm/dts/imx6q-h100.dts
new file mode 100644
index 000000000000..bfee186f28a4
--- /dev/null
+++ b/arch/arm/dts/imx6q-h100.dts
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2015 Lucas Stach <kernel@pengutronix.de>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <arm/imx6q-h100.dts>
+
+/ {
+ chosen {
+ environment {
+ compatible = "barebox,environment";
+ device-path = &usdhc2, "partname:barebox-environment";
+ };
+ };
+};
+
+&ocotp {
+ barebox,provide-mac-address = <&fec 0x620>;
+};
+
+&usdhc2 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "barebox";
+ reg = <0x0 0xe0000>;
+ };
+
+ partition@e0000 {
+ label = "barebox-environment";
+ reg = <0xe0000 0x20000>;
+ };
+};
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 1904e8bcf3db..8db9c754f212 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -274,6 +274,11 @@ CFG_start_hummingboard_microsom_i4.pblx.imximg = $(board)/solidrun-microsom/flas
FILE_barebox-solidrun-hummingboard-microsom-i4.img = start_hummingboard_microsom_i4.pblx.imximg
image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i4.img
+pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_h100_microsom_i2ex
+CFG_start_h100_microsom_i2ex.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
+FILE_barebox-auvidea-h100-microsom-i2eX.img = start_h100_microsom_i2ex.pblx.imximg
+image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-auvidea-h100-microsom-i2eX.img
+
pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6q_nitrogen6x_1g
CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg
FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblx.imximg
--
2.9.3
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* [PATCH 05/10] arm(64): move HAS_DMA and HAS_MODULES to CPU_32
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
We don't yet have an implementation for those two features on ARM64, so move
them to a place where they are only selected for a 32bit barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/Kconfig | 2 --
arch/arm/cpu/Kconfig | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 150320c6af86..cb121ab98dcb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,8 +1,6 @@
config ARM
bool
select HAS_KALLSYMS
- select HAS_MODULES
- select HAS_DMA
select HAS_CACHE
select HAVE_CONFIGURABLE_TEXT_BASE
select HAVE_PBL_IMAGE
diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig
index 9928120cc020..e45e05bdb19d 100644
--- a/arch/arm/cpu/Kconfig
+++ b/arch/arm/cpu/Kconfig
@@ -5,6 +5,8 @@ config PHYS_ADDR_T_64BIT
config CPU_32
bool
+ select HAS_MODULES
+ select HAS_DMA
config CPU_64
bool
--
2.9.3
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* [PATCH 06/10] arm(64): don't advertise stack_dumping capabilities for ARM64
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
The unwind code to support this feature is not there yet.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/include/asm/barebox.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/barebox.h b/arch/arm/include/asm/barebox.h
index 31a8e1563050..5a6622235b82 100644
--- a/arch/arm/include/asm/barebox.h
+++ b/arch/arm/include/asm/barebox.h
@@ -2,8 +2,10 @@
#define _BAREBOX_H_ 1
#ifdef CONFIG_ARM_UNWIND
+#ifndef CONFIG_CPU_V8
#define ARCH_HAS_STACK_DUMP
#endif
+#endif
#ifdef CONFIG_ARM_EXCEPTIONS
#define ARCH_HAS_DATA_ABORT_MASK
--
2.9.3
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* [PATCH 10/10] arm64: don't allow to build relocatable image
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
The current ARM64 implementation is lacking the lowlevel functions
to do the relocation. Don't allow to select it.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
common/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/Kconfig b/common/Kconfig
index cd3f6d0cb068..7869a531bf48 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -344,7 +344,7 @@ config KALLSYMS
This is useful to print a nice backtrace when an exception occurs.
config RELOCATABLE
- depends on PPC || ARM
+ depends on PPC || (ARM && !CPU_V8)
bool "generate relocatable barebox binary"
help
A non relocatable barebox binary will run at it's compiled in
--
2.9.3
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* [PATCH 09/10] arm64: drop unneeded files from Makefile
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
ARM64 has native instructions for division and thus doesn't need the
helper functions implemented in those files.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/lib64/Makefile | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/lib64/Makefile b/arch/arm/lib64/Makefile
index 87e26f6afab2..4b7b7e3cc5e3 100644
--- a/arch/arm/lib64/Makefile
+++ b/arch/arm/lib64/Makefile
@@ -4,6 +4,4 @@ obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memcpy.o
obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memset.o
extra-y += barebox.lds
-pbl-y += lib1funcs.o
-pbl-y += ashldi3.o
pbl-y += div0.o
--
2.9.3
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* [PATCH 02/10] mfd: syscon: drop EXPORT_SYMBOL for static function
From: Lucas Stach @ 2016-09-30 10:35 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/mfd/syscon.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index 295e210f6e2d..6ef30ce1959e 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -76,8 +76,6 @@ static void __iomem *syscon_node_to_base(struct device_node *np)
return syscon->base;
}
-EXPORT_SYMBOL_GPL(syscon_node_to_regmap);
-
void __iomem *syscon_base_lookup_by_pdevname(const char *s)
{
--
2.9.3
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* [PATCH 08/10] arm64: include correct setupc file in ARM64 PBL
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/cpu/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 331c1cd8bc8d..d8cb1871a60f 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -16,8 +16,10 @@ obj-y += start.o entry.o
ifeq ($(CONFIG_CPU_64v8), y)
obj-y += setupc_64.o
+pbl-y += setupc_64.o
else
obj-y += setupc.o
+pbl-y += setupc.o
endif
#
@@ -48,7 +50,7 @@ obj-$(CONFIG_CPU_64v8) += cache-armv8.o
AFLAGS_pbl-cache-armv8.o :=-Wa,-march=armv8-a
pbl-$(CONFIG_CPU_64v8) += cache-armv8.o
-pbl-y += setupc.o entry.o
+pbl-y += entry.o
pbl-$(CONFIG_PBL_SINGLE_IMAGE) += start-pbl.o
pbl-$(CONFIG_PBL_MULTI_IMAGES) += uncompress.o
--
2.9.3
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* [PATCH 07/10] arm: semihosting support is not implemented for ARM64
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
Don't allow it to be selected in a ARM64 build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cb121ab98dcb..07c5e2d6f590 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -376,6 +376,7 @@ config ARM_UNWIND
config ARM_SEMIHOSTING
bool "enable ARM semihosting support"
+ depends on !CPU_V8
help
This option enables ARM semihosting support in barebox. ARM
semihosting is a communication discipline that allows code
--
2.9.3
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* [PATCH 04/10] arm64: select ARM_EXCEPTIONS
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
The current ARM64 lowlevel code needs the exception vector to set
up all the ELs. Select ARM_EXCEPTIONS to make sure this is always
present.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/cpu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig
index 450a6d593a4b..9928120cc020 100644
--- a/arch/arm/cpu/Kconfig
+++ b/arch/arm/cpu/Kconfig
@@ -80,6 +80,7 @@ config CPU_V8
bool
select CPU_64v8
select CPU_SUPPORTS_64BIT_KERNEL
+ select ARM_EXCEPTIONS
config CPU_XSC3
bool
--
2.9.3
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* [PATCH 03/10] video: tc358767: depend on EDID helpers
From: Lucas Stach @ 2016-09-30 10:36 UTC (permalink / raw)
To: barebox
In-Reply-To: <20160930103607.15791-1-l.stach@pengutronix.de>
The eDP part need to be able to read the panel EDID.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/video/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2457bb9e45f9..8f31f5af745e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -130,6 +130,7 @@ config DRIVER_VIDEO_MTL017
config DRIVER_VIDEO_TC358767
bool "TC358767A Display Port encoder"
select VIDEO_VPL
+ depends on DRIVER_VIDEO_EDID
depends on I2C
depends on OFTREE
help
--
2.9.3
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* [PATCH 01/10] serial: arm_dcc: depend on !CPU_V8
From: Lucas Stach @ 2016-09-30 10:35 UTC (permalink / raw)
To: barebox
The DCC console uses coprocessor registers registers accesses, the
implementation of those for ARMv8 is currently missing.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 146bf1ec3c30..b112d7ee044a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -2,7 +2,7 @@ menu "serial drivers"
depends on !CONSOLE_NONE
config DRIVER_SERIAL_ARM_DCC
- depends on ARM
+ depends on ARM && !CPU_V8
bool "ARM Debug Communications Channel (DCC) serial driver"
config SERIAL_AMBA_PL011
--
2.9.3
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* [PATCH 2/2] i.MX: Register imx6_fixup_cpus() for MX6Q+ as well
From: Andrey Smirnov @ 2016-09-29 22:21 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In-Reply-To: <1475187703-5748-1-git-send-email-andrew.smirnov@gmail.com>
Register imx6_fixup_cpus() for MX6Q+ as well as for MX6Q and MX6DL.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx6.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 101a2f6..809584e 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -255,7 +255,8 @@ static int imx6_fixup_cpus(struct device_node *root, void *context)
static int imx6_fixup_cpus_register(void)
{
- if (!of_machine_is_compatible("fsl,imx6q") &&
+ if (!of_machine_is_compatible("fsl,imx6qp") &&
+ !of_machine_is_compatible("fsl,imx6q") &&
!of_machine_is_compatible("fsl,imx6dl"))
return 0;
--
2.5.5
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* [PATCH 1/2] i.MX: Introduce imx6_cpu_revision()
From: Andrey Smirnov @ 2016-09-29 22:21 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Factor out CPU revision identification code from imx6_init() into a
standalone inline function (similar to imx6_cpu_type()), so that it
would be possible to use that functionality in PBL code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
Sascha:
I have an almost ready to send, board support patch that uses this in
PBL. Unfortunately at the last minute a regression in functionality
was discovered in that code, so I can't post it until that is
resolved, meanwhile I am hoping I can get this code in while I am
debugging.
Let me know if you'd rathe I send everything together.
arch/arm/mach-imx/imx6.c | 38 +----------------------------------
arch/arm/mach-imx/include/mach/imx6.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ba8fb89..101a2f6 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -25,8 +25,6 @@
#include <asm/mmu.h>
#include <asm/cache-l2x0.h>
-#define SI_REV 0x260
-
void imx6_init_lowlevel(void)
{
void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
@@ -115,47 +113,13 @@ void imx6_init_lowlevel(void)
int imx6_init(void)
{
const char *cputypestr;
- u32 rev;
u32 mx6_silicon_revision;
imx6_init_lowlevel();
imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
- rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
-
- switch (rev & 0xfff) {
- case 0x00:
- mx6_silicon_revision = IMX_CHIP_REV_1_0;
- break;
-
- case 0x01:
- mx6_silicon_revision = IMX_CHIP_REV_1_1;
- break;
-
- case 0x02:
- mx6_silicon_revision = IMX_CHIP_REV_1_2;
- break;
-
- case 0x03:
- mx6_silicon_revision = IMX_CHIP_REV_1_3;
- break;
-
- case 0x04:
- mx6_silicon_revision = IMX_CHIP_REV_1_4;
- break;
-
- case 0x05:
- mx6_silicon_revision = IMX_CHIP_REV_1_5;
- break;
-
- case 0x100:
- mx6_silicon_revision = IMX_CHIP_REV_2_0;
- break;
-
- default:
- mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
- }
+ mx6_silicon_revision = imx6_cpu_revision();
switch (imx6_cpu_type()) {
case IMX6_CPUTYPE_IMX6Q:
diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h
index e8ffa47..fb5eaf1 100644
--- a/arch/arm/mach-imx/include/mach/imx6.h
+++ b/arch/arm/mach-imx/include/mach/imx6.h
@@ -4,6 +4,7 @@
#include <io.h>
#include <mach/generic.h>
#include <mach/imx6-regs.h>
+#include <mach/revision.h>
void imx6_init_lowlevel(void);
@@ -48,6 +49,41 @@ static inline int imx6_cpu_type(void)
return __imx6_cpu_type();
}
+static inline int __imx6_cpu_revision(void)
+{
+
+ uint32_t rev;
+
+ rev = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV);
+
+ switch (rev & 0xfff) {
+ case 0x00:
+ return IMX_CHIP_REV_1_0;
+ case 0x01:
+ return IMX_CHIP_REV_1_1;
+ case 0x02:
+ return IMX_CHIP_REV_1_2;
+ case 0x03:
+ return IMX_CHIP_REV_1_3;
+ case 0x04:
+ return IMX_CHIP_REV_1_4;
+ case 0x05:
+ return IMX_CHIP_REV_1_5;
+ case 0x100:
+ return IMX_CHIP_REV_2_0;
+ }
+
+ return IMX_CHIP_REV_UNKNOWN;
+}
+
+static inline int imx6_cpu_revision(void)
+{
+ if (!cpu_is_mx6())
+ return 0;
+
+ return __imx6_cpu_revision();
+}
+
#define DEFINE_MX6_CPU_TYPE(str, type) \
static inline int cpu_mx6_is_##str(void) \
{ \
--
2.5.5
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