* Re: [PATCH 4/5] Add filetype and detection for squashfs images
From: Enrico Joerns @ 2016-10-06 14:10 UTC (permalink / raw)
To: Yegor Yefremov; +Cc: barebox
In-Reply-To: <CAGm1_kvFujU0QcCdmREtbRfU7J_vQgMnJvs9k=dpR3PQ=9+_6g@mail.gmail.com>
Hi Yegor,
On 10/06/2016 03:55 PM, Yegor Yefremov wrote:
> On Tue, Oct 4, 2016 at 12:10 PM, Enrico Jorns <ejo@pengutronix.de> wrote:
>> This adds `filetype_squashfs` to the list of known filetypes and adds a
>> detection for squashfs files to file_detect_type(). This currently
>> matches on the `hsqs` start sequence of an image file.
>>
>> Additionally, the newly introduced filetype is registered as the type of
>> the squashfs_driver which allows, for example, to mount squashfs without
>> the need to specify a type parameter.
>>
>> This changes enable booting a squashfs with the simple `boot` command
>> pointing to the location (device) that holds the squashfs.
>>
>> Note that booting with blspec is limited as the current squashfs driver
>> is not capable of handling symbolic links.
>
> Glad to see SquashFS will be used not only by myself :-)
glad to see that, too ;)
> Could you explain how one can write a rootfs.sqaushfs to a ubiblock
> from Linux and then what steps are needed in barebox?
>
> So far I've only found this info about ubiblock:
> http://www.linux-mtd.infradead.org/doc/ubi.html#L_ubiblock, but it
> doesn't say much.
Yes, the informations provided are a bit sparse..
> My actions were:
>
> ubiattach -p /dev/mtd5
> ubiblock --create /dev/ubi0_0
> ubiupdatevol /dev/ubi0_0 rootfs.squashfs
>
> Can I mount /dev/ubi0_0 via mount? If yes, what parameters I should use?
The above commands look pretty similar to what I did. Mounting the
ubiblock device does work too, with a little pitfall, mount will be
confused by having a read-only file system but nobody told it before.
So you must do
mount -o ro /dev/ubiblock0_0 /mnt/test
> How can I mount this volume in barebox step-by-step?
Using it in barebox is pretty easy, as the ubiblock layer is not
required there:
ubiattach /dev/nand0.root
ubiupdatevol /dev/nand0.root.ubi.ubivolname rootfs.squashfs
mkdir /mnt/test
mount /dev/nand0.root.ubi.ubivolname /mnt/test
To boot via bootspec form a ubi containing a squashfs, you simply need to
boot /dev/nand0.root.ubi.ubivolname
Hope that helps.
Best regards, Enrico
--
Pengutronix e.K. | Enrico Jörns |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-5080 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 4/5] Add filetype and detection for squashfs images
From: Yegor Yefremov @ 2016-10-06 13:55 UTC (permalink / raw)
To: Enrico Jorns; +Cc: barebox
In-Reply-To: <20161004101048.12970-5-ejo@pengutronix.de>
Hi Enrico,
On Tue, Oct 4, 2016 at 12:10 PM, Enrico Jorns <ejo@pengutronix.de> wrote:
> This adds `filetype_squashfs` to the list of known filetypes and adds a
> detection for squashfs files to file_detect_type(). This currently
> matches on the `hsqs` start sequence of an image file.
>
> Additionally, the newly introduced filetype is registered as the type of
> the squashfs_driver which allows, for example, to mount squashfs without
> the need to specify a type parameter.
>
> This changes enable booting a squashfs with the simple `boot` command
> pointing to the location (device) that holds the squashfs.
>
> Note that booting with blspec is limited as the current squashfs driver
> is not capable of handling symbolic links.
Glad to see SquashFS will be used not only by myself :-)
Could you explain how one can write a rootfs.sqaushfs to a ubiblock
from Linux and then what steps are needed in barebox?
So far I've only found this info about ubiblock:
http://www.linux-mtd.infradead.org/doc/ubi.html#L_ubiblock, but it
doesn't say much.
My actions were:
ubiattach -p /dev/mtd5
ubiblock --create /dev/ubi0_0
ubiupdatevol /dev/ubi0_0 rootfs.squashfs
Can I mount /dev/ubi0_0 via mount? If yes, what parameters I should use?
How can I mount this volume in barebox step-by-step?
Thanks.
Yegor
> Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
> ---
> common/filetype.c | 4 ++++
> fs/squashfs/squashfs.c | 1 +
> include/filetype.h | 1 +
> 3 files changed, 6 insertions(+)
>
> diff --git a/common/filetype.c b/common/filetype.c
> index 4728f87..8d72933 100644
> --- a/common/filetype.c
> +++ b/common/filetype.c
> @@ -40,6 +40,7 @@ static const struct filetype_str filetype_str[] = {
> [filetype_uimage] = { "U-Boot uImage", "u-boot" },
> [filetype_ubi] = { "UBI image", "ubi" },
> [filetype_jffs2] = { "JFFS2 image", "jffs2" },
> + [filetype_squashfs] = { "Squashfs image", "squashfs" },
> [filetype_gzip] = { "GZIP compressed", "gzip" },
> [filetype_bzip2] = { "BZIP2 compressed", "bzip2" },
> [filetype_oftree] = { "open firmware Device Tree flattened Binary", "dtb" },
> @@ -278,6 +279,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
> if (buf8[0] == 0xfd && buf8[1] == 0x37 && buf8[2] == 0x7a &&
> buf8[3] == 0x58 && buf8[4] == 0x5a && buf8[5] == 0x00)
> return filetype_xz_compressed;
> + if (buf8[0] == 'h' && buf8[1] == 's' && buf8[2] == 'q' &&
> + buf8[3] == 's')
> + return filetype_squashfs;
> if (buf[0] == be32_to_cpu(0xd00dfeed))
> return filetype_oftree;
> if (strncmp(buf8, "ANDROID!", 8) == 0)
> diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
> index d00dee6..6d04681 100644
> --- a/fs/squashfs/squashfs.c
> +++ b/fs/squashfs/squashfs.c
> @@ -353,6 +353,7 @@ static struct fs_driver_d squashfs_driver = {
> .readdir = squashfs_readdir,
> .closedir = squashfs_closedir,
> .stat = squashfs_stat,
> + .type = filetype_squashfs,
> .drv = {
> .probe = squashfs_probe,
> .remove = squashfs_remove,
> diff --git a/include/filetype.h b/include/filetype.h
> index cde73c1..65bd6ef 100644
> --- a/include/filetype.h
> +++ b/include/filetype.h
> @@ -16,6 +16,7 @@ enum filetype {
> filetype_uimage,
> filetype_ubi,
> filetype_jffs2,
> + filetype_squashfs,
> filetype_gzip,
> filetype_bzip2,
> filetype_oftree,
> --
> 2.9.3
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: am335x: memory configuration
From: Yegor Yefremov @ 2016-10-06 13:50 UTC (permalink / raw)
To: Jan Remmet; +Cc: barebox
In-Reply-To: <57f65594.d4491c0a.37103.324dSMTPIN_ADDED_BROKEN@mx.google.com>
Hi Jan,
On Thu, Oct 6, 2016 at 3:45 PM, Jan Remmet <J.Remmet@phytec.de> wrote:
> On Thu, Oct 06, 2016 at 11:08:07AM +0200, Yegor Yefremov wrote:
>> I've submitted a patch [1] to support our Baltos systems back in the
>> May. There was an issue with dynamically detecting RAM size as the
>> systems can have either 256MB or 512MB modules.
>>
>> So far u-boot was able to detect the RAM size dynamically. In order to
>> do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:
>>
>> int dram_init(void)
>> {
>>
>> #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>> sdram_init();
>> #endif
>>
>> /* dram_init must store complete ramsize in gd->ram_size */
>> gd->ram_size = get_ram_size(
>> (void *)CONFIG_SYS_SDRAM_BASE,
>> CONFIG_MAX_RAM_BANK_SIZE);
>> return 0;
>> }
>>
>> void dram_init_banksize(void)
>> {
>> gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
>> gd->bd->bi_dram[0].size = gd->ram_size;
>> }
>>
>> This peace of code will be excuted in u-boot.img (not in MLO).
>>
>> In Barebox we have get_ram_size(), that provides real RAM size and
>> am335x_sdram_size(), that returns RAM controller settings. So far DDR
>> controler will be configured for 512MB regardless of the module. Hence
>> the return value from am335x_sdram_size() cannot be used for crating
>> ram0 node.
> On our am335x boards we use MLOs with individual RAM timings and EMIF config
> values. So am335x_sdram_size works fine in barebox.bin.
> Maybe get_ram_size works if the timing settings are equal?
I've solved the problem the way Sascha proposed earlier (see the third
version of my patch sent today).
In MLO I setup memory controller to 512MB, then I check the real
amount via get_ram_size() and if I have 256MB I just reinitialize the
memory controller with values for 256Mb i.e. rows 14 instead of 15.
With this done one can use am335x_sdram_size() in other parts of
berebox.
Thanks for the feedback.
Yegor
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: am335x: memory configuration
From: Jan Remmet @ 2016-10-06 13:45 UTC (permalink / raw)
To: Yegor Yefremov; +Cc: barebox
In-Reply-To: <CAGm1_ku0Vh=SC0omVMUZof3DBJhvFRPsgxg1BDEn4GGTpez9_g@mail.gmail.com>
On Thu, Oct 06, 2016 at 11:08:07AM +0200, Yegor Yefremov wrote:
> I've submitted a patch [1] to support our Baltos systems back in the
> May. There was an issue with dynamically detecting RAM size as the
> systems can have either 256MB or 512MB modules.
>
> So far u-boot was able to detect the RAM size dynamically. In order to
> do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:
>
> int dram_init(void)
> {
>
> #ifndef CONFIG_SKIP_LOWLEVEL_INIT
> sdram_init();
> #endif
>
> /* dram_init must store complete ramsize in gd->ram_size */
> gd->ram_size = get_ram_size(
> (void *)CONFIG_SYS_SDRAM_BASE,
> CONFIG_MAX_RAM_BANK_SIZE);
> return 0;
> }
>
> void dram_init_banksize(void)
> {
> gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
> gd->bd->bi_dram[0].size = gd->ram_size;
> }
>
> This peace of code will be excuted in u-boot.img (not in MLO).
>
> In Barebox we have get_ram_size(), that provides real RAM size and
> am335x_sdram_size(), that returns RAM controller settings. So far DDR
> controler will be configured for 512MB regardless of the module. Hence
> the return value from am335x_sdram_size() cannot be used for crating
> ram0 node.
On our am335x boards we use MLOs with individual RAM timings and EMIF config
values. So am335x_sdram_size works fine in barebox.bin.
Maybe get_ram_size works if the timing settings are equal?
Jan
>
> What were the best way to provide get_ram_size() from lowlevel.c to
> board.c, where I would invoke:
> arm_add_mem_device("ram0", 0x80000000, sdram_size);
>
> [1] http://lists.infradead.org/pipermail/barebox/2016-May/027224.html
>
> Yegor
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* [PATCH v3] Add support for Baltos systems
From: yegorslists @ 2016-10-06 10:55 UTC (permalink / raw)
To: barebox
From: Yegor Yefremov <yegorslists@googlemail.com>
OnRISC Baltos devices are based on a am335x SoC and can be booted
either from MMC or NAND.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
---
Changes:
v3: - make hw_param a local variable
- implement memory size detection
- remove baltos_mem_init initcall
v2: - remove typedef
- rework invalid EEPROM content handling
- add mmc0 as boot device for MMC boot source
arch/arm/boards/Makefile | 1 +
arch/arm/boards/vscom-baltos/Makefile | 2 +
arch/arm/boards/vscom-baltos/board.c | 132 ++++++++++
arch/arm/boards/vscom-baltos/lowlevel.c | 134 ++++++++++
arch/arm/dts/Makefile | 1 +
arch/arm/dts/am335x-baltos-minimal.dts | 439 ++++++++++++++++++++++++++++++++
arch/arm/mach-omap/Kconfig | 7 +
images/Makefile.am33xx | 8 +
8 files changed, 724 insertions(+)
create mode 100644 arch/arm/boards/vscom-baltos/Makefile
create mode 100644 arch/arm/boards/vscom-baltos/board.c
create mode 100644 arch/arm/boards/vscom-baltos/lowlevel.c
create mode 100644 arch/arm/dts/am335x-baltos-minimal.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 23a8dbd..da6ea0d 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -137,4 +137,5 @@ obj-$(CONFIG_MACH_VIRT2REAL) += virt2real/
obj-$(CONFIG_MACH_ZEDBOARD) += avnet-zedboard/
obj-$(CONFIG_MACH_ZYLONITE) += zylonite/
obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/
+obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/
obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/
diff --git a/arch/arm/boards/vscom-baltos/Makefile b/arch/arm/boards/vscom-baltos/Makefile
new file mode 100644
index 0000000..092c31d
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/Makefile
@@ -0,0 +1,2 @@
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/vscom-baltos/board.c b/arch/arm/boards/vscom-baltos/board.c
new file mode 100644
index 0000000..dc08ed5
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/board.c
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
+ * Raghavendra KH <r-khandenahally@ti.com>
+ *
+ * Copyright (C) 2012 Jan Luebbe <j.luebbe@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/**
+ * @file
+ * @brief OnRISC Baltos Specific Board Initialization routines
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <envfs.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <linux/sizes.h>
+#include <net.h>
+#include <envfs.h>
+#include <bootsource.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/gpmc.h>
+#include <linux/err.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+
+static struct omap_barebox_part baltos_barebox_part = {
+ .nand_offset = SZ_512K,
+ .nand_size = 0x1e0000,
+};
+
+struct bsp_vs_hwparam {
+ uint32_t Magic;
+ uint32_t HwRev;
+ uint32_t SerialNumber;
+ char PrdDate[11];
+ uint16_t SystemId;
+ uint8_t MAC1[6];
+ uint8_t MAC2[6];
+ uint8_t MAC3[6];
+} __attribute__ ((packed));
+
+static int baltos_read_eeprom(void)
+{
+ struct bsp_vs_hwparam hw_param;
+ size_t size;
+ char *buf, var_buf[32];
+ int rc;
+ unsigned char mac_addr[6];
+
+ rc = read_file_2("/dev/eeprom0",
+ &size,
+ (void *)&buf,
+ sizeof(hw_param));
+ if (rc && rc != -EFBIG)
+ return rc;
+
+ memcpy(&hw_param, buf, sizeof(hw_param));
+
+ free(buf);
+
+ if (hw_param.Magic == 0xDEADBEEF) {
+ /* setup MAC1 */
+ mac_addr[0] = hw_param.MAC1[0];
+ mac_addr[1] = hw_param.MAC1[1];
+ mac_addr[2] = hw_param.MAC1[2];
+ mac_addr[3] = hw_param.MAC1[3];
+ mac_addr[4] = hw_param.MAC1[4];
+ mac_addr[5] = hw_param.MAC1[5];
+
+ eth_register_ethaddr(0, mac_addr);
+
+ /* setup MAC2 */
+ mac_addr[0] = hw_param.MAC2[0];
+ mac_addr[1] = hw_param.MAC2[1];
+ mac_addr[2] = hw_param.MAC2[2];
+ mac_addr[3] = hw_param.MAC2[3];
+ mac_addr[4] = hw_param.MAC2[4];
+ mac_addr[5] = hw_param.MAC2[5];
+
+ eth_register_ethaddr(1, mac_addr);
+ } else {
+ printf("Baltos: incorrect magic number (0x%x) "
+ "in EEPROM\n",
+ hw_param.Magic);
+
+ hw_param.SystemId = 0;
+ }
+
+ sprintf(var_buf, "%d", hw_param.SystemId);
+ globalvar_add_simple("board.id", var_buf);
+
+ return 0;
+}
+environment_initcall(baltos_read_eeprom);
+
+static int baltos_devices_init(void)
+{
+ if (!of_machine_is_compatible("vscom,onrisc"))
+ return 0;
+
+ globalvar_add_simple("board.variant", "baltos");
+
+ if (bootsource_get() == BOOTSOURCE_MMC)
+ omap_set_bootmmc_devname("mmc0");
+
+ omap_set_barebox_part(&baltos_barebox_part);
+
+ if (IS_ENABLED(CONFIG_SHELL_NONE))
+ return am33xx_of_register_bootdevice();
+
+ return 0;
+}
+coredevice_initcall(baltos_devices_init);
diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
new file mode 100644
index 0000000..8bce91a
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/lowlevel.c
@@ -0,0 +1,134 @@
+#include <common.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <linux/string.h>
+#include <debug_ll.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/am33xx-clock.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/am33xx-mux.h>
+#include <mach/am33xx-generic.h>
+#include <mach/wdt.h>
+
+static const struct am33xx_ddr_data ddr3_data = {
+ .rd_slave_ratio0 = 0x38,
+ .wr_dqs_slave_ratio0 = 0x44,
+ .fifo_we_slave_ratio0 = 0x94,
+ .wr_slave_ratio0 = 0x7D,
+ .use_rank0_delay = 0x01,
+ .dll_lock_diff0 = 0x0,
+};
+
+static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
+ .slave_ratio0 = 0x80,
+ .dll_lock_diff0 = 0x1,
+ .invert_clkout0 = 0x0,
+ .slave_ratio1 = 0x80,
+ .dll_lock_diff1 = 0x1,
+ .invert_clkout1 = 0x0,
+ .slave_ratio2 = 0x80,
+ .dll_lock_diff2 = 0x1,
+ .invert_clkout2 = 0x0,
+};
+
+static const struct am33xx_emif_regs ddr3_regs = {
+ .emif_read_latency = 0x100007,
+ .emif_tim1 = 0x0AAAD4DB,
+ .emif_tim2 = 0x266B7FDA,
+ .emif_tim3 = 0x501F867F,
+ .zq_config = 0x50074BE4,
+ .sdram_config = 0x61C05332,
+ .sdram_config2 = 0x0,
+ .sdram_ref_ctrl = 0xC30,
+};
+
+static const struct am33xx_ddr_data ddr3_data_256mb = {
+ .rd_slave_ratio0 = 0x36,
+ .wr_dqs_slave_ratio0 = 0x38,
+ .fifo_we_slave_ratio0 = 0x99,
+ .wr_slave_ratio0 = 0x73,
+};
+
+static const struct am33xx_emif_regs ddr3_regs_256mb = {
+ .emif_read_latency = 0x7,
+ .emif_tim1 = 0x0AAAD4DB,
+ .emif_tim2 = 0x26437FDA,
+ .emif_tim3 = 0x501F83FF,
+ .sdram_config = 0x61C052B2,
+ .zq_config = 0x50074BE4,
+ .sdram_ref_ctrl = 0x00000C30,
+
+};
+
+extern char __dtb_am335x_baltos_minimal_start[];
+
+/**
+ * @brief The basic entry point for board initialization.
+ *
+ * This is called as part of machine init (after arch init).
+ * This is again called with stack in SRAM, so not too many
+ * constructs possible here.
+ *
+ * @return void
+ */
+static noinline int baltos_sram_init(void)
+{
+ uint32_t sdram_size;
+ void *fdt;
+
+ fdt = __dtb_am335x_baltos_minimal_start;
+
+ /* WDT1 is already running when the bootloader gets control
+ * Disable it to avoid "random" resets
+ */
+ __raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+ while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+ __raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+ while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+ /* Setup the PLLs and the clocks for the peripherals */
+ am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);
+ am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
+ sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
+ if (sdram_size == SZ_256M)
+ am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs_256mb,
+ &ddr3_data_256mb);
+
+ am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
+ am33xx_enable_uart0_pin_mux();
+ omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+ putc_ll('>');
+
+ am335x_barebox_entry(fdt);
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sram, bootinfo, r1, r2)
+{
+ am33xx_save_bootinfo((void *)bootinfo);
+
+ /*
+ * Setup C environment, the board init code uses global variables.
+ * Stackpointer has already been initialized by the ROM code.
+ */
+ relocate_to_current_adr();
+ setup_c();
+
+ baltos_sram_init();
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sdram, r0, r1, r2)
+{
+ void *fdt;
+
+ fdt = __dtb_am335x_baltos_minimal_start;
+
+ fdt -= get_runtime_offset();
+
+ am335x_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1a3fe8..765cd59 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
+pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/arm/dts/am335x-baltos-minimal.dts b/arch/arm/dts/am335x-baltos-minimal.dts
new file mode 100644
index 0000000..13eb91c
--- /dev/null
+++ b/arch/arm/dts/am335x-baltos-minimal.dts
@@ -0,0 +1,439 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * VScom OnRISC
+ * http://www.vscom.de
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ model = "OnRISC Baltos";
+ compatible = "vscom,onrisc", "ti,am33xx";
+
+ chosen {
+ linux,stdout-path = &uart0;
+ };
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&vdd1_reg>;
+ };
+ };
+
+ vbat: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ };
+};
+
+&am33xx_pinmux {
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */
+ 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */
+ 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */
+ 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */
+ 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */
+ 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */
+ >;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ 0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
+ 0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
+ >;
+ };
+
+ tps65910_pins: pinmux_tps65910_pins {
+ pinctrl-single,pins = <
+ 0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */
+ >;
+
+ };
+ tca6416_pins: pinmux_tca6416_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
+ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */
+ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
+ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
+ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
+
+
+ /* Slave 2 */
+ 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
+ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
+ 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
+ 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
+ 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
+ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
+ 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
+ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
+ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
+ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
+ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
+ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+
+ /* Slave 2 reset value*/
+ 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+ >;
+ };
+
+ nandflash_pins_s0: nandflash_pins_s0 {
+ pinctrl-single,pins = <
+ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
+ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
+ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
+ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
+ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
+ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
+ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
+ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
+ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
+ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
+ 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
+ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
+ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
+ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
+ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
+ >;
+ };
+};
+
+&elm {
+ status = "okay";
+};
+
+&gpmc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&nandflash_pins_s0>;
+ ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ status = "okay";
+
+ nand@0,0 {
+ reg = <0 0 0>; /* CS0, offset 0 */
+ nand-bus-width = <8>;
+ ti,nand-ecc-opt = "bch8";
+ ti,nand-xfer-type = "polled";
+
+ gpmc,device-nand = "true";
+ gpmc,device-width = <1>;
+ gpmc,sync-clk-ps = <0>;
+ gpmc,cs-on-ns = <0>;
+ gpmc,cs-rd-off-ns = <44>;
+ gpmc,cs-wr-off-ns = <44>;
+ gpmc,adv-on-ns = <6>;
+ gpmc,adv-rd-off-ns = <34>;
+ gpmc,adv-wr-off-ns = <44>;
+ gpmc,we-on-ns = <0>;
+ gpmc,we-off-ns = <40>;
+ gpmc,oe-on-ns = <0>;
+ gpmc,oe-off-ns = <54>;
+ gpmc,access-ns = <64>;
+ gpmc,rd-cycle-ns = <82>;
+ gpmc,wr-cycle-ns = <82>;
+ gpmc,wait-on-read = "true";
+ gpmc,wait-on-write = "true";
+ gpmc,bus-turnaround-ns = <0>;
+ gpmc,cycle2cycle-delay-ns = <0>;
+ gpmc,clk-activation-ns = <0>;
+ gpmc,wait-monitoring-ns = <0>;
+ gpmc,wr-access-ns = <40>;
+ gpmc,wr-data-mux-bus-ns = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ elm_id = <&elm>;
+
+ boot@0 {
+ label = "SPL";
+ reg = <0x0 0x20000>;
+ };
+ boot@20000{
+ label = "SPL.backup1";
+ reg = <0x20000 0x20000>;
+ };
+ boot@40000 {
+ label = "SPL.backup2";
+ reg = <0x40000 0x20000>;
+ };
+ boot@60000 {
+ label = "SPL.backup3";
+ reg = <0x60000 0x20000>;
+ };
+ boot@80000 {
+ label = "u-boot";
+ reg = <0x80000 0x1e0000>;
+ };
+ boot@260000 {
+ label = "UBI";
+ reg = <0x260000 0xfda0000>;
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+
+ status = "okay";
+ clock-frequency = <1000>;
+
+ tps: tps@2d {
+ reg = <0x2d>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <28 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&tps65910_pins>;
+ };
+
+ at24@50 {
+ compatible = "at24,24c02";
+ pagesize = <8>;
+ reg = <0x50>;
+ };
+
+ tca6416: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <20 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&tca6416_pins>;
+ };
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_ctrl_mod {
+ status = "okay";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&cppi41dma {
+ status = "okay";
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+ vcc1-supply = <&vbat>;
+ vcc2-supply = <&vbat>;
+ vcc3-supply = <&vbat>;
+ vcc4-supply = <&vbat>;
+ vcc5-supply = <&vbat>;
+ vcc6-supply = <&vbat>;
+ vcc7-supply = <&vbat>;
+ vccio-supply = <&vbat>;
+
+ ti,en-ck32k-xtal = <1>;
+
+ regulators {
+ vrtc_reg: regulator@0 {
+ regulator-always-on;
+ };
+
+ vio_reg: regulator@1 {
+ regulator-always-on;
+ };
+
+ vdd1_reg: regulator@2 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1312500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd2_reg: regulator@3 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd3_reg: regulator@4 {
+ regulator-always-on;
+ };
+
+ vdig1_reg: regulator@5 {
+ regulator-always-on;
+ };
+
+ vdig2_reg: regulator@6 {
+ regulator-always-on;
+ };
+
+ vpll_reg: regulator@7 {
+ regulator-always-on;
+ };
+
+ vdac_reg: regulator@8 {
+ regulator-always-on;
+ };
+
+ vaux1_reg: regulator@9 {
+ regulator-always-on;
+ };
+
+ vaux2_reg: regulator@10 {
+ regulator-always-on;
+ };
+
+ vaux33_reg: regulator@11 {
+ regulator-always-on;
+ };
+
+ vmmc_reg: regulator@12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&mac {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ dual_emac = <1>;
+
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+
+ status = "okay";
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "rmii";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <7>;
+ phy-mode = "rgmii-txid";
+ dual_emac_res_vlan = <2>;
+};
+
+&phy_sel {
+ rmii-clock-ext = <1>;
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&vmmc_reg>;
+ status = "okay";
+};
+
+&gpio0 {
+ ti,no-reset-on-init;
+};
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index d7c863c..a1bb8f0 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -184,6 +184,13 @@ config MACH_PHYTEC_SOM_AM335X
select ARCH_AM33XX
help
Say Y here if you are using a am335x based Phytecs SOM
+
+config MACH_VSCOM_BALTOS
+ bool "VScom Baltos Devices"
+ select ARCH_AM33XX
+ help
+ Say Y here if you are using a am335x based VScom Baltos devices
+
endif
choice
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 8be78ef..8168fe4 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -135,6 +135,14 @@ pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sram
FILE_barebox-am33xx-beaglebone-mlo.img = start_am33xx_beaglebone_sram.pblx.mlo
am33xx-mlo-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone-mlo.img
+pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sdram
+FILE_barebox-am33xx-baltos.img = start_am33xx_baltos_sdram.pblx
+am33xx-barebox-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos.img
+
+pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sram
+FILE_barebox-am33xx-baltos-mlo.img = start_am33xx_baltos_sram.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos-mlo.img
+
ifdef CONFIG_OMAP_BUILD_IFT
image-y += $(am33xx-mlo-y)
else
--
2.1.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
* Aw: Re: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
From: iw3gtf @ 2016-10-06 9:20 UTC (permalink / raw)
To: t.remmet; +Cc: barebox
In-Reply-To: <1475741847.3468.20.camel@lws-tremmet.phytec.de>
----- Original Nachricht ----
Von: Teresa Remmet <t.remmet@phytec.de>
An: iw3gtf@arcor.de
Datum: 06.10.2016 10:17
Betreff: Re: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
> Hello Giorgio,
>
> Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf@arcor.de:
> > Hi,
> >
> > I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b
> flagged static
> > UBI volumes as DEVFS_IS_CHARACTER_DEV.
> >
> > A consequence of this flag is that commands like:
> >
> > # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
> >
> > will not work because the cp command will see a src file (the static UBI
> volume) with a size
> > of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood
> of
> > "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the
> console.
> >
> > I tried to comment out the flag assignment, just to see what happen:
> >
> > int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> > {
> > ...
> > cdev->size = vol->used_bytes;
> >
> > // if (vol->vol_type == UBI_STATIC_VOLUME)
> > // cdev->flags = DEVFS_IS_CHARACTER_DEV;
> >
> > cdev->dev = &vol->dev;
> > ...
> >
> > and then the cp command worked than as expected.
> >
> > Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for
> static UBI volumes
> > is really needed (to avoid some other problems that my superficial test
> does not triggers) ?
>
> the size of a static ubi volume device is equal to the image size you
> flashed. When you create a new static ubi volume the size is 0, as it is
> empty.
> We need the chardev flag to be able to update the static ubi volume or
> barebox will complain that there is not enough space.
>
> Regards,
> Teresa
>
Hi,
thanks for the answer, I knew there must be a reason for it.
Nonetheless it is a bit annoying not to be able to simply extract the content
of a static volume.
In my application the static volume contains a barebox bootloader image for an
imx25 cpu, I used to copy it to an mtd partition at the beginning of the nand flash
with the commands: erase /dev/nand0.barebox ; cp /dev/nand0.ubi_volumes... /dev/barebox
This does not work anymore now.
With a newer imx6 cpu I use the command barebox_update -y /dev/nand0.ubi_volumes...,
this works as expected.
Maybe I should write a new barebox_update command variant for the older cpu.
giorgio
Giorgio, iw3gtf@arcor.de
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* am335x: memory configuration
From: Yegor Yefremov @ 2016-10-06 9:08 UTC (permalink / raw)
To: barebox
I've submitted a patch [1] to support our Baltos systems back in the
May. There was an issue with dynamically detecting RAM size as the
systems can have either 256MB or 512MB modules.
So far u-boot was able to detect the RAM size dynamically. In order to
do so it uses following code in arch/arm/cpu/armv7/am33xx/emif4.c:
int dram_init(void)
{
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
sdram_init();
#endif
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
return 0;
}
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = gd->ram_size;
}
This peace of code will be excuted in u-boot.img (not in MLO).
In Barebox we have get_ram_size(), that provides real RAM size and
am335x_sdram_size(), that returns RAM controller settings. So far DDR
controler will be configured for 512MB regardless of the module. Hence
the return value from am335x_sdram_size() cannot be used for crating
ram0 node.
What were the best way to provide get_ram_size() from lowlevel.c to
board.c, where I would invoke:
arm_add_mem_device("ram0", 0x80000000, sdram_size);
[1] http://lists.infradead.org/pipermail/barebox/2016-May/027224.html
Yegor
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
From: Teresa Remmet @ 2016-10-06 8:17 UTC (permalink / raw)
To: iw3gtf; +Cc: barebox
In-Reply-To: <1382352141.1327180.1475673795806.JavaMail.ngmail@webmail09.arcor-online.net>
Hello Giorgio,
Am Mittwoch, den 05.10.2016, 15:23 +0200 schrieb iw3gtf@arcor.de:
> Hi,
>
> I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
> UBI volumes as DEVFS_IS_CHARACTER_DEV.
>
> A consequence of this flag is that commands like:
>
> # cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
>
> will not work because the cp command will see a src file (the static UBI volume) with a size
> of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
> "UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.
>
> I tried to comment out the flag assignment, just to see what happen:
>
> int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
> {
> ...
> cdev->size = vol->used_bytes;
>
> // if (vol->vol_type == UBI_STATIC_VOLUME)
> // cdev->flags = DEVFS_IS_CHARACTER_DEV;
>
> cdev->dev = &vol->dev;
> ...
>
> and then the cp command worked than as expected.
>
> Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
> is really needed (to avoid some other problems that my superficial test does not triggers) ?
the size of a static ubi volume device is equal to the image size you
flashed. When you create a new static ubi volume the size is 0, as it is
empty.
We need the chardev flag to be able to update the static ubi volume or
barebox will complain that there is not enough space.
Regards,
Teresa
>
> giorgio
>
>
> Giorgio, iw3gtf@arcor.de
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* why UBI static volumes are flagged as DEVFS_IS_CHARACTER_DEV
From: iw3gtf @ 2016-10-05 13:23 UTC (permalink / raw)
To: barebox
Hi,
I noticed that the commit id c087e0804f0290e9886899e8a3cccb07c4ce088b flagged static
UBI volumes as DEVFS_IS_CHARACTER_DEV.
A consequence of this flag is that commands like:
# cp /dev/nand0.ubi_volumes.ubi.my_static_vol file
will not work because the cp command will see a src file (the static UBI volume) with a size
of -1 (FILE_SIZE_STREAM) and keep on reading from the volume until a flood of
"UBI assert failed in ubi_eba_read_leb at 359" asserts comes out of the console.
I tried to comment out the flag assignment, just to see what happen:
int ubi_volume_cdev_add(struct ubi_device *ubi, struct ubi_volume *vol)
{
...
cdev->size = vol->used_bytes;
// if (vol->vol_type == UBI_STATIC_VOLUME)
// cdev->flags = DEVFS_IS_CHARACTER_DEV;
cdev->dev = &vol->dev;
...
and then the cp command worked than as expected.
Could someone shortly confirm that the DEVFS_IS_CHARACTER_DEV flag for static UBI volumes
is really needed (to avoid some other problems that my superficial test does not triggers) ?
giorgio
Giorgio, iw3gtf@arcor.de
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 3/5] fs: squashfs: port zlib compression support from kernel
From: Sascha Hauer @ 2016-10-04 19:40 UTC (permalink / raw)
To: Enrico Jorns; +Cc: barebox
In-Reply-To: <20161004101048.12970-4-ejo@pengutronix.de>
On Tue, Oct 04, 2016 at 12:10:46PM +0200, Enrico Jorns wrote:
> As this is the default compression method for squashfs, make this the
> default in kconfig selection, too
>
> Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
> ---
> fs/squashfs/Kconfig | 20 ++++++-
> fs/squashfs/Makefile | 1 +
> fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 152 insertions(+), 1 deletion(-)
> create mode 100644 fs/squashfs/zlib_wrapper.c
>
> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> index d2de168..1cb1ac5 100644
> --- a/fs/squashfs/Kconfig
> +++ b/fs/squashfs/Kconfig
> @@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
> embedded systems where low overhead is needed. Further information
> and tools are available from http://squashfs.sourceforge.net.
>
> +config SQUASHFS_ZLIB
> + bool "Include support for ZLIB compressed file systems"
> + depends on FS_SQUASHFS
> + select ZLIB
> + default y
> + help
> + ZLIB compression is the standard compression used by Squashfs
> + file systems. It offers a good trade-off between compression
> + achieved and the amount of CPU time and memory necessary to
> + compress and decompress.
> +
> + If unsure, say Y.
> +
> config SQUASHFS_LZ4
> bool "Include support for LZ4 compressed file systems"
> depends on FS_SQUASHFS
> @@ -30,9 +43,10 @@ config SQUASHFS_LZ4
> LZ4 is not the standard compression used in Squashfs and so most
> file systems will be readable without selecting this option.
>
> + If unsure, say N.
> +
> config SQUASHFS_LZO
> bool "Include support for LZO compressed file systems"
> - default y
> depends on FS_SQUASHFS
> select LZO_DECOMPRESS
> help
> @@ -44,6 +58,8 @@ config SQUASHFS_LZO
> LZO is not the standard compression used in Squashfs and so most
> file systems will be readable without selecting this option.
>
> + If unsure, say N.
> +
> config SQUASHFS_XZ
> bool "Include support for XZ compressed file systems"
> default y
> @@ -57,3 +73,5 @@ config SQUASHFS_XZ
>
> XZ is not the standard compression used in Squashfs and so most
> file systems will be readable without selecting this option.
> +
> + If unsure, say N.
Here unrelated Kconfig entries are changed. Also in the end we get
"default y" for SQUASHFS_XZ along with the help "If unsure, say N."
which seems inconsistent.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 1/5] fs: squashfs: port lzo compression support from kernel
From: Sascha Hauer @ 2016-10-04 19:34 UTC (permalink / raw)
To: Enrico Jorns; +Cc: barebox
In-Reply-To: <20161004101048.12970-2-ejo@pengutronix.de>
On Tue, Oct 04, 2016 at 12:10:44PM +0200, Enrico Jorns wrote:
> This ports lzo_wrapper from kernel code and adds some minimal adaptions
> to make squashfs lzo compression work in barebox.
>
> Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
> ---
> fs/squashfs/Kconfig | 14 +++++
> fs/squashfs/Makefile | 1 +
> fs/squashfs/lzo_wrapper.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/lzo.h | 47 +++++++++++++++++
> 4 files changed, 190 insertions(+)
> create mode 100644 fs/squashfs/lzo_wrapper.c
> create mode 100644 include/linux/lzo.h
>
> diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
> index dc25d93..d8ee554 100644
> --- a/fs/squashfs/Kconfig
> +++ b/fs/squashfs/Kconfig
> @@ -17,6 +17,20 @@ menuconfig FS_SQUASHFS
> embedded systems where low overhead is needed. Further information
> and tools are available from http://squashfs.sourceforge.net.
>
> +config SQUASHFS_LZO
> + bool "Include support for LZO compressed file systems"
> + default y
> + depends on FS_SQUASHFS
> + select LZO_DECOMPRESS
> + help
> + Saying Y here includes support for reading Squashfs file systems
> + compressed with LZO compression. LZO compression is mainly
> + aimed at embedded systems with slower CPUs where the overheads
> + of zlib are too high.
> +
> + LZO is not the standard compression used in Squashfs and so most
> + file systems will be readable without selecting this option.
> +
> config SQUASHFS_XZ
> bool "Include support for XZ compressed file systems"
> default y
> diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
> index c0d024c..447e15e 100644
> --- a/fs/squashfs/Makefile
> +++ b/fs/squashfs/Makefile
> @@ -11,3 +11,4 @@ obj-y += inode.o
> obj-y += namei.o
> obj-y += super.o
> obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
> +obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
> diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c
> new file mode 100644
> index 0000000..b457955
> --- /dev/null
> +++ b/fs/squashfs/lzo_wrapper.c
> @@ -0,0 +1,128 @@
> +/*
> + * Squashfs - a compressed read only filesystem for Linux
> + *
> + * Copyright (c) 2010 LG Electronics
> + * Chan Jeong <chan.jeong@lge.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2,
> + * or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
> + *
> + * lzo_wrapper.c
> + */
> +
> +#include <linux/mutex.h>
> +#include <linux/lzo.h>
> +#include <types.h>
> +
> +#include "squashfs_fs.h"
> +#include "squashfs_fs_sb.h"
> +#include "squashfs.h"
> +#include "decompressor.h"
> +#include "page_actor.h"
> +
> +struct squashfs_lzo {
> + void *input;
> + void *output;
> +};
> +
> +static void *lzo_init(struct squashfs_sb_info *msblk, void *buff)
> +{
> + int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
> +
> + struct squashfs_lzo *stream = kzalloc(sizeof(*stream), GFP_KERNEL);
> + if (stream == NULL)
> + goto failed;
> + stream->input = vmalloc(block_size);
> + if (stream->input == NULL)
> + goto failed;
> + stream->output = vmalloc(block_size);
> + if (stream->output == NULL)
> + goto failed2;
> +
> + return stream;
> +
> +failed2:
> + vfree(stream->input);
> +failed:
> + ERROR("Failed to allocate lzo workspace\n");
> + kfree(stream);
> + return ERR_PTR(-ENOMEM);
> +}
> +
> +
> +static void lzo_free(void *strm)
> +{
> + struct squashfs_lzo *stream = strm;
> +
> + if (stream) {
> + vfree(stream->input);
> + vfree(stream->output);
> + }
> + kfree(stream);
> +}
> +
> +
> +static int lzo_uncompress(struct squashfs_sb_info *msblk, void *strm,
> + char **bh, int b, int offset, int length,
> + struct squashfs_page_actor *output)
> +{
> + struct squashfs_lzo *stream = strm;
> + void *buff = stream->input, *data;
> + int avail, i, bytes = length, res;
> + size_t out_len = output->length;
> +
> + for (i = 0; i < b; i++) {
> + avail = min(bytes, msblk->devblksize - offset);
> + memcpy(buff, bh[i] + offset, avail);
> + buff += avail;
> + bytes -= avail;
> + offset = 0;
> + kfree(bh[i]);
> + }
> +
> + res = lzo1x_decompress_safe(stream->input, (size_t)length,
> + stream->output, &out_len);
> + if (res != LZO_E_OK)
> + goto failed;
> +
> + res = bytes = (int)out_len;
> + data = squashfs_first_page(output);
> + buff = stream->output;
> + while (data) {
> + if (bytes <= PAGE_CACHE_SIZE) {
> + memcpy(data, buff, bytes);
> + break;
> + } else {
> + memcpy(data, buff, PAGE_CACHE_SIZE);
> + buff += PAGE_CACHE_SIZE;
> + bytes -= PAGE_CACHE_SIZE;
> + data = squashfs_next_page(output);
> + }
> + }
> + squashfs_finish_page(output);
> +
> + return res;
> +
> +failed:
> + return -EIO;
> +}
> +
> +const struct squashfs_decompressor squashfs_lzo_comp_ops = {
> + .init = lzo_init,
> + .free = lzo_free,
> + .decompress = lzo_uncompress,
> + .id = LZO_COMPRESSION,
> + .name = "lzo",
> + .supported = 1
> +};
> diff --git a/include/linux/lzo.h b/include/linux/lzo.h
We already have include/lzo.h with the same content, no need to add it
again.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and imx_obtain_fixed_clock()
From: Sascha Hauer @ 2016-10-04 19:28 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox@lists.infradead.org
In-Reply-To: <CAHQ1cqE3UduSbJ5u_y4Rpi4qUcFD3EYzqCDxv5iQckw3cAv9qQ@mail.gmail.com>
On Tue, Oct 04, 2016 at 06:43:01AM -0700, Andrey Smirnov wrote:
> >> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> >> new file mode 100644
> >> index 0000000..0357048
> >> --- /dev/null
> >> +++ b/drivers/clk/imx/clk.c
> >
> > We currently have the i.MX clock support in arch/arm/mach-imx/. This may
> > or may not be changed, but until it is, other i.MX clock support code
> > should go to arch/arm/mach-imx/ aswell.
>
> My preference would be to try to move the rest of i.MX clock code to
> drivers/clk, to reconcile with how it is done in Linux kernel. Is that
> OK with you or would you rather I move everything to
> arch/arm/mach-imx?
I sometimes thought the clk code should be moved to drivers/clk/, but I
never had enough motivation to actually create a patch. If you create
one I'll happily apply it.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
From: Sascha Hauer @ 2016-10-04 19:25 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox@lists.infradead.org
In-Reply-To: <CAHQ1cqGe9qXX-a9kDDfeG7j92gB5LNce0DYY4_Vh+4L-ssTkPA@mail.gmail.com>
On Tue, Oct 04, 2016 at 06:56:58AM -0700, Andrey Smirnov wrote:
> On Tue, Oct 4, 2016 at 12:13 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > On Mon, Oct 03, 2016 at 07:40:50AM -0700, Andrey Smirnov wrote:
> >> Add 'lpuart' serial driver, based on analogous driver from U-Boot
> >>
> >> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> >> ---
> >> drivers/serial/Kconfig | 4 +
> >> drivers/serial/Makefile | 1 +
> >> drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
> >> include/serial/lpuart.h | 28 ++++--
> >> 4 files changed, 244 insertions(+), 6 deletions(-)
> >> create mode 100644 drivers/serial/serial_lpuart.c
> >>
> >> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> >> index 146bf1e..02e869a 100644
> >> --- a/drivers/serial/Kconfig
> >> +++ b/drivers/serial/Kconfig
> >> @@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
> >> bool "Canon DIGIC serial driver"
> >> depends on ARCH_DIGIC
> >>
> >> +config DRIVER_SERIAL_LPUART
> >> + depends on ARCH_IMX
> >> + bool "LPUART serial driver"
> >> +
> >> endmenu
> >> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> >> index 189e777..7d1bae1 100644
> >> --- a/drivers/serial/Makefile
> >> +++ b/drivers/serial/Makefile
> >> @@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART) += serial_auart.o
> >> obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
> >> obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
> >> obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
> >> +obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
> >> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> >> new file mode 100644
> >> index 0000000..52fb6d3
> >> --- /dev/null
> >> +++ b/drivers/serial/serial_lpuart.c
> >> @@ -0,0 +1,217 @@
> >> +/*
> >> + * Copyright (c) 2016 Zodiac Inflight Innovation
> >> + * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
> >> + *
> >> + * Based on analogous driver from U-Boot
> >> + *
> >> + * See file CREDITS for list of people who contributed to this
> >> + * project.
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2
> >> + * as published by the Free Software Foundation.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >> + * GNU General Public License for more details.
> >> + *
> >> + */
> >> +
> >> +#include <common.h>
> >> +#include <driver.h>
> >> +#include <init.h>
> >> +#include <malloc.h>
> >> +#include <notifier.h>
> >> +#include <io.h>
> >> +#include <of.h>
> >> +#include <linux/err.h>
> >> +#include <linux/clk.h>
> >> +#include <serial/lpuart.h>
> >> +
> >> +struct lpuart {
> >> + struct console_device cdev;
> >> + int baudrate;
> >> + int dte_mode;
> >> + struct notifier_block notify;
> >> + struct resource *io;
> >> + void __iomem *base;
> >> + struct clk *clk;
> >> +};
> >> +
> >> +static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
> >> +{
> >> + return container_of(cdev, struct lpuart, cdev);
> >> +}
> >> +
> >> +static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
> >> +{
> >> + return container_of(nb, struct lpuart, notify);
> >> +}
> >> +
> >> +static void lpuart_enable(struct lpuart *lpuart, bool on)
> >> +{
> >> + u8 ctrl;
> >> +
> >> + ctrl = readb(lpuart->base + UARTCR2);
> >> + if (on)
> >> + ctrl |= UARTCR2_TE | UARTCR2_RE;
> >> + else
> >> + ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
> >> + writeb(ctrl, lpuart->base + UARTCR2);
> >> +}
> >> +
> >> +static int lpuart_serial_setbaudrate(struct console_device *cdev,
> >> + int baudrate)
> >> +{
> >> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> + lpuart_enable(lpuart, false);
> >> +
> >> + lpuart_setbrg(lpuart->base,
> >> + clk_get_rate(lpuart->clk),
> >> + baudrate);
> >> +
> >> + lpuart_enable(lpuart, true);
> >> +
> >> + lpuart->baudrate = baudrate;
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int lpuart_serial_getc(struct console_device *cdev)
> >> +{
> >> + bool ready;
> >> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> + do {
> >> + const u8 sr1 = readb(lpuart->base + UARTSR1);
> >> + ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
> >> + } while (!ready);
> >> +
> >> + return readb(lpuart->base + UARTDR);
> >> +}
> >> +
> >> +static void lpuart_serial_putc(struct console_device *cdev, char c)
> >> +{
> >> + lpuart_putc(cdev_to_lpuart(cdev)->base, c);
> >> +}
> >> +
> >> +/* Test whether a character is in the RX buffer */
> >> +static int lpuart_serial_tstc(struct console_device *cdev)
> >> +{
> >> + return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
> >> +}
> >> +
> >> +static void lpuart_serial_flush(struct console_device *cdev)
> >> +{
> >> + bool tx_empty;
> >> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
> >> +
> >> + do {
> >> + const u8 sr1 = readb(lpuart->base + UARTSR1);
> >> + tx_empty = !!(sr1 & UARTSR1_TDRE);
> >> + } while (!tx_empty);
> >> +}
> >> +
> >> +static int lpuart_clocksource_clock_change(struct notifier_block *nb,
> >> + unsigned long event, void *data)
> >> +{
> >> + struct lpuart *lpuart = nb_to_lpuart(nb);
> >> +
> >> + return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
> >> +}
> >
> > This doesn't make sense in this form. I introduced this code in the i.MX
> > uart driver since I had the need to change PLL rates while the uart is
> > active. When this happens I had to adjust the dividers for the new uart
> > base clock. The code above doesn't react to base clock changes though,
> > it takes the old rate stored in lpuart->baudrate.
> >
> > If you don't have to adjust PLL rates while the uart is active then I
> > suggest that you just remove this code.
>
> I am not sure I understand what you mean. I modeled this part of the
> code after i.MX driver (serial_imx.c) and unless I missed something
> (which I am not seeing) it should work exactly the same way.
>
> That is: parent clock changes, this notifier gets called, it sets
> configured baud rate again via lpuart_serial_setbaudrate, which in
> turn sets dividers based off of value it gets from
> clk_get_rate(lpuart->clk).
Ah, I see. I misread the code and thought you pass the clock rate to
lpuart_serial_setbaudrate(), but of course you pass the desired
baudrate. You're right, the code looks fine.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* [PATCH 1/2] ARM: mvebu: add support for Netgear RN2120
From: Uwe Kleine-König @ 2016-10-04 19:13 UTC (permalink / raw)
To: barebox
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/netgear-rn2120/Makefile | 2 +
arch/arm/boards/netgear-rn2120/board.c | 88 +++++++++++++++++++++++++++++
arch/arm/boards/netgear-rn2120/kwbimage.cfg | 7 +++
arch/arm/boards/netgear-rn2120/lowlevel.c | 41 ++++++++++++++
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-xp-rn2120-bb.dts | 11 ++++
arch/arm/mach-mvebu/Kconfig | 4 ++
images/Makefile.mvebu | 8 +++
9 files changed, 163 insertions(+)
create mode 100644 arch/arm/boards/netgear-rn2120/Makefile
create mode 100644 arch/arm/boards/netgear-rn2120/board.c
create mode 100644 arch/arm/boards/netgear-rn2120/kwbimage.cfg
create mode 100644 arch/arm/boards/netgear-rn2120/lowlevel.c
create mode 100644 arch/arm/dts/armada-xp-rn2120-bb.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 35b636f0cfbb..8f24fd13aa7b 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_MACH_MX28EVK) += freescale-mx28-evk/
obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard/
obj-$(CONFIG_MACH_NESO) += guf-neso/
obj-$(CONFIG_MACH_NETGEAR_RN104) += netgear-rn104/
+obj-$(CONFIG_MACH_NETGEAR_RN2120) += netgear-rn2120/
obj-$(CONFIG_MACH_NOMADIK_8815NHK) += nhk8815/
obj-$(CONFIG_MACH_NVIDIA_BEAVER) += nvidia-beaver/
obj-$(CONFIG_MACH_NVIDIA_JETSON) += nvidia-jetson-tk1/
diff --git a/arch/arm/boards/netgear-rn2120/Makefile b/arch/arm/boards/netgear-rn2120/Makefile
new file mode 100644
index 000000000000..01c7a259e9a5
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/netgear-rn2120/board.c b/arch/arm/boards/netgear-rn2120/board.c
new file mode 100644
index 000000000000..caf106af50d6
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/board.c
@@ -0,0 +1,88 @@
+#include <clock.h>
+#include <init.h>
+#include <of.h>
+#include <gpio.h>
+#include <printk.h>
+#include <linux/kernel.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+
+static int rn2120_init(void)
+{
+ /*
+ * This is the machine type that the kernel shipped by Netgear is using.
+ * It's wrong but a given fact.
+ */
+ armlinux_set_architecture(MACH_TYPE_ARMADA_XP_DB);
+
+ return 0;
+}
+device_initcall(rn2120_init);
+
+struct hdpower {
+ unsigned gpio_detect;
+ unsigned gpio_power;
+ unsigned gpio_led;
+};
+
+/*
+ * It would be nice to have this abstracted in the device tree, but currently
+ * this isn't the case.
+ */
+static struct hdpower rn2120_hdpower[] = {
+ {
+ /* sata 1 */
+ .gpio_detect = 32,
+ .gpio_power = 24,
+ .gpio_led = 31,
+ }, {
+ /* sata 2 */
+ .gpio_detect = 33,
+ .gpio_power = 25,
+ .gpio_led = 40,
+ }, {
+ /* sata 3 */
+ .gpio_detect = 34,
+ .gpio_power = 26,
+ .gpio_led = 44,
+ }, {
+ /* sata 4 */
+ .gpio_detect = 35,
+ .gpio_power = 28,
+ .gpio_led = 47,
+ },
+};
+
+static int rn2120_hddetect(void)
+{
+ int i;
+
+ if (!of_machine_is_compatible("netgear,readynas-2120"))
+ return 0;
+
+ for (i = 0; i < ARRAY_SIZE(rn2120_hdpower); ++i) {
+ int ret;
+ ret = gpio_direction_input(rn2120_hdpower[i].gpio_detect);
+ if (ret) {
+ pr_err("Failure to detect hd%d (%d)\n", i, ret);
+ continue;
+ }
+
+ ret = gpio_get_value(rn2120_hdpower[i].gpio_detect);
+ if (ret) {
+ /* no disk present */
+ gpio_direction_output(rn2120_hdpower[i].gpio_power, 0);
+ } else {
+ pr_info("Detected presence of disk #%d\n", i + 1);
+ /* make a pause after powering up 2 disks */
+ if (i && !(i & 1)) {
+ pr_info("Delay power up\n");
+ mdelay(7000);
+ }
+
+ gpio_direction_output(rn2120_hdpower[i].gpio_power, 1);
+ }
+ }
+ return 0;
+}
+device_initcall(rn2120_hddetect);
diff --git a/arch/arm/boards/netgear-rn2120/kwbimage.cfg b/arch/arm/boards/netgear-rn2120/kwbimage.cfg
new file mode 100644
index 000000000000..a6f0aa6d3dc3
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/kwbimage.cfg
@@ -0,0 +1,7 @@
+VERSION 1
+BOOT_FROM nand
+DESTADDR 00000000
+EXECADDR 00000000
+NAND_BLKSZ 00020000
+NAND_BADBLK_LOCATION 01
+BINARY binary.0 0000005b 00000068
diff --git a/arch/arm/boards/netgear-rn2120/lowlevel.c b/arch/arm/boards/netgear-rn2120/lowlevel.c
new file mode 100644
index 000000000000..29c8b43c4467
--- /dev/null
+++ b/arch/arm/boards/netgear-rn2120/lowlevel.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2015 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/io.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_armada_xp_rn2120_bb_start[];
+
+ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ /*
+ * This is necessary to allow the machine to draw more power. Probably
+ * connected to a TI TPS65251. Without this resetting a phy makes the
+ * SoC reset.
+ * This is effectively gpio_direction_output(42, 1);
+ */
+ writel((1 << 10) | readl((void *)0xd0018140), (void *)0xd0018140);
+ writel(~(1 << 10) & readl((void *)0xd0018144), (void *)0xd0018144);
+
+ fdt = __dtb_armada_xp_rn2120_bb_start -
+ get_runtime_offset();
+
+ mvebu_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 09bf68ea2be7..0bc5c9542d3f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ pbl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
pbl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o
+pbl-dtb-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o
pbl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o
pbl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) += tegra124-jetson-tk1.dtb.o
diff --git a/arch/arm/dts/armada-xp-rn2120-bb.dts b/arch/arm/dts/armada-xp-rn2120-bb.dts
new file mode 100644
index 000000000000..969136b336fc
--- /dev/null
+++ b/arch/arm/dts/armada-xp-rn2120-bb.dts
@@ -0,0 +1,11 @@
+/*
+ * Barebox specific DT overlay for Netgear ReadyNAS 2120
+ */
+
+#include "arm/armada-xp-netgear-rn2120.dts"
+
+/ {
+ chosen {
+ stdout-path = "/soc/internal-regs/serial@12000";
+ };
+};
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 79fcc8d3ac36..148b4f6d4cb3 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -55,6 +55,10 @@ config MACH_MARVELL_ARMADA_XP_GP
bool "Marvell Armada XP GP"
select ARCH_ARMADA_XP
+config MACH_NETGEAR_RN2120
+ bool "Netgear ReadyNAS 2120"
+ select ARCH_ARMADA_XP
+
config MACH_PLATHOME_OPENBLOCKS_AX3
bool "PlatHome OpenBlocks AX3"
select ARCH_ARMADA_XP
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 195f48d47073..6286c93e3d8e 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -57,6 +57,14 @@ image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp.img
image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp-uart.img
image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp-2nd.img
+NETGEAR_RN2120_KWBOPTS = ${KWBOPTS} -i $(board)/netgear-rn2120/kwbimage.cfg
+OPTS_start_netgear_rn2120.pblx.kwbimg = $(NETGEAR_RN2120_KWBOPTS)
+FILE_barebox-netgear-rn2120.img = start_netgear_rn2120.pblx.kwbimg
+FILE_barebox-netgear-rn2120-2nd.img = start_netgear_rn2120.pblx
+pblx-$(CONFIG_MACH_NETGEAR_RN2120) += start_netgear_rn2120
+image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120.img
+image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120-2nd.img
+
PLATHOME_OPENBLOCKS_AX3_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-ax3/kwbimage.cfg
OPTS_start_plathome_openblocks_ax3.pblx.kwbimg = $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
OPTS_start_plathome_openblocks_ax3.pblx.kwbuartimg = -m uart $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
--
2.9.3
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
* [PATCH 2/2] ARM: mvebu: document some general mvebu stuff and the rn2120 board
From: Uwe Kleine-König @ 2016-10-04 19:13 UTC (permalink / raw)
To: barebox
In-Reply-To: <20161004191306.1838-1-u.kleine-koenig@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Documentation/boards/mvebu.rst | 50 ++++++++++++++++++++++
.../boards/mvebu/Netgear-ReadyNAS-2120.rst | 19 ++++++++
2 files changed, 69 insertions(+)
create mode 100644 Documentation/boards/mvebu.rst
create mode 100644 Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst
diff --git a/Documentation/boards/mvebu.rst b/Documentation/boards/mvebu.rst
new file mode 100644
index 000000000000..b4f8e6043dac
--- /dev/null
+++ b/Documentation/boards/mvebu.rst
@@ -0,0 +1,50 @@
+Marvell Embedded Business Unit (mvebu)
+======================================
+
+Move of the Register Window
+---------------------------
+
+When an mvebu SoC comes up the internal registers are mapped at 0xd0000000 in
+the address space. To make it possible to have more than 3.25 GiB of continuous
+RAM in Linux this window is moved to 0xf1000000.
+Unfortunately the register to configure the location of the registers is located
+in this window, so there is no way to determine the location afterwards.
+
+RAM initialisation
+------------------
+
+Traditionally the RAM initialisation happens with a binary blob that have to be
+extracted from the vendor U-Boot::
+
+ scripts/kwbimage -x -i /dev/mtdblock0 -o .
+
+This creates among others a file "binary.0" that has to be put into the board
+directory. For license reasons this is usually not included in the barebox
+repository.
+
+Note that in the meantime U-Boot has open source code to do the RAM
+initialisation that could be taken.
+
+Booting second stage
+--------------------
+
+This is currently not possible because barebox assumes the registers are mapped
+at 0xd0000000 as is the case when the boot ROM gives control to the bootloader.
+
+Booting from UART
+-----------------
+
+The mvebu SoCs support booting from UART. For this there is a tool available in
+barebox called kwboot.
+
+mvebu boards
+------------
+
+Not all supported boards have a description here.
+
+.. toctree::
+ :glob:
+ :numbered:
+ :maxdepth: 1
+
+ mvebu/*
diff --git a/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst b/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst
new file mode 100644
index 000000000000..5bee03af9d38
--- /dev/null
+++ b/Documentation/boards/mvebu/Netgear-ReadyNAS-2120.rst
@@ -0,0 +1,19 @@
+Netgear ReadyNAS 2120
+=====================
+
+This is a rack mountable 4 bay NAS using an Armada XP dual-core processor.
+
+UART booting
+------------
+
+The first UART hides behind a sticker on 4 pins.
+
+The machine seems to do two resets at power on which makes UART booting hard. A
+trick to work around this is::
+
+ scripts/kwboot -d /dev/ttyUSB0; kwboot -b images/barebox-netgear-rn2120.img -t /dev/ttyUSB0
+
+This way the first window in which the CPU accepts the magic string is taken by
+the first invokation which blocks until the second reset happens. The second
+window is then hit with the image to boot. This is not 100% reliable but works
+most of the time.
--
2.9.3
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
* Re: [PATCH 14/20] i.MX: i2c-imx: Add Vybrid support
From: Andrey Smirnov @ 2016-10-04 13:57 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004072041.mfou7hpp3uoihqys@pengutronix.de>
On Tue, Oct 4, 2016 at 12:20 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:51AM -0700, Andrey Smirnov wrote:
>> Vybrid flavour of the I2C controller requires some additional quirks on
>> part of the driver. This commit ports those quirks code from analogous
>> Linux kernel driver.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> drivers/i2c/busses/i2c-imx.c | 215 ++++++++++++++++++++++++++++++++-----------
>> 1 file changed, 160 insertions(+), 55 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
>> index e407896..dbc76c2 100644
>> --- a/drivers/i2c/busses/i2c-imx.c
>> +++ b/drivers/i2c/busses/i2c-imx.c
>> @@ -43,6 +43,7 @@
>> +static inline void fsl_i2c_write_reg(unsigned int val,
>> + struct fsl_i2c_struct *i2c_fsl,
>> + unsigned int reg)
>> +{
>> + writeb(val, i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
>> +}
>> +
>> +static inline unsigned char fsl_i2c_read_reg(struct fsl_i2c_struct *i2c_fsl,
>> + unsigned int reg)
>> +{
>> + return readb(i2c_fsl->base + (reg << i2c_fsl->hwdata->regshift));
>> +}
>
> Can we have the introduction of the read/write accessor functions as a
> separate patch (with regshift hardcoded to 0)? This would make reviewing
> the rest easier.
OK, will do in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 13/20] i.MX: Add 'lpuart' serial driver
From: Andrey Smirnov @ 2016-10-04 13:56 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004071314.e7ptvxiqo33pdt6a@pengutronix.de>
On Tue, Oct 4, 2016 at 12:13 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:50AM -0700, Andrey Smirnov wrote:
>> Add 'lpuart' serial driver, based on analogous driver from U-Boot
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> drivers/serial/Kconfig | 4 +
>> drivers/serial/Makefile | 1 +
>> drivers/serial/serial_lpuart.c | 217 +++++++++++++++++++++++++++++++++++++++++
>> include/serial/lpuart.h | 28 ++++--
>> 4 files changed, 244 insertions(+), 6 deletions(-)
>> create mode 100644 drivers/serial/serial_lpuart.c
>>
>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> index 146bf1e..02e869a 100644
>> --- a/drivers/serial/Kconfig
>> +++ b/drivers/serial/Kconfig
>> @@ -137,4 +137,8 @@ config DRIVER_SERIAL_DIGIC
>> bool "Canon DIGIC serial driver"
>> depends on ARCH_DIGIC
>>
>> +config DRIVER_SERIAL_LPUART
>> + depends on ARCH_IMX
>> + bool "LPUART serial driver"
>> +
>> endmenu
>> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
>> index 189e777..7d1bae1 100644
>> --- a/drivers/serial/Makefile
>> +++ b/drivers/serial/Makefile
>> @@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART) += serial_auart.o
>> obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
>> obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
>> obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
>> +obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
>> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
>> new file mode 100644
>> index 0000000..52fb6d3
>> --- /dev/null
>> +++ b/drivers/serial/serial_lpuart.c
>> @@ -0,0 +1,217 @@
>> +/*
>> + * Copyright (c) 2016 Zodiac Inflight Innovation
>> + * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
>> + *
>> + * Based on analogous driver from U-Boot
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2
>> + * as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <common.h>
>> +#include <driver.h>
>> +#include <init.h>
>> +#include <malloc.h>
>> +#include <notifier.h>
>> +#include <io.h>
>> +#include <of.h>
>> +#include <linux/err.h>
>> +#include <linux/clk.h>
>> +#include <serial/lpuart.h>
>> +
>> +struct lpuart {
>> + struct console_device cdev;
>> + int baudrate;
>> + int dte_mode;
>> + struct notifier_block notify;
>> + struct resource *io;
>> + void __iomem *base;
>> + struct clk *clk;
>> +};
>> +
>> +static struct lpuart *cdev_to_lpuart(struct console_device *cdev)
>> +{
>> + return container_of(cdev, struct lpuart, cdev);
>> +}
>> +
>> +static struct lpuart *nb_to_lpuart(struct notifier_block *nb)
>> +{
>> + return container_of(nb, struct lpuart, notify);
>> +}
>> +
>> +static void lpuart_enable(struct lpuart *lpuart, bool on)
>> +{
>> + u8 ctrl;
>> +
>> + ctrl = readb(lpuart->base + UARTCR2);
>> + if (on)
>> + ctrl |= UARTCR2_TE | UARTCR2_RE;
>> + else
>> + ctrl &= ~(UARTCR2_TE | UARTCR2_RE);
>> + writeb(ctrl, lpuart->base + UARTCR2);
>> +}
>> +
>> +static int lpuart_serial_setbaudrate(struct console_device *cdev,
>> + int baudrate)
>> +{
>> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> + lpuart_enable(lpuart, false);
>> +
>> + lpuart_setbrg(lpuart->base,
>> + clk_get_rate(lpuart->clk),
>> + baudrate);
>> +
>> + lpuart_enable(lpuart, true);
>> +
>> + lpuart->baudrate = baudrate;
>> +
>> + return 0;
>> +}
>> +
>> +static int lpuart_serial_getc(struct console_device *cdev)
>> +{
>> + bool ready;
>> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> + do {
>> + const u8 sr1 = readb(lpuart->base + UARTSR1);
>> + ready = !!(sr1 & (UARTSR1_OR | UARTSR1_RDRF));
>> + } while (!ready);
>> +
>> + return readb(lpuart->base + UARTDR);
>> +}
>> +
>> +static void lpuart_serial_putc(struct console_device *cdev, char c)
>> +{
>> + lpuart_putc(cdev_to_lpuart(cdev)->base, c);
>> +}
>> +
>> +/* Test whether a character is in the RX buffer */
>> +static int lpuart_serial_tstc(struct console_device *cdev)
>> +{
>> + return !!readb(cdev_to_lpuart(cdev)->base + UARTRCFIFO);
>> +}
>> +
>> +static void lpuart_serial_flush(struct console_device *cdev)
>> +{
>> + bool tx_empty;
>> + struct lpuart *lpuart = cdev_to_lpuart(cdev);
>> +
>> + do {
>> + const u8 sr1 = readb(lpuart->base + UARTSR1);
>> + tx_empty = !!(sr1 & UARTSR1_TDRE);
>> + } while (!tx_empty);
>> +}
>> +
>> +static int lpuart_clocksource_clock_change(struct notifier_block *nb,
>> + unsigned long event, void *data)
>> +{
>> + struct lpuart *lpuart = nb_to_lpuart(nb);
>> +
>> + return lpuart_serial_setbaudrate(&lpuart->cdev, lpuart->baudrate);
>> +}
>
> This doesn't make sense in this form. I introduced this code in the i.MX
> uart driver since I had the need to change PLL rates while the uart is
> active. When this happens I had to adjust the dividers for the new uart
> base clock. The code above doesn't react to base clock changes though,
> it takes the old rate stored in lpuart->baudrate.
>
> If you don't have to adjust PLL rates while the uart is active then I
> suggest that you just remove this code.
I am not sure I understand what you mean. I modeled this part of the
code after i.MX driver (serial_imx.c) and unless I missed something
(which I am not seeing) it should work exactly the same way.
That is: parent clock changes, this notifier gets called, it sets
configured baud rate again via lpuart_serial_setbaudrate, which in
turn sets dividers based off of value it gets from
clk_get_rate(lpuart->clk).
It does use old value in lpuart->baudrate, just as i.MX driver does,
since AFAIU the purpose of this callback is to make sure that UART
operates at the originally configured baudrate despite the clock rate
change.
I feel like I am missing something, although it is 7AM where I am now,
so I wouldn't be surprised if I am :-)
>
>> @@ -225,25 +225,35 @@ static inline void lpuart_setbrg(void __iomem *base,
>> unsigned int refclock,
>> unsigned int baudrate)
>> {
>> + unsigned int bfra;
>> u16 sbr;
>> +
>> sbr = (u16) (refclock / (16 * baudrate));
>>
>> writeb(sbr >> 8, base + UARTBDH);
>> writeb(sbr & 0xff, base + UARTBDL);
>> +
>> + bfra = DIV_ROUND_UP(2 * refclock, baudrate) - 32 * sbr;
>> + bfra &= UARTCR4_BRFA_MASK;
>> + writeb(bfra, base + UARTCR4);
>> }
>>
>> -static inline void lpuart_setup(void __iomem *base,
>> - unsigned int refclock)
>> +static inline void lpuart_setup_with_fifo(void __iomem *base,
>> + unsigned int refclock,
>> + unsigned int twfifo)
>> {
>> -
>> /* Disable UART */
>> writeb(0, base + UARTCR2);
>> writeb(0, base + UARTMODEM);
>> writeb(0, base + UARTCR1);
>>
>> - /* Disable FIFOs */
>> - writeb(0, base + UARTPFIFO);
>> - writeb(0, base + UARTTWFIFO);
>> + if (twfifo) {
>> + writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
>> + writeb((u8)twfifo, base + UARTTWFIFO);
>> + } else {
>> + writeb(0, base + UARTPFIFO);
>> + writeb(0, base + UARTTWFIFO);
>> + }
>> writeb(1, base + UARTRWFIFO);
>> writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
>>
>> @@ -252,6 +262,12 @@ static inline void lpuart_setup(void __iomem *base,
>> writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
>> }
>>
>> +static inline void lpuart_setup(void __iomem *base,
>> + unsigned int refclock)
>> +{
>> + lpuart_setup_with_fifo(base, refclock, 0x00);
>> +}
>> +
>> static inline void lpuart_putc(void __iomem *base, int c)
>> {
>> if (!(readb(base + UARTCR2) & UARTCR2_TE))
>
> This was introduced earlier with this series. No need to change it, just
> create it correctly in the first place.
OK, will fix in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 11/20] i.MX: Add VF610 clock tree initialization code
From: Andrey Smirnov @ 2016-10-04 13:44 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004065811.vsvvya5csazebcfg@pengutronix.de>
On Mon, Oct 3, 2016 at 11:58 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:48AM -0700, Andrey Smirnov wrote:
>> Based on analogous code from Linux kernel
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> drivers/clk/imx/Makefile | 1 +
>> drivers/clk/imx/clk-vf610.c | 1224 +++++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 1225 insertions(+)
>> create mode 100644 drivers/clk/imx/clk-vf610.c
>>
>> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
>> index 0303c0b..2665f49 100644
>> --- a/drivers/clk/imx/Makefile
>> +++ b/drivers/clk/imx/Makefile
>> @@ -1 +1,2 @@
>> obj-y += clk.o
>> +obj-$(CONFIG_ARCH_VF610) += clk-vf610.o
>> +static struct clk *clk[VF610_CLK_END];
>> +struct clk_onecell_data clk_data;
>> +
>> +static struct clk * __init vf610_get_fixed_clock(struct device_node *np,
>> + const char *name)
>> +{
>> + struct clk *clk = of_clk_get_by_name(np, name);
>> +
>> + /* Backward compatibility if device tree is missing clks assignments */
>> + if (IS_ERR(clk))
>> + clk = imx_obtain_fixed_clock(name, 0);
>
> Ah, that explains it. No, we don't need this since we are compiling the
> device trees into barebox and can make sure they are compatible with our
> code.
OK, will fix in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 10/20] i.MX: clk: Port imx_check_clocks() and imx_obtain_fixed_clock()
From: Andrey Smirnov @ 2016-10-04 13:43 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004064923.txvdncnm57xwor5h@pengutronix.de>
On Mon, Oct 3, 2016 at 11:49 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:47AM -0700, Andrey Smirnov wrote:
>> Port imx_check_clocks() and imx_obtain_fixed_clock() from Linux kernel.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> arch/arm/mach-imx/clk.h | 4 ++++
>> drivers/clk/Makefile | 1 +
>> drivers/clk/imx/Makefile | 1 +
>> drivers/clk/imx/clk.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
>> 4 files changed, 55 insertions(+)
>> create mode 100644 drivers/clk/imx/Makefile
>> create mode 100644 drivers/clk/imx/clk.c
>>
>> diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
>> index 35e480f..f96e5d2 100644
>> --- a/arch/arm/mach-imx/clk.h
>> +++ b/arch/arm/mach-imx/clk.h
>> @@ -109,4 +109,8 @@ static inline struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg,
>> struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
>> void __iomem *reg, u8 shift, u32 exclusive_mask);
>>
>> +void imx_check_clocks(struct clk *clks[], unsigned int count);
>> +struct clk * __init imx_obtain_fixed_clock(const char *name, unsigned long rate);
>> +
>> +
>> #endif /* __IMX_CLK_H */
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
>> index 0fe8f1e..6dc82ea 100644
>> --- a/drivers/clk/Makefile
>> +++ b/drivers/clk/Makefile
>> @@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
>> obj-$(CONFIG_ARCH_TEGRA) += tegra/
>> obj-$(CONFIG_CLK_SOCFPGA) += socfpga.o
>> obj-$(CONFIG_MACH_MIPS_ATH79) += clk-ar933x.o
>> +obj-$(CONFIG_COMMON_CLK) += imx/
>> diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
>> new file mode 100644
>> index 0000000..0303c0b
>> --- /dev/null
>> +++ b/drivers/clk/imx/Makefile
>> @@ -0,0 +1 @@
>> +obj-y += clk.o
>> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
>> new file mode 100644
>> index 0000000..0357048
>> --- /dev/null
>> +++ b/drivers/clk/imx/clk.c
>
> We currently have the i.MX clock support in arch/arm/mach-imx/. This may
> or may not be changed, but until it is, other i.MX clock support code
> should go to arch/arm/mach-imx/ aswell.
My preference would be to try to move the rest of i.MX clock code to
drivers/clk, to reconcile with how it is done in Linux kernel. Is that
OK with you or would you rather I move everything to
arch/arm/mach-imx?
>
>> @@ -0,0 +1,49 @@
>> +#include <common.h>
>> +#include <init.h>
>> +#include <driver.h>
>> +#include <linux/clk.h>
>> +#include <io.h>
>> +#include <of.h>
>> +#include <linux/clkdev.h>
>> +#include <linux/err.h>
>> +
>> +#include "../../../arch/arm/mach-imx/clk.h"
>
> #include <mach/clk.h>
>
>> +
>> +void __init imx_check_clocks(struct clk *clks[], unsigned int count)
>> +{
>> + unsigned i;
>> +
>> + for (i = 0; i < count; i++)
>> + if (IS_ERR(clks[i]))
>> + pr_err("i.MX clk %u: register failed with %ld\n",
>> + i, PTR_ERR(clks[i]));
>> +}
>> +
>> +static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
>> +{
>> + struct of_phandle_args phandle;
>> + struct clk *clk = ERR_PTR(-ENODEV);
>> + char *path;
>> +
>> + path = basprintf("/clocks/%s", name);
>> + if (!path)
>> + return ERR_PTR(-ENOMEM);
>> +
>> + phandle.np = of_find_node_by_path(path);
>> + kfree(path);
>> +
>> + if (phandle.np)
>> + clk = of_clk_get_from_provider(&phandle);
>> +
>> + return clk;
>> +}
>
> Do we need this anyway? We already have clk providers for fixed-clock.
> Hm, looking further, maybe a later patch explains.
OK, I'll remove it and add DT fixes if needed in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 07/20] clk: Port of_clk_set_defautls()
From: Andrey Smirnov @ 2016-10-04 13:36 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004063853.5p7xulewpbuuacxv@pengutronix.de>
On Mon, Oct 3, 2016 at 11:38 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:44AM -0700, Andrey Smirnov wrote:
>> Port of_clk_set_defautls() from Linux kernel in order to support DT
>> configurations that require it (e. g. Vybrid).
>
> s/of_clk_set_defautls/of_clk_set_defaults/ here and in the subject.
>
>> diff --git a/include/linux/clk/clk-conf.h b/include/linux/clk/clk-conf.h
>> new file mode 100644
>> index 0000000..2c0a39e
>> --- /dev/null
>> +++ b/include/linux/clk/clk-conf.h
>> @@ -0,0 +1,22 @@
>> +/*
>> + * Copyright (C) 2014 Samsung Electronics Co., Ltd.
>> + * Sylwester Nawrocki <s.nawrocki@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/types.h>
>> +
>> +struct device_node;
>> +
>> +#if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK)
>> +int of_clk_set_defaults(struct device_node *node, bool clk_supplier);
>> +#else
>> +static inline int of_clk_set_defaults(struct device_node *node,
>> + bool clk_supplier)
>> +{
>> + return 0;
>> +}
>> +#endif
>
> We shouldn't need this static inline variant. The caller already exists for OF
> enabled builds only.
OK, will remove in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 04/20] i.MX: Add support for VF610 Tower board
From: Andrey Smirnov @ 2016-10-04 13:34 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004063214.2rguzsvtq4aste5x@pengutronix.de>
On Mon, Oct 3, 2016 at 11:32 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:41AM -0700, Andrey Smirnov wrote:
>> Add support for VF610 Tower board.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> arch/arm/boards/Makefile | 3 +-
>> arch/arm/boards/freescale-vf610-twr/Makefile | 4 +
>> arch/arm/boards/freescale-vf610-twr/board.c | 61 +++++
>> .../flash-header-vf610-twr.imxcfg | 277 +++++++++++++++++++++
>> arch/arm/boards/freescale-vf610-twr/lowlevel.c | 45 ++++
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/vf610-twr.dts | 14 ++
>> arch/arm/mach-imx/Kconfig | 4 +
>> arch/arm/mach-imx/include/mach/clock-vf610.h | 215 ++++++++++++++++
>> arch/arm/mach-imx/include/mach/iomux-vf610.h | 258 +++++++++++++++++++
>> images/Makefile.imx | 5 +
>> 11 files changed, 886 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boards/freescale-vf610-twr/Makefile
>> create mode 100644 arch/arm/boards/freescale-vf610-twr/board.c
>> create mode 100644 arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>> create mode 100644 arch/arm/boards/freescale-vf610-twr/lowlevel.c
>> create mode 100644 arch/arm/dts/vf610-twr.dts
>> create mode 100644 arch/arm/mach-imx/include/mach/clock-vf610.h
>> create mode 100644 arch/arm/mach-imx/include/mach/iomux-vf610.h
>>
>> diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
>> index 23a8dbd..c8bc565 100644
>> --- a/arch/arm/boards/Makefile
>> +++ b/arch/arm/boards/Makefile
>> @@ -10,7 +10,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += at91sam9260ek/
>> obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += at91sam9m10g45ek/
>> obj-$(CONFIG_MACH_AT91SAM9M10IHD) += at91sam9m10ihd/
>> obj-$(CONFIG_MACH_AT91SAM9N12EK) += at91sam9n12ek/
>> -obj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/
>> +nobj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/
>> obj-$(CONFIG_MACH_BEAGLE) += beagle/
>> obj-$(CONFIG_MACH_BEAGLEBONE) += beaglebone/
>> obj-$(CONFIG_MACH_CANON_A1100) += canon-a1100/
>> @@ -138,3 +138,4 @@ obj-$(CONFIG_MACH_ZEDBOARD) += avnet-zedboard/
>> obj-$(CONFIG_MACH_ZYLONITE) += zylonite/
>> obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/
>> obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/
>> +obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/
>> diff --git a/arch/arm/boards/freescale-vf610-twr/Makefile b/arch/arm/boards/freescale-vf610-twr/Makefile
>> new file mode 100644
>> index 0000000..32a7da5
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/Makefile
>> @@ -0,0 +1,4 @@
>> +obj-y += board.o
>> +obj-y += flash-header-vf610-twr.dcd.o
>> +extra-y += flash-header-vf610-twr.dcd.S flash-header-vf610-twr.dcd
>> +lwl-y += lowlevel.o
>> diff --git a/arch/arm/boards/freescale-vf610-twr/board.c b/arch/arm/boards/freescale-vf610-twr/board.c
>> new file mode 100644
>> index 0000000..0879f74
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/board.c
>> @@ -0,0 +1,61 @@
>> +/*
>> + * Copyright (c) 2016 Zodiac Inflight Innovation
>> + * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2
>> + * as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + */
>> +
>> +#include <config.h>
>> +#include <common.h>
>> +#include <dma.h>
>> +#include <driver.h>
>> +#include <init.h>
>> +#include <of.h>
>> +#include <malloc.h>
>> +#include <mci.h>
>> +#include <clock.h>
>> +#include <io.h>
>> +#include <linux/clk.h>
>> +#include <linux/err.h>
>> +
>> +/*
>> + * Make sure that esdhc1's clock divider is 1
>> + */
>> +static int vf610_twr_sdhc1_clock_init(void)
>> +{
>> + int err;
>> + struct clk *esdhc1_div, *esdhc1_div_parent;
>> +
>> + if (!of_machine_is_compatible("fsl,vf610-twr"))
>> + return 0;
>> +
>> + esdhc1_div = clk_lookup("esdhc1_div");
>> +
>> + if (IS_ERR(esdhc1_div))
>> + return PTR_ERR(esdhc1_div);
>> +
>> + esdhc1_div_parent = clk_get_parent(esdhc1_div);
>> + if (IS_ERR(esdhc1_div_parent))
>> + return PTR_ERR(esdhc1_div_parent);
>> +
>> + err = clk_set_rate(esdhc1_div,
>> + clk_get_rate(esdhc1_div_parent));
>> + if (err)
>> + return err;
>> +
>> + clk_put(esdhc1_div);
>> +
>> + return 0;
>> +}
>> +coredevice_initcall(vf610_twr_sdhc1_clock_init);
>
> What's the background for this? Should it be made SoC specific?
The divider that peripheral bus clock is connected to before that
clock goes to SDHC controller is not set to one, so if this is not set
the parent clock ends up being something around 12Mhz.
>
>> diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>> new file mode 100644
>> index 0000000..18138d2
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
>> @@ -0,0 +1,277 @@
>> +soc vf610
>> +loadaddr 0x80000000
>> +dcdofs 0x400
>> +
>> +#define VF610_DDR_PAD_CTRL 0x00000180 /* 25 Ohm drive strength */
>> +#define VF610_DDR_PAD_CTRL_1 0x00010180 /* 25 Ohm drive strength + differential input */
>> +
>> +#define DDRMC_PHY_DQ_TIMING 0x00002613
>> +#define DDRMC_PHY_DQS_TIMING 0x00002615
>> +#define DDRMC_PHY_CTRL 0x00210000
>> +#define DDRMC_PHY_MASTER_CTRL 0x0001012a
>> +#define DDRMC_PHY_SLAVE_CTRL 0x00002000
>> +#define DDRMC_PHY_OFF 0x00000000
>> +#define DDRMC_PHY_PROC_PAD_ODT 0x00010101
>> +
>> +#ifdef DEBUG
>> +#define CHECKPOINT(n) wm 32 0x3f000000 n
>> +#else
>> +#define CHECKPOINT(n)
>> +#endif
>> +
>> +CHECKPOINT(1)
>> +
>> +/* ======================= Clock initialization =======================*/
>> +
>> +/*
>> + * Ungate all IP block clocks
>> + */
>> +wm 32 0x4006b040 0xffffffff
>> +wm 32 0x4006b044 0xffffffff
>> +wm 32 0x4006b048 0xffffffff
>> +wm 32 0x4006b04c 0xffffffff
>> +wm 32 0x4006b050 0xffffffff
>> +wm 32 0x4006b058 0xffffffff
>> +wm 32 0x4006b05c 0xffffffff
>> +wm 32 0x4006b060 0xffffffff
>> +wm 32 0x4006b064 0xffffffff
>> +wm 32 0x4006b068 0xffffffff
>> +wm 32 0x4006b06c 0xffffffff
>> +
>> +
>> +/*
>> + * We have to options to clock DDR controller:
>> + *
>> + * - Use Core-A5 clock
>> + * - Use PLL2 PFD2 clock
>> + *
>> +
>> + * Using first option without changing PLL settings doesn't seem to be
>> + * possible given that DDRMC requires minimum of 300Mhz and MaskROM
>> + * configures it to be clocked at 264Mhz. Changing PLL1 settings
>> + * proved to be challenging becuase MaskROM code executing this DCD
>> + * will also be fetching the rest of the bootloader via some
>> + * peripheral interface whose clock is derived from Cortex-A5 clock.
>> + *
>> + * As a result this DCD configuration code uses the second option of
>> + * clocking DDR wiht PLL2 PFD2 clock output
>> + *
>> + * Turn PLL2 on
>> + */
>> +wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */
>> +
>> +CHECKPOINT(2)
>> +
>> +/*
>> + * Wait for PLLs to lock
>> + */
>> +check 32 while_any_bit_clear 0x40050030 0x80000000
>> +
>> +
>> +CHECKPOINT(3)
>> +
>> +/*
>> + * Switch DDRMC to be clocked with PLL2 PFD2 and enable PFD2 output
>> + */
>> +clear_bits 32 0x4006b008 0x00000040
>> +set_bits 32 0x4006b008 0x00002000
>> +
>> +
>> +
>> +/* ======================= DDR IOMUX ======================= */
>> +
>> +CHECKPOINT(4)
>> +
>> +wm 32 0x40048220 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048224 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048228 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004822c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048230 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048234 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048238 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004823c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048240 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048244 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048248 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004824c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048250 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048254 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048258 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004825c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048260 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048264 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048268 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004826c VF610_DDR_PAD_CTRL
>> +wm 32 0x40048270 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048274 VF610_DDR_PAD_CTRL
>> +wm 32 0x40048278 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004827c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048280 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048284 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048288 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x4004828c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048290 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048294 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x40048298 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x4004829c VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482a8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482ac VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482b8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482bc VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c0 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c4 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482c8 VF610_DDR_PAD_CTRL_1
>> +wm 32 0x400482cc VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d0 VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d4 VF610_DDR_PAD_CTRL
>> +wm 32 0x400482d8 VF610_DDR_PAD_CTRL
>> +wm 32 0x4004821c VF610_DDR_PAD_CTRL
>> +
>> +/* ======================= DDR Controller =======================*/
>> +
>> +CHECKPOINT(5)
>> +
>> +wm 32 0x400ae000 0x00000600
>> +wm 32 0x400ae008 0x00000020
>> +wm 32 0x400ae028 0x00013880
>> +wm 32 0x400ae02c 0x00030d40
>> +wm 32 0x400ae030 0x0000050c
>> +wm 32 0x400ae034 0x15040400
>> +wm 32 0x400ae038 0x1406040f
>> +wm 32 0x400ae040 0x04040000
>> +wm 32 0x400ae044 0x006db00c
>> +wm 32 0x400ae048 0x00000403
>> +wm 32 0x400ae050 0x01000000
>> +wm 32 0x400ae054 0x00060001
>> +wm 32 0x400ae058 0x000c0000
>> +wm 32 0x400ae05c 0x03000200
>> +wm 32 0x400ae060 0x00000006
>> +wm 32 0x400ae064 0x00010000
>> +wm 32 0x400ae068 0x0c30002c
>> +wm 32 0x400ae070 0x00000000
>> +wm 32 0x400ae074 0x00000003
>> +wm 32 0x400ae078 0x0000000a
>> +wm 32 0x400ae07c 0x003001d4
>> +wm 32 0x400ae084 0x00010000
>> +wm 32 0x400ae088 0x00050500
>> +wm 32 0x400ae098 0x00000000
>> +wm 32 0x400ae09c 0x04001002
>> +wm 32 0x400ae0a4 0x00000001
>> +wm 32 0x400ae0c0 0x00460420
>> +wm 32 0x400ae108 0x01000200
>> +wm 32 0x400ae10c 0x00000040
>> +wm 32 0x400ae114 0x00000200
>> +wm 32 0x400ae118 0x00000040
>> +wm 32 0x400ae120 0x00000000
>> +wm 32 0x400ae124 0x0a010300
>> +wm 32 0x400ae128 0x01014040
>> +wm 32 0x400ae12c 0x01010101
>> +wm 32 0x400ae130 0x03030100
>> +wm 32 0x400ae134 0x01000101
>> +wm 32 0x400ae138 0x0700000c
>> +wm 32 0x400ae13c 0x00000000
>> +wm 32 0x400ae148 0x10000000
>> +wm 32 0x400ae15c 0x01000000
>> +wm 32 0x400ae160 0x00040000
>> +wm 32 0x400ae164 0x00000002
>> +wm 32 0x400ae16c 0x00020000
>> +wm 32 0x400ae180 0x00002819
>> +wm 32 0x400ae184 0x01000000
>> +wm 32 0x400ae188 0x00000000
>> +wm 32 0x400ae18c 0x00000000
>> +wm 32 0x400ae198 0x00010100
>> +wm 32 0x400ae1a4 0x00000000
>> +wm 32 0x400ae1a8 0x00000004
>> +wm 32 0x400ae1b8 0x00040000
>> +wm 32 0x400ae1c8 0x00000000
>> +wm 32 0x400ae1cc 0x00000000
>> +wm 32 0x400ae1d4 0x00000000
>> +wm 32 0x400ae1d8 0x01010000
>> +wm 32 0x400ae1e0 0x02020000
>> +wm 32 0x400ae1e4 0x00000202
>> +wm 32 0x400ae1e8 0x01010064
>> +wm 32 0x400ae1ec 0x00010101
>> +wm 32 0x400ae1f0 0x00000064
>> +wm 32 0x400ae1f8 0x00000800
>> +wm 32 0x400ae210 0x00000506
>> +wm 32 0x400ae224 0x00020000
>> +wm 32 0x400ae228 0x01000000
>> +wm 32 0x400ae22c 0x04070303
>> +wm 32 0x400ae230 0x00000040
>> +wm 32 0x400ae23c 0x06000080
>> +wm 32 0x400ae240 0x04070303
>> +wm 32 0x400ae244 0x00000040
>> +wm 32 0x400ae248 0x00000040
>> +wm 32 0x400ae24c 0x000f0000
>> +wm 32 0x400ae250 0x000f0000
>> +wm 32 0x400ae25c 0x00000101
>> +wm 32 0x400ae268 0x682c4000
>> +wm 32 0x400ae26c 0x00000012
>> +wm 32 0x400ae278 0x00000006
>> +wm 32 0x400ae284 0x00010202
>> +
>> +/* ======================= DDR PHY =======================*/
>> +
>> +CHECKPOINT(6)
>> +
>> +wm 32 0x400ae400 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae440 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae480 DDRMC_PHY_DQ_TIMING
>> +wm 32 0x400ae404 DDRMC_PHY_DQS_TIMING
>> +wm 32 0x400ae444 DDRMC_PHY_DQS_TIMING
>> +wm 32 0x400ae408 DDRMC_PHY_CTRL
>> +wm 32 0x400ae448 DDRMC_PHY_CTRL
>> +wm 32 0x400ae488 DDRMC_PHY_CTRL
>> +wm 32 0x400ae40c DDRMC_PHY_CTRL
>> +wm 32 0x400ae44c DDRMC_PHY_CTRL
>> +wm 32 0x400ae48c DDRMC_PHY_CTRL
>> +wm 32 0x400ae410 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae450 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae490 DDRMC_PHY_SLAVE_CTRL
>> +wm 32 0x400ae4c4 DDRMC_PHY_OFF
>> +wm 32 0x400ae4c8 0x00001100
>> +wm 32 0x400ae4d0 DDRMC_PHY_PROC_PAD_ODT
>> +wm 32 0x400ae000 0x00000601
>> +
>> +CHECKPOINT(7)
>> +
>> +check 32 while_any_bit_clear 0x400ae140 0x100
>> +
>> +CHECKPOINT(8)
>> +
>> +/*
>> + * Cargo cult DDR controller initialization here we come!
>> + *
>> + * Experemintation with VF610 Tower Board shows that without the
>
> s/Experemintation/Experimentation/
Will fix in v2.
>
>> + * following code the board would not boot off of SD card when
>> + * power-cycled. It will however happily boot when reset via SW3/Reset
>> + * button. For whatever reason the following actions appear to be
>> + * necessary:
>> + *
>> + * - Initialize DDRMC as usual
>> + * - Issue a read to location in DDR address space
>> + * - Disable DDRMC
>> + * - Enable DDRMC and wait for it to finish initializing
>> + *
>> + * I am sure this is all going to be extrememly embarrassing to read
>> + * if/when the real problem and real solution is found.
>> + */
>> +
>> +/*
>> + * Because there's no standalone read command what we do here instead
>> + * is write a pattern to memory and then checking that memory address
>> + * against that pattern
>> + */
>> +wm 32 0x80000000 0xa5a5a5a5
>> +check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5
>> +
>> +wm 32 0x400ae000 0x00000600
>> +wm 32 0x400ae000 0x00000601
>> +
>> +check 32 while_any_bit_clear 0x400ae140 0x100
>> +
>> +CHECKPOINT(9)
>> \ No newline at end of file
>> diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
>> new file mode 100644
>> index 0000000..6504273
>> --- /dev/null
>> +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
>> @@ -0,0 +1,45 @@
>> +#include <common.h>
>> +#include <linux/sizes.h>
>> +#include <mach/generic.h>
>> +#include <asm/barebox-arm-head.h>
>> +#include <asm/barebox-arm.h>
>> +#include <mach/vf610-regs.h>
>> +#include <mach/clock-vf610.h>
>> +#include <mach/iomux-vf610.h>
>> +#include <debug_ll.h>
>> +
>> +static inline void setup_uart(void)
>> +{
>> + void __iomem *iomuxbase = IOMEM(VF610_IOMUXC_BASE_ADDR);
>> +
>> + vf610_ungate_all_peripherals();
>> +
>> + /*
>> + * VF610_PAD_PTB4__UART1_TX
>> + */
>> + writel(VF610_UART_PAD_CTRL | (2 << 20), iomuxbase + 0x0068);
>> + writel(0, iomuxbase + 0x0380);
>> +
>> + vf610_uart_setup_ll();
>> +}
>> +
>> +extern char __dtb_vf610_twr_start[];
>> +
>> +ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2)
>> +{
>> + int i;
>> + void *fdt;
>> + void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR);
>> +
>> + vf610_cpu_lowlevel_init();
>> +
>> + for (i = 0; i < VF610_MSCM_IRSPRC_NUM; i++)
>> + writew(VF610_MSCM_IRSPRC_CP0_EN,
>> + mscm + VF610_MSCM_IRSPRC(i));
>> +
>> + if (IS_ENABLED(CONFIG_DEBUG_LL))
>> + setup_uart();
>> +
>> + fdt = __dtb_vf610_twr_start - get_runtime_offset();
>> + barebox_arm_entry(0x80000000, SZ_128M, fdt);
>> +}
>> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
>> index d1a3fe8..f93152c 100644
>> --- a/arch/arm/dts/Makefile
>> +++ b/arch/arm/dts/Makefile
>> @@ -76,5 +76,6 @@ pbl-dtb-$(CONFIG_MACH_TX6X) += imx6q-tx6q.dtb.o
>> pbl-dtb-$(CONFIG_MACH_UDOO) += imx6q-udoo.dtb.o
>> pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
>> pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
>> +pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
>>
>> clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
>> diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
>> new file mode 100644
>> index 0000000..54b4435
>> --- /dev/null
>> +++ b/arch/arm/dts/vf610-twr.dts
>> @@ -0,0 +1,14 @@
>> +/*
>> + * Copyright 2013 Freescale Semiconductor, Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + */
>> +
>> +#include <arm/vf610-twr.dts>
>> +
>> +&usbdev0 {
>> + status = "disabled";
>> +};
>> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
>> index 71862ef..0284a8f 100644
>> --- a/arch/arm/mach-imx/Kconfig
>> +++ b/arch/arm/mach-imx/Kconfig
>> @@ -332,6 +332,10 @@ config MACH_CM_FX6
>> bool "CM FX6"
>> select ARCH_IMX6
>>
>> +config MACH_VF610_TWR
>> + bool "Freescale VF610 Tower Board"
>> + select ARCH_VF610
>> +
>> endif
>>
>> # ----------------------------------------------------------
>> diff --git a/arch/arm/mach-imx/include/mach/clock-vf610.h b/arch/arm/mach-imx/include/mach/clock-vf610.h
>
> Should be added in a SoC specific patch.
OK, unless you object I'll move this file to commit introducing other regs in v2
>
>> +#define CCM_CCR_FIRC_EN (1 << 16)
>> +#define CCM_CCR_OSCNT_MASK 0xff
>> +#define CCM_CCR_OSCNT(v) ((v) & 0xff)
>> +
>
> [...]
>
>> +#define ENET_EXTERNAL_CLK 50000000
>> +#define AUDIO_EXTERNAL_CLK 24576000
>
> VF610_ prefix?
I don't think any of that is use, so I'll remove it in v2
>
>> diff --git a/arch/arm/mach-imx/include/mach/iomux-vf610.h b/arch/arm/mach-imx/include/mach/iomux-vf610.h
>
> Should also be added in a SoC specific patch.
Will move to patch with registers in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* Re: [PATCH 02/20] i.MX: Add DEBUG_LL hooks for VF610
From: Andrey Smirnov @ 2016-10-04 13:27 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox@lists.infradead.org
In-Reply-To: <20161004062420.uie22nvogkeqyndz@pengutronix.de>
On Mon, Oct 3, 2016 at 11:24 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Mon, Oct 03, 2016 at 07:40:39AM -0700, Andrey Smirnov wrote:
>> Add code to support DEBUG_LL functionality on VF610/Vybrid platform.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> arch/arm/mach-imx/include/mach/debug_ll.h | 27 ++-
>> arch/arm/mach-imx/include/mach/vf610-regs.h | 126 +++++++++++++
>> common/Kconfig | 10 +-
>> include/serial/lpuart.h | 265 ++++++++++++++++++++++++++++
>> 4 files changed, 426 insertions(+), 2 deletions(-)
>> create mode 100644 arch/arm/mach-imx/include/mach/vf610-regs.h
>> create mode 100644 include/serial/lpuart.h
>>
>> diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h
>> index 5c2db6c..a132f3c 100644
>> --- a/arch/arm/mach-imx/include/mach/debug_ll.h
>> +++ b/arch/arm/mach-imx/include/mach/debug_ll.h
>> @@ -14,8 +14,10 @@
>> #include <mach/imx51-regs.h>
>> #include <mach/imx53-regs.h>
>> #include <mach/imx6-regs.h>
>> +#include <mach/vf610-regs.h>
>>
>> #include <serial/imx-uart.h>
>> +#include <serial/lpuart.h>
>>
>> #ifdef CONFIG_DEBUG_LL
>>
>> @@ -42,6 +44,8 @@
>> #define IMX_DEBUG_SOC MX53
>> #elif defined CONFIG_DEBUG_IMX6Q_UART
>> #define IMX_DEBUG_SOC MX6
>> +#elif defined CONFIG_DEBUG_VF610_UART
>> +#define IMX_DEBUG_SOC VF610
>> #else
>> #error "unknown i.MX debug uart soc type"
>> #endif
>> @@ -74,6 +78,13 @@ static inline void imx6_uart_setup_ll(void)
>> imx6_uart_setup(base);
>> }
>>
>> +static inline void vf610_uart_setup_ll(void)
>> +{
>> + void *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC, CONFIG_DEBUG_IMX_UART_PORT));
>> +
>> + lpuart_setup(base, 66000000);
>> +}
>> +
>> static inline void PUTC_LL(int c)
>> {
>> void __iomem *base = IOMEM(IMX_UART_BASE(IMX_DEBUG_SOC,
>> @@ -82,14 +93,19 @@ static inline void PUTC_LL(int c)
>> if (!base)
>> return;
>>
>> - imx_uart_putc(base, c);
>> + if (IS_ENABLED(CONFIG_DEBUG_VF610_UART))
>> + lpuart_putc(base, c);
>> + else
>> + imx_uart_putc(base, c);
>> }
>> +
>> #else
>>
>> static inline void imx50_uart_setup_ll(void) {}
>> static inline void imx51_uart_setup_ll(void) {}
>> static inline void imx53_uart_setup_ll(void) {}
>> static inline void imx6_uart_setup_ll(void) {}
>> +static inline void vf610_uart_setup_ll(void) {}
>>
>> #endif /* CONFIG_DEBUG_LL */
>>
>> @@ -115,4 +131,13 @@ static inline void imx53_ungate_all_peripherals(void)
>> imx_ungate_all_peripherals(IOMEM(MX53_CCM_BASE_ADDR));
>> }
>>
>> +static inline void vf610_ungate_all_peripherals(void)
>> +{
>> + void __iomem *ccmbase = IOMEM(VF610_CCM_BASE_ADDR);
>> + int i;
>> +
>> + for (i = 0x40; i <= 0x6c; i += 4)
>> + writel(0xffffffff, ccmbase + i);
>> +}
>> +
>> #endif /* __MACH_DEBUG_LL_H__ */
>> diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h
>
> This is probably not the right patch to add this file.
OK, unless you prefer something different, I'll split this file into a
separate patch in v2
>
>> new file mode 100644
>> index 0000000..a1c1a09
>> --- /dev/null
>> +++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
>> @@ -0,0 +1,126 @@
>> +/*
>> + * Copyright 2013-2014 Freescale Semiconductor, Inc.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __ASM_ARCH_IMX_REGS_H__
>> +#define __ASM_ARCH_IMX_REGS_H__
>
> MACH_VF610_REGS_H ?
OK, will do in v2
>
>> +/* System Reset Controller (SRC) */
>> +#define SRC_SRSR_SW_RST (0x1 << 18)
>> +#define SRC_SRSR_RESETB (0x1 << 7)
>> +#define SRC_SRSR_JTAG_RST (0x1 << 5)
>> +#define SRC_SRSR_WDOG_M4 (0x1 << 4)
>> +#define SRC_SRSR_WDOG_A5 (0x1 << 3)
>> +#define SRC_SRSR_POR_RST (0x1 << 0)
>> +#define SRC_SBMR2_BMOD_MASK (0x3 << 24)
>> +#define SRC_SBMR2_BMOD_SHIFT 24
>> +#define SRC_SBMR2_BMOD_FUSES 0x0
>> +#define SRC_SBMR2_BMOD_SERIAL 0x1
>> +#define SRC_SBMR2_BMOD_RCON 0x2
>
> Please add a VF610_ prefix.
I have a suspicion that I am not using those definitions anywhere, so
I'll ether remove them or add said prefix in v2.
Thanks,
Andrey
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply
* [PATCH 2/5] fs: squashfs: port lz4 compression support from kernel
From: Enrico Jorns @ 2016-10-04 10:10 UTC (permalink / raw)
To: barebox; +Cc: Enrico Jorns
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
---
fs/squashfs/Kconfig | 13 +++++
fs/squashfs/Makefile | 1 +
fs/squashfs/lz4_wrapper.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 154 insertions(+)
create mode 100644 fs/squashfs/lz4_wrapper.c
diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index d8ee554..d2de168 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
embedded systems where low overhead is needed. Further information
and tools are available from http://squashfs.sourceforge.net.
+config SQUASHFS_LZ4
+ bool "Include support for LZ4 compressed file systems"
+ depends on FS_SQUASHFS
+ select LZ4_DECOMPRESS
+ help
+ Saying Y here includes support for reading Squashfs file systems
+ compressed with LZ4 compression. LZ4 compression is mainly
+ aimed at embedded systems with slower CPUs where the overheads
+ of zlib are too high.
+
+ LZ4 is not the standard compression used in Squashfs and so most
+ file systems will be readable without selecting this option.
+
config SQUASHFS_LZO
bool "Include support for LZO compressed file systems"
default y
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 447e15e..8590b09 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -12,3 +12,4 @@ obj-y += namei.o
obj-y += super.o
obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
+obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
diff --git a/fs/squashfs/lz4_wrapper.c b/fs/squashfs/lz4_wrapper.c
new file mode 100644
index 0000000..6ca6a32
--- /dev/null
+++ b/fs/squashfs/lz4_wrapper.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2013, 2014
+ * Phillip Lougher <phillip@squashfs.org.uk>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <types.h>
+#include <linux/mutex.h>
+#include <linux/lz4.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+#define LZ4_LEGACY 1
+
+struct lz4_comp_opts {
+ __le32 version;
+ __le32 flags;
+};
+
+struct squashfs_lz4 {
+ void *input;
+ void *output;
+};
+
+
+static void *lz4_comp_opts(struct squashfs_sb_info *msblk,
+ void *buff, int len)
+{
+ struct lz4_comp_opts *comp_opts = buff;
+
+ /* LZ4 compressed filesystems always have compression options */
+ if (comp_opts == NULL || len < sizeof(*comp_opts))
+ return ERR_PTR(-EIO);
+
+ if (le32_to_cpu(comp_opts->version) != LZ4_LEGACY) {
+ /* LZ4 format currently used by the kernel is the 'legacy'
+ * format */
+ ERROR("Unknown LZ4 version\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ return NULL;
+}
+
+
+static void *lz4_init(struct squashfs_sb_info *msblk, void *buff)
+{
+ int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE);
+ struct squashfs_lz4 *stream;
+
+ stream = kzalloc(sizeof(*stream), GFP_KERNEL);
+ if (stream == NULL)
+ goto failed;
+ stream->input = vmalloc(block_size);
+ if (stream->input == NULL)
+ goto failed2;
+ stream->output = vmalloc(block_size);
+ if (stream->output == NULL)
+ goto failed3;
+
+ return stream;
+
+failed3:
+ vfree(stream->input);
+failed2:
+ kfree(stream);
+failed:
+ ERROR("Failed to initialise LZ4 decompressor\n");
+ return ERR_PTR(-ENOMEM);
+}
+
+
+static void lz4_free(void *strm)
+{
+ struct squashfs_lz4 *stream = strm;
+
+ if (stream) {
+ vfree(stream->input);
+ vfree(stream->output);
+ }
+ kfree(stream);
+}
+
+
+static int lz4_uncompress(struct squashfs_sb_info *msblk, void *strm,
+ char **bh, int b, int offset, int length,
+ struct squashfs_page_actor *output)
+{
+ struct squashfs_lz4 *stream = strm;
+ void *buff = stream->input, *data;
+ int avail, i, bytes = length, res;
+ size_t dest_len = output->length;
+
+ for (i = 0; i < b; i++) {
+ avail = min(bytes, msblk->devblksize - offset);
+ memcpy(buff, bh[i] + offset, avail);
+ buff += avail;
+ bytes -= avail;
+ offset = 0;
+ kfree(bh[i]);
+ }
+
+ res = lz4_decompress_unknownoutputsize(stream->input, length,
+ stream->output, &dest_len);
+ if (res)
+ return -EIO;
+
+ bytes = dest_len;
+ data = squashfs_first_page(output);
+ buff = stream->output;
+ while (data) {
+ if (bytes <= PAGE_CACHE_SIZE) {
+ memcpy(data, buff, bytes);
+ break;
+ }
+ memcpy(data, buff, PAGE_CACHE_SIZE);
+ buff += PAGE_CACHE_SIZE;
+ bytes -= PAGE_CACHE_SIZE;
+ data = squashfs_next_page(output);
+ }
+ squashfs_finish_page(output);
+
+ return dest_len;
+}
+
+const struct squashfs_decompressor squashfs_lz4_comp_ops = {
+ .init = lz4_init,
+ .comp_opts = lz4_comp_opts,
+ .free = lz4_free,
+ .decompress = lz4_uncompress,
+ .id = LZ4_COMPRESSION,
+ .name = "lz4",
+ .supported = 1
+};
--
2.9.3
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
* [PATCH 5/5] fs: squashfs: append linux rootarg for ubi volume
From: Enrico Jorns @ 2016-10-04 10:10 UTC (permalink / raw)
To: barebox; +Cc: Enrico Jorns
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
If squashfs runs from an ubi volume, append appropriate root kernel
options.
Note that ubiblock support is required in the kernel for that.
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
---
fs/squashfs/squashfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/fs/squashfs/squashfs.c b/fs/squashfs/squashfs.c
index 6d04681..c4d0bac 100644
--- a/fs/squashfs/squashfs.c
+++ b/fs/squashfs/squashfs.c
@@ -9,12 +9,16 @@
#include <linux/fs.h>
#include <linux/stat.h>
#include <linux/pagemap.h>
+#include <linux/mtd/ubi.h>
+#include <linux/mtd/mtd.h>
#include "squashfs_fs.h"
#include "squashfs_fs_sb.h"
#include "squashfs_fs_i.h"
#include "squashfs.h"
+struct ubi_volume_desc;
+
char *squashfs_devread(struct squashfs_sb_info *fs, int byte_offset,
int byte_len)
{
@@ -108,6 +112,31 @@ static struct inode *squashfs_findfile(struct super_block *sb,
return NULL;
}
+void squashfs_set_rootarg(struct squashfs_priv *priv, struct fs_device_d *fsdev)
+{
+ struct ubi_volume_desc *ubi_vol;
+ struct ubi_volume_info vi = {};
+ struct ubi_device_info di = {};
+ struct mtd_info *mtd;
+ char *str;
+
+ ubi_vol = ubi_open_volume_cdev(fsdev->cdev, UBI_READONLY);
+
+ if (IS_ERR(ubi_vol))
+ return;
+
+ ubi_get_volume_info(ubi_vol, &vi);
+ ubi_get_device_info(vi.ubi_num, &di);
+ mtd = di.mtd;
+
+ str = basprintf("root=/dev/ubiblock%d_%d ubi.mtd=%s ubi.block=%d,%d rootfstype=squashfs",
+ vi.ubi_num, vi.vol_id, mtd->cdev.partname, vi.ubi_num, vi.vol_id);
+
+ fsdev_set_linux_rootarg(fsdev, str);
+
+ free(str);
+}
+
static int squashfs_probe(struct device_d *dev)
{
struct fs_device_d *fsdev;
@@ -130,6 +159,8 @@ static int squashfs_probe(struct device_d *dev)
goto err_out;
}
+ squashfs_set_rootarg(priv, fsdev);
+
return 0;
err_out:
--
2.9.3
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
* [PATCH 3/5] fs: squashfs: port zlib compression support from kernel
From: Enrico Jorns @ 2016-10-04 10:10 UTC (permalink / raw)
To: barebox; +Cc: Enrico Jorns
In-Reply-To: <20161004101048.12970-1-ejo@pengutronix.de>
As this is the default compression method for squashfs, make this the
default in kconfig selection, too
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
---
fs/squashfs/Kconfig | 20 ++++++-
fs/squashfs/Makefile | 1 +
fs/squashfs/zlib_wrapper.c | 132 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 152 insertions(+), 1 deletion(-)
create mode 100644 fs/squashfs/zlib_wrapper.c
diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig
index d2de168..1cb1ac5 100644
--- a/fs/squashfs/Kconfig
+++ b/fs/squashfs/Kconfig
@@ -17,6 +17,19 @@ menuconfig FS_SQUASHFS
embedded systems where low overhead is needed. Further information
and tools are available from http://squashfs.sourceforge.net.
+config SQUASHFS_ZLIB
+ bool "Include support for ZLIB compressed file systems"
+ depends on FS_SQUASHFS
+ select ZLIB
+ default y
+ help
+ ZLIB compression is the standard compression used by Squashfs
+ file systems. It offers a good trade-off between compression
+ achieved and the amount of CPU time and memory necessary to
+ compress and decompress.
+
+ If unsure, say Y.
+
config SQUASHFS_LZ4
bool "Include support for LZ4 compressed file systems"
depends on FS_SQUASHFS
@@ -30,9 +43,10 @@ config SQUASHFS_LZ4
LZ4 is not the standard compression used in Squashfs and so most
file systems will be readable without selecting this option.
+ If unsure, say N.
+
config SQUASHFS_LZO
bool "Include support for LZO compressed file systems"
- default y
depends on FS_SQUASHFS
select LZO_DECOMPRESS
help
@@ -44,6 +58,8 @@ config SQUASHFS_LZO
LZO is not the standard compression used in Squashfs and so most
file systems will be readable without selecting this option.
+ If unsure, say N.
+
config SQUASHFS_XZ
bool "Include support for XZ compressed file systems"
default y
@@ -57,3 +73,5 @@ config SQUASHFS_XZ
XZ is not the standard compression used in Squashfs and so most
file systems will be readable without selecting this option.
+
+ If unsure, say N.
diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile
index 8590b09..7976e3f 100644
--- a/fs/squashfs/Makefile
+++ b/fs/squashfs/Makefile
@@ -13,3 +13,4 @@ obj-y += super.o
obj-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o
obj-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o
obj-$(CONFIG_SQUASHFS_LZ4) += lz4_wrapper.o
+obj-$(CONFIG_SQUASHFS_ZLIB) += zlib_wrapper.o
diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c
new file mode 100644
index 0000000..f422515
--- /dev/null
+++ b/fs/squashfs/zlib_wrapper.c
@@ -0,0 +1,132 @@
+/*
+ * Squashfs - a compressed read only filesystem for Linux
+ *
+ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ * Phillip Lougher <phillip@squashfs.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+ * or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * zlib_wrapper.c
+ */
+
+
+#include <linux/mutex.h>
+#include <linux/zlib.h>
+
+#include "squashfs_fs.h"
+#include "squashfs_fs_sb.h"
+#include "squashfs.h"
+#include "decompressor.h"
+#include "page_actor.h"
+
+static void *zlib_init(struct squashfs_sb_info *dummy, void *buff)
+{
+ z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL);
+ if (stream == NULL)
+ goto failed;
+ stream->workspace = vmalloc(zlib_inflate_workspacesize());
+ if (stream->workspace == NULL)
+ goto failed;
+
+ return stream;
+
+failed:
+ ERROR("Failed to allocate zlib workspace\n");
+ kfree(stream);
+ return ERR_PTR(-ENOMEM);
+}
+
+
+static void zlib_free(void *strm)
+{
+ z_stream *stream = strm;
+
+ if (stream)
+ vfree(stream->workspace);
+ kfree(stream);
+}
+
+
+static int zlib_uncompress(struct squashfs_sb_info *msblk, void *strm,
+ char **bh, int b, int offset, int length,
+ struct squashfs_page_actor *output)
+{
+ int zlib_err, zlib_init = 0, k = 0;
+ z_stream *stream = strm;
+
+ stream->avail_out = PAGE_CACHE_SIZE;
+ stream->next_out = squashfs_first_page(output);
+ stream->avail_in = 0;
+
+ do {
+ if (stream->avail_in == 0 && k < b) {
+ int avail = min(length, msblk->devblksize - offset);
+ length -= avail;
+ stream->next_in = bh[k] + offset;
+ stream->avail_in = avail;
+ offset = 0;
+ }
+
+ if (stream->avail_out == 0) {
+ stream->next_out = squashfs_next_page(output);
+ if (stream->next_out != NULL)
+ stream->avail_out = PAGE_CACHE_SIZE;
+ }
+
+ if (!zlib_init) {
+ zlib_err = zlib_inflateInit(stream);
+ if (zlib_err != Z_OK) {
+ squashfs_finish_page(output);
+ goto out;
+ }
+ zlib_init = 1;
+ }
+
+ zlib_err = zlib_inflate(stream, Z_SYNC_FLUSH);
+
+ if (stream->avail_in == 0 && k < b)
+ kfree(bh[k++]);
+ } while (zlib_err == Z_OK);
+
+ squashfs_finish_page(output);
+
+ if (zlib_err != Z_STREAM_END)
+ goto out;
+
+ zlib_err = zlib_inflateEnd(stream);
+ if (zlib_err != Z_OK)
+ goto out;
+
+ if (k < b)
+ goto out;
+
+ return stream->total_out;
+
+out:
+ for (; k < b; k++)
+ kfree(bh[k]);
+
+ return -EIO;
+}
+
+const struct squashfs_decompressor squashfs_zlib_comp_ops = {
+ .init = zlib_init,
+ .free = zlib_free,
+ .decompress = zlib_uncompress,
+ .id = ZLIB_COMPRESSION,
+ .name = "zlib",
+ .supported = 1
+};
+
--
2.9.3
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox