* Re: UBIFS trouble
From: Juergen Borleis @ 2016-11-29 14:04 UTC (permalink / raw)
To: barebox
In-Reply-To: <201611291202.23646.jbe@pengutronix.de>
FYI: soft links are broken since 2016.05.0.
jb
--
Pengutronix e.K. | Juergen Borleis |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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* [PATCH 1/2] imx6qdl-phytec-phycore-som.dtsi: rename eeprom
From: Stefan Lengfeld @ 2016-11-30 10:27 UTC (permalink / raw)
To: barebox
From: Jan Remmet <j.remmet@phytec.de>
Chose name according to kernel. This is needed for bootstate.
Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index d446a5e..37ad878 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -119,9 +119,9 @@
clock-frequency = <400000>;
status = "okay";
- eeprom: 24c32@50 {
+ eeprom: eeprom@50 {
status = "disabled";
- compatible = "st,24c32";
+ compatible = "24c32";
reg = <0x50>;
};
};
--
1.9.1
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* [PATCH 2/2] Documentation: remote-control: fix markup
From: Stefan Lengfeld @ 2016-11-30 10:27 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480501660-4540-1-git-send-email-s.lengfeld@phytec.de>
Fix missing '*' for bold text and remove indentation. It should be
rendered as a single paragraph.
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
---
Documentation/user/remote-control.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/user/remote-control.rst b/Documentation/user/remote-control.rst
index b9275ce..99c2181 100644
--- a/Documentation/user/remote-control.rst
+++ b/Documentation/user/remote-control.rst
@@ -112,10 +112,10 @@ This is especially useful for flawy serial connections.
barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ls
. .. dev env mnt
-*NOTE** To terminate resulting Barebox console session press 'Ctrl-T'
+**NOTE** To terminate resulting Barebox console session press 'Ctrl-T'
**NOTE** You can also send 'ping' request to the target without
- closing console session by pressint 'Ctrl-P'
+closing console session by pressint 'Ctrl-P'
transferring files
------------------
--
1.9.1
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* [PATCH 3/3] ARM: rdu2: bring board support in line with other boards
From: Lucas Stach @ 2016-11-30 11:07 UTC (permalink / raw)
To: barebox
In-Reply-To: <20161130110741.23345-1-l.stach@pengutronix.de>
- add barebox update handler
- add barebox environment partition
- automount using the PCIe ethernet
- set hostname from board file
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/boards/zii-imx6q-rdu2/board.c | 18 ++++++++++++++++++
.../zii-imx6q-rdu2/defaultenv-rdu2/init/automount | 17 +++++++++++++++++
arch/arm/dts/imx6qdl-zii-rdu2.dtsi | 12 +++++++++++-
3 files changed, 46 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount
diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index 636c57630803..ee04517d2985 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -33,6 +33,7 @@
#include <spi/spi.h>
#include <mach/spi.h>
#include <mach/usb.h>
+#include <mach/bbu.h>
#define RDU2_DAC1_RESET IMX_GPIO_NR(1, 0)
#define RDU2_DAC2_RESET IMX_GPIO_NR(1, 2)
@@ -151,3 +152,20 @@ static int rdu2_enable_front_panel_usb(void)
return ret;
}
late_initcall(rdu2_enable_front_panel_usb);
+
+static int rdu2_devices_init(void)
+{
+ if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+ !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+ return 0;
+
+ barebox_set_hostname("rdu2");
+
+ imx6_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox",
+ BBU_HANDLER_FLAG_DEFAULT);
+
+ imx6_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc3", 0);
+
+ return 0;
+}
+device_initcall(rdu2_devices_init);
diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount
new file mode 100644
index 000000000000..6c04eb48a1a7
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+# automount tftp server based on $eth0.serverip
+
+mkdir -p /mnt/tftp
+automount /mnt/tftp 'ifup eth1 && mount -t tftp $eth1.serverip /mnt/tftp'
+
+# automount nfs server's nfsroot
+
+mkdir -p /mnt/nfs
+automount /mnt/nfs 'ifup eth1 && mount -t nfs ${eth1.serverip}:/home/${global.user}/nfsroot/${global.hostname} /mnt/nfs'
+
+
+# FAT on usb disk example
+
+#mkdir -p /mnt/fat
+#automount -d /mnt/fat 'usb && [ -e /dev/disk0.0 ] && mount /dev/disk0.0 /mnt/fat'
diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
index 55af3f964e49..5b255e9aaa57 100644
--- a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
+++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
@@ -46,6 +46,11 @@
/ {
chosen {
linux,stdout-path = &uart1;
+
+ environment@0 {
+ compatible = "barebox,environment";
+ device-path = &nor_flash, "partname:barebox-environment";
+ };
};
mdio {
@@ -389,7 +394,12 @@
partition@0 {
label = "barebox";
- reg = <0x0 0x100000>;
+ reg = <0x0 0xc0000>;
+ };
+
+ partition@e0000 {
+ label = "barebox-environment";
+ reg = <0xc0000 0x40000>;
};
};
};
--
2.10.2
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* [PATCH 2/3] ARM: rdu2: support QP variant
From: Lucas Stach @ 2016-11-30 11:07 UTC (permalink / raw)
To: barebox
In-Reply-To: <20161130110741.23345-1-l.stach@pengutronix.de>
This adds support for the QuadPlus variant of the board as a separate
Barebox binary.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
| 132 +++++++++++++++++++++
arch/arm/boards/zii-imx6q-rdu2/lowlevel.c | 13 ++
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/imx6qp-zii-rdu2.dts | 52 ++++++++
images/Makefile.imx | 5 +
5 files changed, 203 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg
create mode 100644 arch/arm/dts/imx6qp-zii-rdu2.dts
--git a/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg
new file mode 100644
index 000000000000..03e764b3b366
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg
@@ -0,0 +1,132 @@
+loadaddr 0x10000000
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020e0798 0x000C0000
+wm 32 0x020e0758 0x00000000
+
+wm 32 0x020e0588 0x00020030
+wm 32 0x020e0594 0x00020030
+
+wm 32 0x020e056c 0x00020030
+wm 32 0x020e0578 0x00020030
+wm 32 0x020e074c 0x00020030
+
+wm 32 0x020e057c 0x00020030
+wm 32 0x020e058c 0x00000000
+wm 32 0x020e059c 0x00020030
+wm 32 0x020e05a0 0x00020030
+wm 32 0x020e078c 0x00020030
+
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e05a8 0x00020030
+wm 32 0x020e05b0 0x00020030
+wm 32 0x020e0524 0x00020030
+wm 32 0x020e051c 0x00020030
+wm 32 0x020e0518 0x00020030
+wm 32 0x020e050c 0x00020030
+wm 32 0x020e05b8 0x00020030
+wm 32 0x020e05c0 0x00020030
+
+wm 32 0x020e0534 0x00018200
+wm 32 0x020e0538 0x00008000
+wm 32 0x020e053c 0x00018200
+wm 32 0x020e0540 0x00018200
+wm 32 0x020e0544 0x00018200
+wm 32 0x020e0548 0x00018200
+wm 32 0x020e054c 0x00018200
+wm 32 0x020e0550 0x00018200
+
+wm 32 0x020e0774 0x00020000
+wm 32 0x020e0784 0x00020030
+wm 32 0x020e0788 0x00020030
+wm 32 0x020e0794 0x00020030
+wm 32 0x020e079c 0x00020030
+wm 32 0x020e07a0 0x00020030
+wm 32 0x020e07a4 0x00020030
+wm 32 0x020e07a8 0x00020030
+wm 32 0x020e0748 0x00020030
+
+wm 32 0x020e05ac 0x00020030
+wm 32 0x020e05b4 0x00020030
+wm 32 0x020e0528 0x00020030
+wm 32 0x020e0520 0x00020030
+wm 32 0x020e0514 0x00020030
+wm 32 0x020e0510 0x00020030
+wm 32 0x020e05bc 0x00020030
+wm 32 0x020e05c4 0x00020030
+
+wm 32 0x021b001c 0x00008000
+
+wm 32 0x021b0800 0xA1390003
+
+wm 32 0x021b080c 0x002A001F
+wm 32 0x021b0810 0x002F002A
+wm 32 0x021b480c 0x001F0031
+wm 32 0x021b4810 0x001B0022
+
+wm 32 0x021b083c 0x433C0354
+wm 32 0x021b0840 0x03380330
+wm 32 0x021b483c 0x43440358
+wm 32 0x021b4840 0x03340300
+
+wm 32 0x021b0848 0x483A4040
+wm 32 0x021b4848 0x3E383648
+
+wm 32 0x021b0850 0x3C424048
+wm 32 0x021b4850 0x4C425042
+
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+
+wm 32 0x021b08c0 0x24912489
+wm 32 0x021b48c0 0x24914452
+
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+
+wm 32 0x021b0004 0x00020036
+wm 32 0x021b0008 0x09444040
+wm 32 0x021b000c 0x898E7955
+wm 32 0x021b0010 0xFF328F64
+wm 32 0x021b0014 0x01FF00DB
+
+wm 32 0x021b0018 0x00011740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026D2
+wm 32 0x021b0030 0x008E1023
+wm 32 0x021b0040 0x00000047
+
+wm 32 0x021b0400 0x14420000
+wm 32 0x021b0000 0x841A0000
+wm 32 0x021b0890 0x00400c58
+
+wm 32 0x00bb0008 0x00000000
+wm 32 0x00bb000c 0x2891E41A
+wm 32 0x00bb0038 0x00000564
+wm 32 0x00bb0014 0x00000040
+wm 32 0x00bb0028 0x00000020
+wm 32 0x00bb002c 0x00000020
+
+wm 32 0x021b001c 0x02088032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x19408030
+wm 32 0x021b001c 0x04008040
+
+wm 32 0x021b0020 0x00007800
+
+wm 32 0x021b0818 0x00022227
+wm 32 0x021b4818 0x00022227
+
+wm 32 0x021b0004 0x00025576
+
+wm 32 0x021b0404 0x00011006
+
+wm 32 0x021b001c 0x00000000
diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
index df35aaee15fd..0d3520de476d 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
@@ -39,6 +39,7 @@ static inline void setup_uart(void)
}
extern char __dtb_imx6q_zii_rdu2_start[];
+extern char __dtb_imx6qp_zii_rdu2_start[];
ENTRY_FUNCTION(start_imx6q_zii_rdu2, r0, r1, r2)
{
@@ -51,3 +52,15 @@ ENTRY_FUNCTION(start_imx6q_zii_rdu2, r0, r1, r2)
imx6q_barebox_entry(fdt - get_runtime_offset());
}
+
+ENTRY_FUNCTION(start_imx6qp_zii_rdu2, r0, r1, r2)
+{
+ void *fdt = __dtb_imx6qp_zii_rdu2_start;
+
+ imx6_cpu_lowlevel_init();
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ setup_uart();
+
+ imx6q_barebox_entry(fdt - get_runtime_offset());
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dbf089a5de40..72832d55a2d8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -79,6 +79,6 @@ pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
-pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o
+pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o imx6qp-zii-rdu2.dtb.o
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/arm/dts/imx6qp-zii-rdu2.dts b/arch/arm/dts/imx6qp-zii-rdu2.dts
new file mode 100644
index 000000000000..fcf2ee5a104b
--- /dev/null
+++ b/arch/arm/dts/imx6qp-zii-rdu2.dts
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2016 Zodiac Inflight Innovations
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <arm/imx6qp.dtsi>
+#include "imx6q.dtsi"
+#include "imx6qdl-zii-rdu2.dtsi"
+
+/ {
+ model = "ZII RDU2+ Board";
+ compatible = "zii,imx6qp-zii-rdu2", "fsl,imx6qp";
+};
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 4038ad4ef5a0..276711453aa3 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -413,3 +413,8 @@ pblx-$(CONFIG_MACH_ZII_RDU2) += start_imx6q_zii_rdu2
CFG_start_imx6q_zii_rdu2.pblx.imximg = $(board)/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg
FILE_barebox-zii-imx6q-rdu2.img = start_imx6q_zii_rdu2.pblx.imximg
image-$(CONFIG_MACH_ZII_RDU2) += barebox-zii-imx6q-rdu2.img
+
+pblx-$(CONFIG_MACH_ZII_RDU2) += start_imx6qp_zii_rdu2
+CFG_start_imx6qp_zii_rdu2.pblx.imximg = $(board)/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg
+FILE_barebox-zii-imx6qp-rdu2.img = start_imx6qp_zii_rdu2.pblx.imximg
+image-$(CONFIG_MACH_ZII_RDU2) += barebox-zii-imx6qp-rdu2.img
--
2.10.2
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* [PATCH 1/3] ARM: imx: Add support for ZII RDU2 board
From: Lucas Stach @ 2016-11-30 11:07 UTC (permalink / raw)
To: barebox
From: Andrey Smirnov <andrew.smirnov@gmail.com>
Add support for RDU2 board from Zodiac Inflight Innovations.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/zii-imx6q-rdu2/Makefile | 2 +
arch/arm/boards/zii-imx6q-rdu2/board.c | 153 ++++++
.../zii-imx6q-rdu2/defaultenv-rdu2/network/eth1 | 18 +
.../zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default | 1 +
| 87 ++++
arch/arm/boards/zii-imx6q-rdu2/lowlevel.c | 53 ++
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6q-zii-rdu2.dts | 52 ++
arch/arm/dts/imx6qdl-zii-rdu2.dtsi | 531 +++++++++++++++++++++
arch/arm/mach-imx/Kconfig | 4 +
images/Makefile.imx | 5 +
12 files changed, 908 insertions(+)
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/Makefile
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/board.c
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg
create mode 100644 arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
create mode 100644 arch/arm/dts/imx6q-zii-rdu2.dts
create mode 100644 arch/arm/dts/imx6qdl-zii-rdu2.dtsi
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index ff0a86fcb339..fe5c20932d6b 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -141,3 +141,4 @@ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/
obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/
obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/
obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/
+obj-$(CONFIG_MACH_ZII_RDU2) += zii-imx6q-rdu2/
diff --git a/arch/arm/boards/zii-imx6q-rdu2/Makefile b/arch/arm/boards/zii-imx6q-rdu2/Makefile
new file mode 100644
index 000000000000..01c7a259e9a5
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
new file mode 100644
index 000000000000..636c57630803
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (C) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx6-regs.h>
+#include <gpio.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <mach/generic.h>
+#include <linux/sizes.h>
+#include <net.h>
+#include <mach/imx6.h>
+#include <mach/devices-imx6.h>
+#include <mach/iomux-mx6.h>
+#include <spi/spi.h>
+#include <mach/spi.h>
+#include <mach/usb.h>
+
+#define RDU2_DAC1_RESET IMX_GPIO_NR(1, 0)
+#define RDU2_DAC2_RESET IMX_GPIO_NR(1, 2)
+#define RDU2_RST_TOUCH IMX_GPIO_NR(1, 7)
+#define RDU2_NFC_RESET IMX_GPIO_NR(1, 17)
+#define RDU2_HPA1_SDn IMX_GPIO_NR(1, 4)
+#define RDU2_HPA2_SDn IMX_GPIO_NR(1, 5)
+
+static const struct gpio rdu2_reset_gpios[] = {
+ {
+ .gpio = RDU2_DAC1_RESET,
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "dac1-reset",
+ },
+ {
+ .gpio = RDU2_DAC2_RESET,
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "dac2-reset",
+ },
+ {
+ .gpio = RDU2_RST_TOUCH,
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "rst-touch#",
+ },
+ {
+ .gpio = RDU2_NFC_RESET,
+ .flags = GPIOF_OUT_INIT_HIGH,
+ .label = "nfc-reset",
+ },
+ {
+ .gpio = RDU2_HPA1_SDn,
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "hpa1-sd-n",
+ },
+ {
+ .gpio = RDU2_HPA2_SDn,
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "hpa2n-sd-n",
+ },
+};
+
+static int rdu2_reset_audio_touchscreen_nfc(void)
+{
+ int ret;
+
+ if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+ !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+ return 0;
+
+ ret = gpio_request_array(rdu2_reset_gpios,
+ ARRAY_SIZE(rdu2_reset_gpios));
+ if (ret) {
+ pr_err("Failed to request RDU2 reset gpios: %s\n",
+ strerror(-ret));
+ return ret;
+ }
+
+ mdelay(100);
+
+ gpio_direction_output(RDU2_DAC1_RESET, 1);
+ gpio_direction_output(RDU2_DAC2_RESET, 1);
+ gpio_direction_output(RDU2_RST_TOUCH, 1);
+ gpio_direction_output(RDU2_NFC_RESET, 0);
+ gpio_direction_output(RDU2_HPA1_SDn, 1);
+ gpio_direction_output(RDU2_HPA2_SDn, 1);
+
+ mdelay(100);
+
+ return 0;
+}
+/*
+ * When this function is called "hog" pingroup in device tree needs to
+ * be already initialized
+ */
+late_initcall(rdu2_reset_audio_touchscreen_nfc);
+
+static const struct gpio rdu2_front_panel_usb_gpios[] = {
+ {
+ .gpio = IMX_GPIO_NR(3, 19),
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "usb-emulation",
+ },
+ {
+ .gpio = IMX_GPIO_NR(3, 20),
+ .flags = GPIOF_OUT_INIT_HIGH,
+ .label = "usb-mode1",
+ },
+ {
+ .gpio = IMX_GPIO_NR(3, 22),
+ .flags = GPIOF_OUT_INIT_LOW,
+ .label = "usb-pwr-ctrl-enn",
+ },
+ {
+ .gpio = IMX_GPIO_NR(3, 23),
+ .flags = GPIOF_OUT_INIT_HIGH,
+ .label = "usb-mode2",
+ },
+};
+
+static int rdu2_enable_front_panel_usb(void)
+{
+ int ret;
+
+ if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+ !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+ return 0;
+
+ ret = gpio_request_array(rdu2_front_panel_usb_gpios,
+ ARRAY_SIZE(rdu2_front_panel_usb_gpios));
+ if (ret) {
+ pr_err("Failed to request RDU2 front panel USB gpios: %s\n",
+ strerror(-ret));
+
+ }
+
+ return ret;
+}
+late_initcall(rdu2_enable_front_panel_usb);
diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1 b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1
new file mode 100644
index 000000000000..33fe7c1b2b48
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1
@@ -0,0 +1,18 @@
+#!/bin/sh
+
+# ip setting (static/dhcp)
+ip=dhcp
+global.dhcp.vendor_id=barebox-${global.hostname}
+
+# static setup used if ip=static
+ipaddr=
+netmask=
+gateway=
+serverip=
+
+# MAC address if needed
+#ethaddr=xx:xx:xx:xx:xx:xx
+
+# put code to discover eth0 (i.e. 'usb') to /env/network/eth0-discover
+
+exit 0
diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default
new file mode 100644
index 000000000000..3cfe9bafdca5
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default
@@ -0,0 +1 @@
+mmc1
\ No newline at end of file
--git a/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg
new file mode 100644
index 000000000000..e37db503b408
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg
@@ -0,0 +1,87 @@
+loadaddr 0x10000000
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020e0798 0x000C0000
+wm 32 0x020e0758 0x00000000
+wm 32 0x020e0588 0x00000030
+wm 32 0x020e0594 0x00000030
+wm 32 0x020e056c 0x00000030
+wm 32 0x020e0578 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e057c 0x00000030
+wm 32 0x020e058c 0x00000000
+wm 32 0x020e059c 0x00000030
+wm 32 0x020e05a0 0x00000030
+wm 32 0x020e078c 0x00000030
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e05a8 0x00000028
+wm 32 0x020e05b0 0x00000028
+wm 32 0x020e0524 0x00000028
+wm 32 0x020e051c 0x00000028
+wm 32 0x020e0518 0x00000028
+wm 32 0x020e050c 0x00000028
+wm 32 0x020e05b8 0x00000028
+wm 32 0x020e05c0 0x00000028
+wm 32 0x020e0774 0x00020000
+wm 32 0x020e0784 0x00000028
+wm 32 0x020e0788 0x00000028
+wm 32 0x020e0794 0x00000028
+wm 32 0x020e079c 0x00000028
+wm 32 0x020e07a0 0x00000028
+wm 32 0x020e07a4 0x00000028
+wm 32 0x020e07a8 0x00000028
+wm 32 0x020e0748 0x00000028
+wm 32 0x020e05ac 0x00000028
+wm 32 0x020e05b4 0x00000028
+wm 32 0x020e0528 0x00000028
+wm 32 0x020e0520 0x00000028
+wm 32 0x020e0514 0x00000028
+wm 32 0x020e0510 0x00000028
+wm 32 0x020e05bc 0x00000028
+wm 32 0x020e05c4 0x00000028
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b080c 0x001F001F
+wm 32 0x021b0810 0x001F001F
+wm 32 0x021b480c 0x001F001F
+wm 32 0x021b4810 0x001F001F
+wm 32 0x021b083c 0x43260335
+wm 32 0x021b0840 0x031A030B
+wm 32 0x021b483c 0x4323033B
+wm 32 0x021b4840 0x0323026F
+wm 32 0x021b0848 0x483D4545
+wm 32 0x021b4848 0x44433E48
+wm 32 0x021b0850 0x41444840
+wm 32 0x021b4850 0x4835483E
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+wm 32 0x021b0004 0x00020036
+wm 32 0x021b0008 0x09444040
+wm 32 0x021b000c 0x8A8F7955
+wm 32 0x021b0010 0xFF328F64
+wm 32 0x021b0014 0x01FF00DB
+wm 32 0x021b0018 0x00001740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x008F1023
+wm 32 0x021b0040 0x00000047
+wm 32 0x021b0000 0x841A0000
+wm 32 0x021b001c 0x04088032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x09408030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b4818 0x00011117
+wm 32 0x021b0004 0x00025576
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
new file mode 100644
index 000000000000..df35aaee15fd
--- /dev/null
+++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2016 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <debug_ll.h>
+#include <common.h>
+#include <mach/esdctl.h>
+#include <mach/generic.h>
+#include <mach/imx6.h>
+#include <asm/barebox-arm.h>
+
+static inline void setup_uart(void)
+{
+ void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+
+ imx6_ungate_all_peripherals();
+
+ writel(0x1b0b1, iomuxbase + 0x0650);
+ writel(3, iomuxbase + 0x0280);
+
+ writel(0x1b0b1, iomuxbase + 0x0654);
+ writel(3, iomuxbase + 0x0284);
+ writel(1, iomuxbase + 0x0920);
+
+ imx6_uart_setup_ll();
+
+ putc_ll('>');
+}
+
+extern char __dtb_imx6q_zii_rdu2_start[];
+
+ENTRY_FUNCTION(start_imx6q_zii_rdu2, r0, r1, r2)
+{
+ void *fdt = __dtb_imx6q_zii_rdu2_start;
+
+ imx6_cpu_lowlevel_init();
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ setup_uart();
+
+ imx6q_barebox_entry(fdt - get_runtime_offset());
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 607c62080665..dbf089a5de40 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -79,5 +79,6 @@ pbl-dtb-$(CONFIG_MACH_USI_TOPKICK) += kirkwood-topkick-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_VARISCITE_MX6) += imx6q-var-custom.dtb.o
pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
+pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o
clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo
diff --git a/arch/arm/dts/imx6q-zii-rdu2.dts b/arch/arm/dts/imx6q-zii-rdu2.dts
new file mode 100644
index 000000000000..db75e29f87ad
--- /dev/null
+++ b/arch/arm/dts/imx6q-zii-rdu2.dts
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2016 Zodiac Inflight Innovations
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <arm/imx6q.dtsi>
+#include "imx6q.dtsi"
+#include "imx6qdl-zii-rdu2.dtsi"
+
+/ {
+ model = "ZII RDU2 Board";
+ compatible = "zii,imx6q-zii-rdu2", "fsl,imx6q";
+};
diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
new file mode 100644
index 000000000000..55af3f964e49
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
@@ -0,0 +1,531 @@
+/*
+ * Copyright 2016 Zodiac Inflight Innovations
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ chosen {
+ linux,stdout-path = &uart1;
+ };
+
+ mdio {
+ compatible = "virtual,mdio-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1>;
+ gpios = <&gpio6 5 GPIO_ACTIVE_HIGH
+ &gpio6 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_28p0v: 28p0v {
+ /* main power in */
+ compatible = "regulator-fixed";
+ regulator-name = "28P0V";
+ regulator-min-microvolt = <28000000>;
+ regulator-max-microvolt = <28000000>;
+ regulator-always-on;
+ };
+
+ reg_12p0v: 12p0v {
+ /* main internal power */
+ compatible = "regulator-fixed";
+ vin-supply = <®_28p0v>;
+ regulator-name = "12P0V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ };
+
+ reg_12p0v_periph: 12p0vperiph {
+ compatible = "regulator-fixed";
+ vin-supply = <®_28p0v>;
+ regulator-name = "12P0V-PERIPH";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ /* controlled via "environment processor" */
+ regulator-always-on;
+ };
+
+ reg_5p0v_main: 5p0vmain {
+ compatible = "regulator-fixed";
+ vin-supply = <®_12p0v>;
+ regulator-name = "5P0MAIN";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ /* controlled via "environment processor" */
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg_supply>;
+ vin-supply = <®_5p0v_main>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
+ startup-delay-us = <1000>;
+ };
+
+ reg_usb_h1_vbus: regulator@1 {
+ compatible = "regulator-fixed";
+ vin-supply = <®_5p0v_main>;
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+
+ imx6qdl-sabresd {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* USB Charging Controller */
+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 /*USB_ATT_DETn*/
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 /*USB_EMULATION*/
+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 /*USB_MODE1*/
+ MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x1b0b0 /*USB_ALERTn*/
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /*USB_PWR_CTRL_ENn*/
+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 /*USB_MODE2*/
+
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13020 /*USB_OTG_ID*/
+
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /*INT_TOUCH_N*/
+
+ /* DAC */
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /*DAC1_RESET*/
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 /*DAC2_RESET*/
+
+ /* Need to Place */
+ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 /*RMII_INTRPT*/
+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b8b0 /*SD_CARD_RESET - Open Drain Output*/
+
+ /* Test Points */
+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 /*TP20*/
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /*TP21*/
+ MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 /*TP22*/
+ MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x1b0b0 /*TP23*/
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 /*TP19*/
+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 /*TP26*/
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 /*TP27*/
+ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0 /*TP28*/
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /*TP29*/
+ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 /*TP30*/
+ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 /*TP25*/
+ MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0 /*TP39*/
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 /*TP40*/
+ MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b0 /*TP42*/
+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0 /*TP43*/
+ MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x1b0b0 /*TP44*/
+ MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x1b0b0 /*TP45*/
+ MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x1b0b0 /*TP46*/
+ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /*TP41*/
+
+ /* System Type */
+ MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /*SYS_TYPE_3*/
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0 /*SYS_TYPE_2*/
+ MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b0 /*SYS_TYPE_1*/
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 /*SYS_TYPE_0*/
+
+ /* Boot Mode Selection Pins */
+ MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b0 /*BT_CFG1_0*/
+ MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b0 /*BT_CFG1_1*/
+ MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b0 /*BT_CFG1_2*/
+ MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b0 /*BT_CFG1_3*/
+ MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b0 /*BT_CFG1_4*/
+ MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b0 /*BT_CFG1_5*/
+ MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b0 /*BT_CFG1_6*/
+ MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b0 /*BT_CFG1_7*/
+
+ MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b0 /*BT_CFG2_0*/
+ MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b0 /*BT_CFG2_1*/
+ MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b0 /*BT_CFG2_2*/
+ MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b0 /*BT_CFG2_3*/
+ MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b0 /*BT_CFG2_4*/
+ MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 /*BT_CFG2_5*/
+ MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b0 /*BT_CFG2_6*/
+ MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0 /*BT_CFG2_7*/
+
+ MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /*BT_CFG3_0*/
+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 /*BT_CFG3_1*/
+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 /*BT_CFG3_2*/
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 /*BT_CFG3_3*/
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0 /*BT_CFG3_4*/
+ MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b0b0 /*BT_CFG3_5*/
+ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b0 /*BT_CFG3_6*/
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 /*BT_CFG3_7*/
+
+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0 /*BT_CFG4_0*/
+ MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0 /*BT_CFG4_1*/
+ MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 /*BT_CFG4_2*/
+ MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0 /*BT_CFG4_3*/
+ MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0 /*BT_CFG4_4*/
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0 /*BT_CFG4_5*/
+ MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0 /*BT_CFG4_7*/
+
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* HPA1_SDn */
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 /* HPA2_SDn */
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* RST_TOUCH# */
+ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 /* NFC_RESET */
+ >;
+ };
+
+ pinctrl_usb_otg_supply: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x40000038
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ /*MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x1b0b0*/
+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+ /*MX6QDL_PAD_EIM_EB2__ECSPI1_SS0 0x100b1*/
+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b1
+ /*MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x1b0b1
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10*/
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
+ MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
+ MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
+
+ MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
+ >;
+ };
+
+ pinctrl_ssi2: ssi3grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
+ MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
+ MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_gpio: i2c3grp_gpio {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b1
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b1
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17069
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x17069
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17069
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17069
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17069
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17069
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17069
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x17069
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17069
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+ MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x1b0b1
+ >;
+ };
+
+ pinctrl_mdio1: bitbangmdiogrp {
+ fsl,pins = <
+ /* Bitbang MDIO for DEB Switch */
+ MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x1b030 /*SWITCH_MDC*/
+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x18830 /*SWITCH_MDIO*/
+ >;
+ };
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&ecspi1 {
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio2 30 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ nor_flash: m25p128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p128";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+
+ partition@0 {
+ label = "barebox";
+ reg = <0x0 0x100000>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&tempmon {
+ barebox,sensor-name = "TEMPMON";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ lm75@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ barebox,sensor-name = "Temp Sensor 1";
+ };
+
+ rtc: ds1341@68 {
+ compatible = "dallas,ds1341";
+ reg = <0x68>;
+ };
+
+ mx6_eeprom: at24@54 {
+ compatible = "at,24c128";
+ pagesize = <32>; /* TODO: VERIFY PAGE SIZE */
+ reg = <0x54>;
+ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_gpio>;
+ scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&ldb {
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "spwg";
+ fsl,data-width = <24>;
+ status = "okay";
+
+ display-timings {
+ native-mode = <&timing_innolux_10_1>;
+ timing_innolux_10_1: innolux_10_1 {
+ clock-frequency = <71100000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <40>;
+ hfront-porch = <40>;
+ vback-porch = <10>;
+ vfront-porch = <3>;
+ hsync-len = <80>;
+ vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <1>;
+ };
+ };
+ };
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio7 12 0>;
+ status = "okay";
+};
+
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ bus-width = <4>;
+ cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ bus-width = <4>;
+ cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ bus-width = <8>;
+ non-removable;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ disable-over-current;
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rmii";
+ phy-reset-gpios = <&gpio1 23 0>;
+ status = "okay";
+
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 28ac9f420b65..2bc94a3dbb14 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -345,6 +345,10 @@ config MACH_VF610_TWR
bool "Freescale VF610 Tower Board"
select ARCH_VF610
+config MACH_ZII_RDU2
+ bool "ZII i.MX6Q(+) RDU2"
+ select ARCH_IMX6
+
endif
# ----------------------------------------------------------
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 983d89635ba9..4038ad4ef5a0 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -408,3 +408,8 @@ pblx-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr
CFG_start_vf610_twr.pblx.imximg = $(board)/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
FILE_barebox-vf610-twr.img = start_vf610_twr.pblx.imximg
image-$(CONFIG_MACH_VF610_TWR) += barebox-vf610-twr.img
+
+pblx-$(CONFIG_MACH_ZII_RDU2) += start_imx6q_zii_rdu2
+CFG_start_imx6q_zii_rdu2.pblx.imximg = $(board)/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg
+FILE_barebox-zii-imx6q-rdu2.img = start_imx6q_zii_rdu2.pblx.imximg
+image-$(CONFIG_MACH_ZII_RDU2) += barebox-zii-imx6q-rdu2.img
--
2.10.2
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^ permalink raw reply related
* [PATCH 2/3] arm: imx6: ocotp: Added write check
From: Daniel Schultz @ 2016-11-30 11:10 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480504245-1822-1-git-send-email-d.schultz@phytec.de>
Since it's forbidden to use a multicast address as ethernet address,
the driver should check the addresses before they got written.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/mach-imx/ocotp.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c
index 9efa46a..f8978c0 100644
--- a/arch/arm/mach-imx/ocotp.c
+++ b/arch/arm/mach-imx/ocotp.c
@@ -452,6 +452,12 @@ static int imx_ocotp_set_mac(unsigned int mac_no, struct param_d *param,
for (i = 0; i < 6; i++)
buf[5 - i + offset] = ocotp_priv->ethaddr[mac_no][i];
+ if (0x01 & buf[5 + offset]) {
+ dev_err(&ocotp_priv->dev,
+ "this MAC address is a broadcast/multicast\n");
+ return -EINVAL;
+ }
+
ret = regmap_bulk_write(ocotp_priv->map,
(mac_no == 0) ? MAC0_OFFSET : MAC1_OFFSET, buf,
MAC_BYTES);
--
1.9.1
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^ permalink raw reply related
* [PATCH 3/3] arm: dts: Added ocotp support for i.MX6UL
From: Daniel Schultz @ 2016-11-30 11:10 UTC (permalink / raw)
To: barebox
In-Reply-To: <1480504245-1822-1-git-send-email-d.schultz@phytec.de>
Ocotp is available for the iMX6(q|sx|sl) SoCs. This patch will extend the
iMX6ul DT from the mainline kernel to support the ocotp driver on the
iMX6ul SoC.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/dts/imx6ul-phytec-phycore-som.dts | 1 +
arch/arm/dts/imx6ul.dtsi | 20 ++++++++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 arch/arm/dts/imx6ul.dtsi
diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dts b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
index be4556a..285ea62 100644
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
@@ -13,6 +13,7 @@
/dts-v1/;
#include <arm/imx6ul.dtsi>
+#include "imx6ul.dtsi"
/ {
model = "Phytec phyCORE-i.MX6 Ultra Lite SOM";
diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi
new file mode 100644
index 0000000..2e02d27
--- /dev/null
+++ b/arch/arm/dts/imx6ul.dtsi
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2016 PHYTEC Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+&aips2 {
+ ocotp: ocotp-ctrl@21bc000 {
+ compatible = "fsl,imx6ul-ocotp";
+ reg = <0x021bc000 0x4000>;
+ clocks = <&clks IMX6UL_CLK_OCOTP>;
+ barebox,provide-mac-address = <&fec1 0x620 &fec2 0x632>;
+ };
+};
--
1.9.1
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^ permalink raw reply related
* [PATCH 1/3] arm: imx6: ocotp: Added support for the i.MX6UL
From: Daniel Schultz @ 2016-11-30 11:10 UTC (permalink / raw)
To: barebox
This patch adds support for the i.MX6UL SoC.
Also, the driver was extended to handle two MAC addresses.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/mach-imx/ocotp.c | 82 +++++++++++++++++++++++++++++++++-------
dts/Bindings/nvmem/imx-ocotp.txt | 7 ++--
2 files changed, 73 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c
index e1d0c25..9efa46a 100644
--- a/arch/arm/mach-imx/ocotp.c
+++ b/arch/arm/mach-imx/ocotp.c
@@ -70,11 +70,13 @@
#define FUSE_REGS_COUNT (16 * 8)
#define IMX6_OTP_DATA_ERROR_VAL 0xBADABADA
#define DEF_RELAX 20
-#define MAC_OFFSET (0x22 * 4)
+#define MAC0_OFFSET (0x22 * 4)
+#define MAC1_OFFSET (0x23 * 4)
#define MAC_BYTES 8
struct imx_ocotp_data {
int num_regs;
+ bool scnd_mac_addr;
};
struct ocotp_priv {
@@ -84,7 +86,7 @@ struct ocotp_priv {
struct device_d dev;
int permanent_write_enable;
int sense_enable;
- char ethaddr[6];
+ char ethaddr[2][6];
struct regmap_config map_config;
};
@@ -394,38 +396,79 @@ static void imx_ocotp_init_dt(struct device_d *dev, void __iomem *base)
}
}
-static int imx_ocotp_get_mac(struct param_d *param, void *priv)
+static int imx_ocotp_get_mac(unsigned int mac_no, struct param_d *param,
+ void *priv)
{
struct ocotp_priv *ocotp_priv = priv;
char buf[8];
int i, ret;
+ int offset;
- ret = regmap_bulk_read(ocotp_priv->map, MAC_OFFSET, buf, MAC_BYTES);
+ if (mac_no > 1)
+ return -EINVAL;
+
+ ret = regmap_bulk_read(ocotp_priv->map,
+ (mac_no == 0) ? MAC0_OFFSET : MAC1_OFFSET, buf,
+ MAC_BYTES);
if (ret < 0)
return ret;
+ offset = mac_no << 1;
for (i = 0; i < 6; i++)
- ocotp_priv->ethaddr[i] = buf[5 - i];
+ ocotp_priv->ethaddr[mac_no][i] = buf[5 - i + offset];
return 0;
}
-static int imx_ocotp_set_mac(struct param_d *param, void *priv)
+static inline int imx_ocotp_get_mac0(struct param_d *param, void *priv)
+{
+ return imx_ocotp_get_mac(0, param, priv);
+}
+static inline int imx_ocotp_get_mac1(struct param_d *param, void *priv)
+{
+ return imx_ocotp_get_mac(1, param, priv);
+}
+
+static int imx_ocotp_set_mac(unsigned int mac_no, struct param_d *param,
+ void *priv)
{
struct ocotp_priv *ocotp_priv = priv;
char buf[8];
int i, ret;
+ int offset;
+
+ if (mac_no > 1)
+ return -EINVAL;
+
+ offset = mac_no << 1;
+ if (mac_no == 0) {
+ buf[6] = ocotp_priv->ethaddr[1][5];
+ buf[7] = ocotp_priv->ethaddr[1][4];
+ } else {
+ buf[0] = ocotp_priv->ethaddr[0][1];
+ buf[1] = ocotp_priv->ethaddr[0][0];
+ }
for (i = 0; i < 6; i++)
- buf[5 - i] = ocotp_priv->ethaddr[i];
- buf[6] = 0; buf[7] = 0;
+ buf[5 - i + offset] = ocotp_priv->ethaddr[mac_no][i];
- ret = regmap_bulk_write(ocotp_priv->map, MAC_OFFSET, buf, MAC_BYTES);
+ ret = regmap_bulk_write(ocotp_priv->map,
+ (mac_no == 0) ? MAC0_OFFSET : MAC1_OFFSET, buf,
+ MAC_BYTES);
if (ret < 0)
return ret;
return 0;
}
+static inline int imx_ocotp_set_mac0(struct param_d *param, void *priv)
+{
+ return imx_ocotp_set_mac(0, param, priv);
+}
+
+static inline int imx_ocotp_set_mac1(struct param_d *param, void *priv)
+{
+ return imx_ocotp_set_mac(1, param, priv);
+}
static struct regmap_bus imx_ocotp_regmap_bus = {
.reg_write = imx_ocotp_reg_write,
@@ -482,9 +525,15 @@ static int imx_ocotp_probe(struct device_d *dev)
NULL, NULL, &priv->permanent_write_enable, NULL);
}
- if (IS_ENABLED(CONFIG_NET))
- dev_add_param_mac(&(priv->dev), "mac_addr", imx_ocotp_set_mac,
- imx_ocotp_get_mac, priv->ethaddr, priv);
+ if (IS_ENABLED(CONFIG_NET)) {
+ dev_add_param_mac(&(priv->dev), "mac_addr", imx_ocotp_set_mac0,
+ imx_ocotp_get_mac0, priv->ethaddr[0], priv);
+
+ if (data->scnd_mac_addr)
+ dev_add_param_mac(&(priv->dev), "mac_addr1",
+ imx_ocotp_set_mac1, imx_ocotp_get_mac1,
+ priv->ethaddr[1], priv);
+ }
dev_add_param_bool(&(priv->dev), "sense_enable", NULL, NULL, &priv->sense_enable, priv);
@@ -493,10 +542,17 @@ static int imx_ocotp_probe(struct device_d *dev)
static struct imx_ocotp_data imx6q_ocotp_data = {
.num_regs = 512,
+ .scnd_mac_addr = false,
+};
+
+static struct imx_ocotp_data imx6ul_ocotp_data = {
+ .num_regs = 512,
+ .scnd_mac_addr = true,
};
static struct imx_ocotp_data imx6sl_ocotp_data = {
.num_regs = 256,
+ .scnd_mac_addr = false,
};
static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
@@ -511,7 +567,7 @@ static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
.data = &imx6sl_ocotp_data,
}, {
.compatible = "fsl,imx6ul-ocotp",
- .data = &imx6q_ocotp_data,
+ .data = &imx6ul_ocotp_data,
}, {
/* sentinel */
}
diff --git a/dts/Bindings/nvmem/imx-ocotp.txt b/dts/Bindings/nvmem/imx-ocotp.txt
index 383d588..5314b88 100644
--- a/dts/Bindings/nvmem/imx-ocotp.txt
+++ b/dts/Bindings/nvmem/imx-ocotp.txt
@@ -1,13 +1,14 @@
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs.
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
Required properties:
- compatible: should be one of
"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
- "fsl,imx6sl-ocotp" (i.MX6SL), or
- "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
+ "fsl,imx6sl-ocotp" (i.MX6SL),
+ "fls,imx6ul-ocotp" (i.MX6UL) or
+ "fls,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
- reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock.
--
1.9.1
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^ permalink raw reply related
* help-UBOOT2 JMP
From: irlinuxbox @ 2016-11-30 14:46 UTC (permalink / raw)
To: barebox
barebox is displays “UBOOT2 JMP ” during bootup on x86
export ARCH=x86
make generic_defconfig
make
./scripts/setupmbr/setupmbr –s 32 –m ./barebox.bin –d /dev/sdb
Sincerely,
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^ permalink raw reply
* Re: [PATCH 3/3] arm: dts: Added ocotp support for i.MX6UL
From: Andrey Smirnov @ 2016-11-30 16:38 UTC (permalink / raw)
To: Daniel Schultz; +Cc: barebox@lists.infradead.org
In-Reply-To: <1480504245-1822-3-git-send-email-d.schultz@phytec.de>
On Wed, Nov 30, 2016 at 3:10 AM, Daniel Schultz <d.schultz@phytec.de> wrote:
> Ocotp is available for the iMX6(q|sx|sl) SoCs. This patch will extend the
> iMX6ul DT from the mainline kernel to support the ocotp driver on the
> iMX6ul SoC.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
> arch/arm/dts/imx6ul-phytec-phycore-som.dts | 1 +
> arch/arm/dts/imx6ul.dtsi | 20 ++++++++++++++++++++
> 2 files changed, 21 insertions(+)
> create mode 100644 arch/arm/dts/imx6ul.dtsi
>
> diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dts b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> index be4556a..285ea62 100644
> --- a/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> +++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
> @@ -13,6 +13,7 @@
> /dts-v1/;
>
> #include <arm/imx6ul.dtsi>
> +#include "imx6ul.dtsi"
>
> / {
> model = "Phytec phyCORE-i.MX6 Ultra Lite SOM";
> diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi
> new file mode 100644
> index 0000000..2e02d27
> --- /dev/null
> +++ b/arch/arm/dts/imx6ul.dtsi
> @@ -0,0 +1,20 @@
> +/*
> + * Copyright (C) 2016 PHYTEC Messtechnik GmbH
> + * Author: Daniel Schultz <d.schultz@phytec.de>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +&aips2 {
> + ocotp: ocotp-ctrl@21bc000 {
> + compatible = "fsl,imx6ul-ocotp";
> + reg = <0x021bc000 0x4000>;
> + clocks = <&clks IMX6UL_CLK_OCOTP>;
Just as my two cents, I'd say that all of the above (that is
instantiation of OCOT on AIPS2) should go via Linux kernel and trickle
down via syncing with its .dts tree (<arm/imx6ul.dtsi> in particular).
At least that's what I had to do for OCOTP in Vybrid. Although your
case might be more complicated since there are no bindings for
"fsl,imx6ul-ocotp" upstream, so take this with a grain of salt
Cheers,
Andrey
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^ permalink raw reply
* Re: help-UBOOT2 JMP
From: Ulrich Ölmann @ 2016-12-01 7:52 UTC (permalink / raw)
To: barebox
In-Reply-To: <f05936c6-970d-70fa-c481-db0f70b4e8b6@gmail.com>
Hi,
On Wed, Nov 30, 2016 at 06:16:22PM +0330, irlinuxbox wrote:
> barebox is displays “UBOOT2 JMP ” during bootup on x86
>
> export ARCH=x86
> make generic_defconfig
> make
>
> ./scripts/setupmbr/setupmbr –s 32 –m ./barebox.bin –d /dev/sdb
doing a quick grep for "UBOOT2" points to arch/x86/boot/boot_hdisk.S and roughly
skimming the code shows that this is normal behaviour notifying the user of
different steps in the boot process.
Regards
Ulrich
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^ permalink raw reply
* [PATCH] x86: update boot message "UBOOT2" to "BAREBOX"
From: Ulrich Ölmann @ 2016-12-01 9:19 UTC (permalink / raw)
To: Barebox List
Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
---
arch/x86/boot/boot_hdisk.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/boot/boot_hdisk.S b/arch/x86/boot/boot_hdisk.S
index 143336d3b43e..6f98197512a0 100644
--- a/arch/x86/boot/boot_hdisk.S
+++ b/arch/x86/boot/boot_hdisk.S
@@ -164,7 +164,7 @@ output_message:
.section .boot_data
-notification_string: .asciz "UBOOT2 "
+notification_string: .asciz "BAREBOX "
chs_string: .asciz "CHS "
jmp_string: .asciz "JMP "
--
2.1.4
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* [PATCH] bootm: dont use internal oftree fallback by default
From: Alexander Kurz @ 2016-12-01 18:55 UTC (permalink / raw)
To: barebox; +Cc: Alexander Kurz
Booting via bootm offers several methods to load oftree data. When no
dedicated oftree image is provided, barebox checks for the presence of
its own internal oftree, assuming it as a good choice for boot.
This fallback method breaks the usecase when a modern OF-based barebox
is used to boot a legacy ATAG dependent non OF based vendor provided kernel
(e.g. ATAGs will be switched off).
Unfortunately those kernels are being still actively shipped today.
Change barebox according to the principle of least surprise: when no
oftree data is proactively configured, then perform a non-oftree boot.
Make the fallback-use of the barebox internal oftree an opt-in feature.
Note: this will break boards where the boot process relied on this feature,
e.g.: oftree based barebox plus oftree based kernel without an explicit
given dts. For those boards global.bootm.internal_oftree_fallback=1 should
be set.
Signed-off-by: Alexander Kurz <akurz@blala.de>
---
common/bootm.c | 8 ++++++--
include/bootm.h | 2 ++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/common/bootm.c b/common/bootm.c
index 5984319..f5303fa 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -58,6 +58,7 @@ void bootm_data_init_defaults(struct bootm_data *data)
data->initrd_address = UIMAGE_INVALID_ADDRESS;
data->os_address = UIMAGE_SOME_ADDRESS;
data->oftree_file = getenv_nonempty("global.bootm.oftree");
+ data->internal_oftree_fallback = getenv_nonempty("global.bootm.internal_oftree_fallback");
data->os_file = getenv_nonempty("global.bootm.image");
getenv_ul("global.bootm.image.loadaddr", &data->os_address);
getenv_ul("global.bootm.initrd.loadaddr", &data->initrd_address);
@@ -375,14 +376,15 @@ int bootm_load_devicetree(struct image_data *data, unsigned long load_address)
pr_err("unable to unflatten devicetree\n");
return -EINVAL;
}
-
- } else {
+ } else if (data->internal_oftree_fallback) {
data->of_root_node = of_get_root_node();
if (!data->of_root_node)
return 0;
if (bootm_verbose(data) > 1 && data->of_root_node)
printf("using internal devicetree\n");
+ } else {
+ return 0;
}
if (data->initrd_res) {
@@ -530,6 +532,7 @@ int bootm_boot(struct bootm_data *bootm_data)
data->verify = bootm_data->verify;
data->force = bootm_data->force;
data->dryrun = bootm_data->dryrun;
+ data->internal_oftree_fallback = bootm_data->internal_oftree_fallback;
data->initrd_address = bootm_data->initrd_address;
data->os_address = bootm_data->os_address;
data->os_entry = bootm_data->os_entry;
@@ -683,6 +686,7 @@ BAREBOX_MAGICVAR_NAMED(global_bootm_image_loadaddr, global.bootm.image.loadaddr,
BAREBOX_MAGICVAR_NAMED(global_bootm_initrd, global.bootm.initrd, "bootm default initrd");
BAREBOX_MAGICVAR_NAMED(global_bootm_initrd_loadaddr, global.bootm.initrd.loadaddr, "bootm default initrd loadaddr");
BAREBOX_MAGICVAR_NAMED(global_bootm_oftree, global.bootm.oftree, "bootm default oftree");
+BAREBOX_MAGICVAR_NAMED(global_bootm_internal_oftree_fallback, global.bootm.internal_oftree_fallback, "use barebox oftree as fallback");
BAREBOX_MAGICVAR_NAMED(global_bootm_verify, global.bootm.verify, "bootm default verify level");
BAREBOX_MAGICVAR_NAMED(global_bootm_verbose, global.bootm.verify, "bootm default verbosity level (0=quiet)");
BAREBOX_MAGICVAR_NAMED(global_bootm_appendroot, global.bootm.appendroot, "Add root= option to Kernel to mount rootfs from the device the Kernel comes from");
diff --git a/include/bootm.h b/include/bootm.h
index 6e9777a..c945c99 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -20,6 +20,7 @@ struct bootm_data {
enum bootm_verify verify;
bool force;
bool dryrun;
+ bool internal_oftree_fallback;
/*
* appendroot - if true, try to add a suitable root= Kernel option to
* mount the rootfs from the same device as the Kernel comes from.
@@ -81,6 +82,7 @@ struct image_data {
int verbose;
int force;
int dryrun;
+ int internal_oftree_fallback;
};
struct image_handler {
--
2.1.4
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^ permalink raw reply related
* Re: help-UBOOT2 JMP
From: irlinuxbox @ 2016-12-01 21:04 UTC (permalink / raw)
To: barebox
In-Reply-To: <mailman.25.1480622402.5809.barebox@lists.infradead.org>
On 12/01/2016 11:30 PM, barebox-request@lists.infradead.org wrote:
> Re: help-UBOOT2 JMP
> doing a quick grep for "UBOOT2" points to arch/x86/boot/boot_hdisk.S and roughly
> skimming the code shows that this is normal behaviour notifying the user of
> different steps in the boot process.
>
> Regards
> Ulrich
but my problem is another thing :( / system stop ( maybe hang ! ) and
just display 'UBOOT2 JMP'
what is my problem here ?
Regards
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^ permalink raw reply
* Re: [PATCH] bootm: dont use internal oftree fallback by default
From: Lucas Stach @ 2016-12-02 9:46 UTC (permalink / raw)
To: Alexander Kurz; +Cc: barebox
In-Reply-To: <1480618503-11376-1-git-send-email-akurz@blala.de>
Am Donnerstag, den 01.12.2016, 19:55 +0100 schrieb Alexander Kurz:
> Booting via bootm offers several methods to load oftree data. When no
> dedicated oftree image is provided, barebox checks for the presence of
> its own internal oftree, assuming it as a good choice for boot.
>
> This fallback method breaks the usecase when a modern OF-based barebox
> is used to boot a legacy ATAG dependent non OF based vendor provided kernel
> (e.g. ATAGs will be switched off).
> Unfortunately those kernels are being still actively shipped today.
>
> Change barebox according to the principle of least surprise: when no
> oftree data is proactively configured, then perform a non-oftree boot.
> Make the fallback-use of the barebox internal oftree an opt-in feature.
>
> Note: this will break boards where the boot process relied on this feature,
> e.g.: oftree based barebox plus oftree based kernel without an explicit
> given dts. For those boards global.bootm.internal_oftree_fallback=1 should
> be set.
>
The least surprise on a modern oftree based kernel is that the firmware
(Barebox) provides the DT, if there isn't an explicit override.
So NACK on the patch in it's current form. If you have a board where you
know that the kernel doesn't play along, you may reverse this patch so
that you can set global.bootm.no_internal_oftree=1 in your board code.
Regards,
Lucas
> Signed-off-by: Alexander Kurz <akurz@blala.de>
> ---
> common/bootm.c | 8 ++++++--
> include/bootm.h | 2 ++
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/common/bootm.c b/common/bootm.c
> index 5984319..f5303fa 100644
> --- a/common/bootm.c
> +++ b/common/bootm.c
> @@ -58,6 +58,7 @@ void bootm_data_init_defaults(struct bootm_data *data)
> data->initrd_address = UIMAGE_INVALID_ADDRESS;
> data->os_address = UIMAGE_SOME_ADDRESS;
> data->oftree_file = getenv_nonempty("global.bootm.oftree");
> + data->internal_oftree_fallback = getenv_nonempty("global.bootm.internal_oftree_fallback");
> data->os_file = getenv_nonempty("global.bootm.image");
> getenv_ul("global.bootm.image.loadaddr", &data->os_address);
> getenv_ul("global.bootm.initrd.loadaddr", &data->initrd_address);
> @@ -375,14 +376,15 @@ int bootm_load_devicetree(struct image_data *data, unsigned long load_address)
> pr_err("unable to unflatten devicetree\n");
> return -EINVAL;
> }
> -
> - } else {
> + } else if (data->internal_oftree_fallback) {
> data->of_root_node = of_get_root_node();
> if (!data->of_root_node)
> return 0;
>
> if (bootm_verbose(data) > 1 && data->of_root_node)
> printf("using internal devicetree\n");
> + } else {
> + return 0;
> }
>
> if (data->initrd_res) {
> @@ -530,6 +532,7 @@ int bootm_boot(struct bootm_data *bootm_data)
> data->verify = bootm_data->verify;
> data->force = bootm_data->force;
> data->dryrun = bootm_data->dryrun;
> + data->internal_oftree_fallback = bootm_data->internal_oftree_fallback;
> data->initrd_address = bootm_data->initrd_address;
> data->os_address = bootm_data->os_address;
> data->os_entry = bootm_data->os_entry;
> @@ -683,6 +686,7 @@ BAREBOX_MAGICVAR_NAMED(global_bootm_image_loadaddr, global.bootm.image.loadaddr,
> BAREBOX_MAGICVAR_NAMED(global_bootm_initrd, global.bootm.initrd, "bootm default initrd");
> BAREBOX_MAGICVAR_NAMED(global_bootm_initrd_loadaddr, global.bootm.initrd.loadaddr, "bootm default initrd loadaddr");
> BAREBOX_MAGICVAR_NAMED(global_bootm_oftree, global.bootm.oftree, "bootm default oftree");
> +BAREBOX_MAGICVAR_NAMED(global_bootm_internal_oftree_fallback, global.bootm.internal_oftree_fallback, "use barebox oftree as fallback");
> BAREBOX_MAGICVAR_NAMED(global_bootm_verify, global.bootm.verify, "bootm default verify level");
> BAREBOX_MAGICVAR_NAMED(global_bootm_verbose, global.bootm.verify, "bootm default verbosity level (0=quiet)");
> BAREBOX_MAGICVAR_NAMED(global_bootm_appendroot, global.bootm.appendroot, "Add root= option to Kernel to mount rootfs from the device the Kernel comes from");
> diff --git a/include/bootm.h b/include/bootm.h
> index 6e9777a..c945c99 100644
> --- a/include/bootm.h
> +++ b/include/bootm.h
> @@ -20,6 +20,7 @@ struct bootm_data {
> enum bootm_verify verify;
> bool force;
> bool dryrun;
> + bool internal_oftree_fallback;
> /*
> * appendroot - if true, try to add a suitable root= Kernel option to
> * mount the rootfs from the same device as the Kernel comes from.
> @@ -81,6 +82,7 @@ struct image_data {
> int verbose;
> int force;
> int dryrun;
> + int internal_oftree_fallback;
> };
>
> struct image_handler {
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* black screen with blinking cursor
From: irlinuxbox @ 2016-12-02 10:15 UTC (permalink / raw)
To: barebox
hello
barebox displays black screen with blinking cursorand / no thing happend
! no menu , no shell ..
what is problem here ?
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* Cadence QSPI xload boot timing issue
From: Ian Abbott @ 2016-12-02 17:09 UTC (permalink / raw)
To: barebox
Hi everyone,
I'm using BareBox and xload 2016.11.0 with custom BSP patches for my
Altera Cyclone V SoCFPGA based custom board, which boots from QSPI.
The board boots fine, but I ran into a weird boot timing issue when
playing around with the LOGLEVEL configuration options in xload. Before
playing around with them, my initial LOGLEVEL options were as follows:
CONFIG_COMPILE_LOGLEVEL=6
CONFIG_DEFAULT_LOGLEVEL=7
I ran into the boot timing issue when setting them as follows:
CONFIG_COMPILE_LOGLEVEL=6
CONFIG_DEFAULT_LOGLEVEL=5
The symptoms were that xload reported the following errors:
mtd0: failed to get image size
mtd0: failed to detect barebox and it's image size so use 1048576
It then went on to load and boot the barebox image successfully.
To debug the problem, I hex-dumped the barebox image header to the
terminal after it had been read by read_image_head() in
"lib/bootstrap/devfs.c" and found it to contain only '\xFF' bytes.
However, if I insert a small delay by calling mdelay(1) before reading
the barebox image header, it is read correctly and I don't get the error
messages.
It seems like a small delay is required after the Cadence QSPI driver
("drivers/mtd/spi-nor/cadence_quadspi.c") has set up the flash chip
before it is in a useable state. Adding a call mdelay(1) just before
cqspi_probe() returns fixes the problem for me, but I'm not sure if
that's the best way to fix it!
For reference, my flash chip is a Spansion s25fl256s1 (32768 Kbytes) and
the Cadence QSPI controller built in to the SoCFPGA is being clocked at
400 MHz.
--
-=( Ian Abbott @ MEV Ltd. E-mail: <abbotti@mev.co.uk> )=-
-=( Web: http://www.mev.co.uk/ )=-
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* [PATCH] MIPS: qemu-malta_defconfig: set MAX_IMAGE_SIZE = 4 MiB
From: Antony Pavlov @ 2016-12-05 8:28 UTC (permalink / raw)
To: barebox
If barebox binary image size exceeds the 4 MiB then
qemu exits with the 'Could not load MIPS bios' message.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/qemu-malta_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/configs/qemu-malta_defconfig b/arch/mips/configs/qemu-malta_defconfig
index 004adac..9671e93 100644
--- a/arch/mips/configs/qemu-malta_defconfig
+++ b/arch/mips/configs/qemu-malta_defconfig
@@ -1,6 +1,7 @@
CONFIG_BUILTIN_DTB=y
CONFIG_BUILTIN_DTB_NAME="qemu-malta"
CONFIG_PBL_IMAGE=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x400000
CONFIG_STACK_SIZE=0x7000
CONFIG_EXPERIMENTAL=y
CONFIG_BAUDRATE=38400
--
2.10.2
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* Re: [PATCH] bootm: dont use internal oftree fallback by default
From: Uwe Kleine-König @ 2016-12-05 8:29 UTC (permalink / raw)
To: Lucas Stach; +Cc: barebox, Alexander Kurz
In-Reply-To: <1480671998.17003.37.camel@pengutronix.de>
On Fri, Dec 02, 2016 at 10:46:38AM +0100, Lucas Stach wrote:
> Am Donnerstag, den 01.12.2016, 19:55 +0100 schrieb Alexander Kurz:
> > Booting via bootm offers several methods to load oftree data. When no
> > dedicated oftree image is provided, barebox checks for the presence of
> > its own internal oftree, assuming it as a good choice for boot.
> >
> > This fallback method breaks the usecase when a modern OF-based barebox
> > is used to boot a legacy ATAG dependent non OF based vendor provided kernel
> > (e.g. ATAGs will be switched off).
> > Unfortunately those kernels are being still actively shipped today.
> >
> > Change barebox according to the principle of least surprise: when no
> > oftree data is proactively configured, then perform a non-oftree boot.
> > Make the fallback-use of the barebox internal oftree an opt-in feature.
> >
> > Note: this will break boards where the boot process relied on this feature,
> > e.g.: oftree based barebox plus oftree based kernel without an explicit
> > given dts. For those boards global.bootm.internal_oftree_fallback=1 should
> > be set.
> >
> The least surprise on a modern oftree based kernel is that the firmware
> (Barebox) provides the DT, if there isn't an explicit override.
>
> So NACK on the patch in it's current form. If you have a board where you
> know that the kernel doesn't play along, you may reverse this patch so
> that you can set global.bootm.no_internal_oftree=1 in your board code.
Ack for the NAck. And AFAIK you can already today just do
oftree -f
before calling bootm to discard the internal dtb which should make
barebox fall back to ATAG.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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* [RFC v2 2/8] MIPS: c-r4k: add support for secondary cache
From: Antony Pavlov @ 2016-12-05 9:40 UTC (permalink / raw)
To: barebox; +Cc: Peter Mamonov
In-Reply-To: <20161205094033.31569-1-antonynpavlov@gmail.com>
From: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
arch/mips/include/asm/cacheops.h | 10 ++++++++++
arch/mips/lib/c-r4k.c | 19 +++++++++++++------
2 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 3bc5852..104e9d0 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -33,4 +33,14 @@
#define Hit_Invalidate_D (Cache_D | Hit_Invalidate)
#define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv)
+/*
+ * R4000SC and R4400SC-specific cacheops
+ */
+#define Cache_SD 0x03
+
+#define Index_Writeback_Inv_SD (Cache_SD | Index_Writeback_Inv)
+#define Index_Store_Tag_SD (Cache_SD | Index_Store_Tag)
+#define Hit_Invalidate_SD (Cache_SD | Hit_Invalidate)
+#define Hit_Writeback_Inv_SD (Cache_SD | Hit_Writeback_Inv)
+
#endif /* __ASM_CACHEOPS_H */
diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c
index 1502058..c70a665 100644
--- a/arch/mips/lib/c-r4k.c
+++ b/arch/mips/lib/c-r4k.c
@@ -46,7 +46,9 @@ static inline void blast_##pfx##cache##_range(unsigned long start, \
}
__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D)
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD)
__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD)
void flush_cache_all(void)
{
@@ -54,7 +56,7 @@ void flush_cache_all(void)
unsigned long lsize;
unsigned long addr;
unsigned long aend;
- unsigned int icache_size, dcache_size;
+ unsigned int icache_size, dcache_size, scache_size;
dcache_size = c->dcache.waysize * c->dcache.ways;
lsize = c->dcache.linesz;
@@ -68,21 +70,26 @@ void flush_cache_all(void)
for (addr = KSEG0; addr <= aend; addr += lsize)
cache_op(Index_Invalidate_I, addr);
- /* secondatory cache skipped */
+ if (c->scache.flags & MIPS_CACHE_NOT_PRESENT)
+ return;
+
+ scache_size = c->scache.waysize * c->scache.ways;
+ lsize = c->scache.linesz;
+ aend = (KSEG0 + scache_size - 1) & ~(lsize - 1);
+ for (addr = KSEG0; addr <= aend; addr += lsize)
+ cache_op(Index_Writeback_Inv_SD, addr);
}
void dma_flush_range(unsigned long start, unsigned long end)
{
blast_dcache_range(start, end);
-
- /* secondatory cache skipped */
+ blast_scache_range(start, end);
}
void dma_inv_range(unsigned long start, unsigned long end)
{
blast_inv_dcache_range(start, end);
-
- /* secondatory cache skipped */
+ blast_inv_scache_range(start, end);
}
void r4k_cache_init(void);
--
2.10.2
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* [RFC v2 0/8] MIPS: use kexec to load ELF linux images
From: Antony Pavlov @ 2016-12-05 9:40 UTC (permalink / raw)
To: barebox; +Cc: Peter Mamonov
This patchseries introduces a suitable way for loading
ELF linux kernel images on MIPS. You can load normal vmlinux
images or compressed self-extractable vmlinuz images.
The patchseries and additional patch with pre-compiled demo
vmlinux image for MIPS Malta can be obtained here:
https://github.com/frantony/barebox/tree/20161205.malta-bootm-vmlinux
Please see this commit message
https://github.com/frantony/barebox/commit/23b24122a4bd1d59266ae585364c792dc9140ecb
for instructions.
The code for actual ELF loading and relocation is imported
from
kexec-tools (git://git.kernel.org/pub/scm/utils/kernel/kexec/kexec-tools)
and
linux kernel (http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git).
There is no common practice on passing cmdline to the linux kernel
on MIPS machines. We have to realize it's own cmdline passing
routine for every MIPS machine supported by barebox.
The 'MIPS: malta: enable kexec' patch
demonstrates how to do it for MIPS Malta.
To separate common ELF handling routines and machine-specific
cmdline handling the 'reboot()' call is introduced.
The common code checks and loads ELF-file, the MIPS-specific
code arrange ELF segments in the appropriate memory places
and tunes relocator; next reboot() is called and machine-specific
code works on cmdline passing.
The 'import initial kexec stuff' contains some codes stealed from kexec-tools as-is.
These codes have some checkpatch.pl issues.
Antony Pavlov (7):
MIPS: add virt_to_phys() and phys_to_virt()
resource: add create_resource() helper function
import initial kexec stuff
filetype: add ELF type
bootm: add kexec ELF support
MIPS: add kexec ELF loading support
MIPS: malta: enable kexec
Peter Mamonov (1):
MIPS: c-r4k: add support for secondary cache
Changes since RFC v1 (http://lists.infradead.org/pipermail/barebox/2014-April/018651.html):
* add 64 bit ELF support by Peter Mamonov;
* update relocate_new_kernel arguments passing mechanism;
* test with linux-4.9-rc8.
TODOs:
* add DT and initrd passing support.
arch/mips/Kconfig | 1 +
arch/mips/include/asm/cacheops.h | 10 +
arch/mips/include/asm/elf.h | 8 +-
arch/mips/include/asm/io.h | 35 ++
arch/mips/lib/Makefile | 3 +
arch/mips/lib/c-r4k.c | 19 +-
arch/mips/lib/kexec-mips.c | 171 +++++++++
arch/mips/lib/relocate_kernel.S | 97 +++++
arch/mips/mach-malta/Makefile | 1 +
arch/mips/mach-malta/reboot.c | 104 ++++++
commands/Kconfig | 7 +
common/Kconfig | 3 +
common/filetype.c | 5 +
common/resource.c | 15 +
include/filetype.h | 1 +
include/linux/ioport.h | 2 +
include/linux/reboot.h | 14 +
lib/Makefile | 1 +
lib/kexec/Makefile | 4 +
lib/kexec/kexec-bootm-elf.c | 37 ++
lib/kexec/kexec-elf-exec.c | 82 ++++
lib/kexec/kexec-elf.c | 783 +++++++++++++++++++++++++++++++++++++++
lib/kexec/kexec-elf.h | 86 +++++
lib/kexec/kexec.c | 151 ++++++++
lib/kexec/kexec.h | 89 +++++
25 files changed, 1722 insertions(+), 7 deletions(-)
create mode 100644 arch/mips/lib/kexec-mips.c
create mode 100644 arch/mips/lib/relocate_kernel.S
create mode 100644 arch/mips/mach-malta/reboot.c
create mode 100644 include/linux/reboot.h
create mode 100644 lib/kexec/Makefile
create mode 100644 lib/kexec/kexec-bootm-elf.c
create mode 100644 lib/kexec/kexec-elf-exec.c
create mode 100644 lib/kexec/kexec-elf.c
create mode 100644 lib/kexec/kexec-elf.h
create mode 100644 lib/kexec/kexec.c
create mode 100644 lib/kexec/kexec.h
Cc: Peter Mamonov <pmamonov@gmail.com>
--
2.10.2
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* [RFC v2 1/8] MIPS: add virt_to_phys() and phys_to_virt()
From: Antony Pavlov @ 2016-12-05 9:40 UTC (permalink / raw)
To: barebox; +Cc: Peter Mamonov
In-Reply-To: <20161205094033.31569-1-antonynpavlov@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
arch/mips/include/asm/io.h | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 4bee591..993b30e 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -12,11 +12,46 @@
#include <linux/compiler.h>
#include <asm/types.h>
+#include <asm/addrspace.h>
#include <asm/byteorder.h>
void dma_flush_range(unsigned long, unsigned long);
void dma_inv_range(unsigned long, unsigned long);
+/*
+ * virt_to_phys - map virtual addresses to physical
+ * @address: address to remap
+ *
+ * The returned physical address is the physical (CPU) mapping for
+ * the memory address given. It is only valid to use this function on
+ * addresses directly mapped or allocated via kmalloc.
+ *
+ * This function does not give bus mappings for DMA transfers. In
+ * almost all conceivable cases a device driver should not be using
+ * this function
+ */
+static inline unsigned long virt_to_phys(const void *address)
+{
+ return (unsigned long)address & 0x1fffffff;
+}
+
+/*
+ * phys_to_virt - map physical address to virtual
+ * @address: address to remap
+ *
+ * The returned virtual address is a current CPU mapping for
+ * the memory address given. It is only valid to use this function on
+ * addresses that have a kernel mapping
+ *
+ * This function does not handle bus mappings for DMA transfers. In
+ * almost all conceivable cases a device driver should not be using
+ * this function
+ */
+static inline void *phys_to_virt(unsigned long address)
+{
+ return (void *)(KSEG0 | (address & 0x1fffffff));
+}
+
#define IO_SPACE_LIMIT 0
/*****************************************************************************/
--
2.10.2
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* [RFC v2 5/8] filetype: add ELF type
From: Antony Pavlov @ 2016-12-05 9:40 UTC (permalink / raw)
To: barebox
In-Reply-To: <20161205094033.31569-1-antonynpavlov@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
common/filetype.c | 5 +++++
include/filetype.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/common/filetype.c b/common/filetype.c
index 8d72933..f204638 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -25,6 +25,7 @@
#include <errno.h>
#include <envfs.h>
#include <disks.h>
+#include <elf.h>
struct filetype_str {
const char *name; /* human readable filetype */
@@ -63,6 +64,7 @@ static const struct filetype_str filetype_str[] = {
[filetype_exe] = { "MS-DOS executable", "exe" },
[filetype_mxs_bootstream] = { "Freescale MXS bootstream", "mxsbs" },
[filetype_socfpga_xload] = { "SoCFPGA prebootloader image", "socfpga-xload" },
+ [filetype_elf] = { "ELF", "elf" },
};
const char *file_type_to_string(enum filetype f)
@@ -327,6 +329,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
buf[7] == 0x47530000)
return filetype_ch_image_be;
+ if (strncmp(buf8, ELFMAG, 4) == 0)
+ return filetype_elf;
+
return filetype_unknown;
}
diff --git a/include/filetype.h b/include/filetype.h
index 65bd6ef..6fd2721 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -38,6 +38,7 @@ enum filetype {
filetype_xz_compressed,
filetype_mxs_bootstream,
filetype_socfpga_xload,
+ filetype_elf,
filetype_max,
};
--
2.10.2
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* [RFC v2 3/8] resource: add create_resource() helper function
From: Antony Pavlov @ 2016-12-05 9:40 UTC (permalink / raw)
To: barebox
In-Reply-To: <20161205094033.31569-1-antonynpavlov@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
common/resource.c | 15 +++++++++++++++
include/linux/ioport.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/common/resource.c b/common/resource.c
index e4bbe15..fa9ffd0 100644
--- a/common/resource.c
+++ b/common/resource.c
@@ -150,3 +150,18 @@ struct resource *request_ioport_region(const char *name,
return res;
}
+
+struct resource *create_resource(const char *name,
+ resource_size_t start, resource_size_t end)
+{
+ struct resource *t;
+
+ t = xzalloc(sizeof *t);
+ INIT_LIST_HEAD(&t->children);
+ t->parent = NULL;
+ t->name = xstrdup(name);
+ t->start = start;
+ t->end = end;
+
+ return t;
+}
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 3d375a8..2a944cc 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -140,6 +140,8 @@ struct resource *__request_region(struct resource *parent,
resource_size_t size);
int release_region(struct resource *res);
+struct resource *create_resource(const char *name,
+ resource_size_t start, resource_size_t end);
extern struct resource iomem_resource;
extern struct resource ioport_resource;
--
2.10.2
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