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[67.170.74.237]) by smtp.gmail.com with ESMTPSA id q7-20020a170902a3c700b001e434b1c6a6sm16200996plb.58.2024.04.26.13.18.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 13:18:31 -0700 (PDT) From: Dave Thaler X-Google-Original-From: Dave Thaler To: bpf@vger.kernel.org Cc: bpf@ietf.org, Dave Thaler , Dave Thaler Subject: [PATCH bpf-next v2] bpf, docs: Clarify PC use in instruction-set.rst Date: Fri, 26 Apr 2024 13:18:28 -0700 Message-Id: <20240426201828.4365-1-dthaler1968@gmail.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch elaborates on the use of PC by expanding the PC acronym, explaining the units, and the relative position to which the offset applies. v1->v2: reword per feedback from Alexei Signed-off-by: Dave Thaler --- Documentation/bpf/standardization/instruction-set.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst index b44bdacd0..766f57636 100644 --- a/Documentation/bpf/standardization/instruction-set.rst +++ b/Documentation/bpf/standardization/instruction-set.rst @@ -469,6 +469,12 @@ JSLT 0xc any PC += offset if dst < src signed JSLE 0xd any PC += offset if dst <= src signed ======== ===== ======= ================================= =================================================== +where 'PC' denotes the program counter, and the offset to increment by +is in units of 64-bit instructions relative to the instruction following +the jump instruction. Thus 'PC += 1' skips execution of the next +instruction if it's a basic instruction and fails verification if the +next instruction is a 128-bit wide instruction. + The BPF program needs to store the return value into register R0 before doing an ``EXIT``. -- 2.40.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.ietf.org (mail.ietf.org [50.223.129.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A620422334 for ; Fri, 26 Apr 2024 20:18:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=50.223.129.194 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714162720; cv=none; b=d8lPkQPrNrpQngsLxj2j96f6kJeuisZ+aoDGVaZGbp6HeLcDGOmYoZK7Yb5s1EpeyS3reVn96YL67crvrEySK5oaslGMkmHT3bzfALxbNuvUTgreppjl/9FG5oe9zKFT9gCl6sVF4bw1gmUSrP4pPIu8+DHsg7SENNGtXW7lXKU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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[67.170.74.237]) by smtp.gmail.com with ESMTPSA id q7-20020a170902a3c700b001e434b1c6a6sm16200996plb.58.2024.04.26.13.18.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 13:18:31 -0700 (PDT) X-Google-Original-From: Dave Thaler To: bpf@vger.kernel.org Cc: bpf@ietf.org, Dave Thaler , Dave Thaler Date: Fri, 26 Apr 2024 13:18:28 -0700 Message-ID: <20240426201828.4365-1-dthaler1968@gmail.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Archived-At: Subject: [Bpf] [PATCH bpf-next v2] bpf, docs: Clarify PC use in instruction-set.rst X-BeenThere: bpf@ietf.org X-Mailman-Version: 2.1.39 Precedence: list List-Archive: List-Post: List-Help: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: bpf-bounces@ietf.org Sender: "Bpf" X-Original-From: Dave Thaler From: Dave Thaler Message-ID: <20240426201828.-h1wVHOmZGfoG-VjGSCEVeiOosVXbYmTC8MoptjntC8@z> This patch elaborates on the use of PC by expanding the PC acronym, explaining the units, and the relative position to which the offset applies. v1->v2: reword per feedback from Alexei Signed-off-by: Dave Thaler --- Documentation/bpf/standardization/instruction-set.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst index b44bdacd0..766f57636 100644 --- a/Documentation/bpf/standardization/instruction-set.rst +++ b/Documentation/bpf/standardization/instruction-set.rst @@ -469,6 +469,12 @@ JSLT 0xc any PC += offset if dst < src signed JSLE 0xd any PC += offset if dst <= src signed ======== ===== ======= ================================= =================================================== +where 'PC' denotes the program counter, and the offset to increment by +is in units of 64-bit instructions relative to the instruction following +the jump instruction. Thus 'PC += 1' skips execution of the next +instruction if it's a basic instruction and fails verification if the +next instruction is a 128-bit wide instruction. + The BPF program needs to store the return value into register R0 before doing an ``EXIT``. -- 2.40.1 -- Bpf mailing list Bpf@ietf.org https://www.ietf.org/mailman/listinfo/bpf