From: Dave Thaler <dthaler1968@googlemail.com>
To: bpf@vger.kernel.org
Cc: bpf@ietf.org, Dave Thaler <dthaler1968@gmail.com>,
Dave Thaler <dthaler1968@googlemail.com>
Subject: [PATCH bpf-next] bpf, docs: clarify sign extension of 64-bit use of 32-bit imm
Date: Fri, 17 May 2024 09:16:12 -0700 [thread overview]
Message-ID: <20240517161612.4385-1-dthaler1968@gmail.com> (raw)
imm is defined as a 32-bit signed integer.
{MOV, K, ALU64} says it does "dst = src" (where src is 'imm') but it does
not sign extend, but instead does dst = (u32)src. The "Jump instructions"
section has "unsigned" by some instructions, but the "Arithmetic instructions"
section has no such note about the MOV instruction, so added an example to
make this more clear.
{JLE, K, JMP} says it does "PC += offset if dst <= src" (where src is 'imm',
and the comparison is unsigned). This was apparently ambiguous to some
readers as to whether the comparison was "dst <= (u64)(u32)imm" or
"dst <= (u64)(s64)imm", since the correct assumption would be the latter
except that the MOV instruction doesn't follow that, so added an example
to make this more clear.
Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
.../bpf/standardization/instruction-set.rst | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 997560aba..f96ebb169 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -378,13 +378,22 @@ etc. This specification requires that signed modulo use truncated division
a % n = a - n * trunc(a / n)
-The ``MOVSX`` instruction does a move operation with sign extension.
+The ``MOV`` instruction does a move operation without sign extension, whereas
+the ``MOVSX`` instruction does a move operation with sign extension.
``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
32-bit operands, and zeroes the remaining upper 32 bits.
``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
operands into 64-bit operands. Unlike other arithmetic instructions,
``MOVSX`` is only defined for register source operands (``X``).
+``{MOV, K, ALU}`` means::
+
+ dst = (u32) imm
+
+``{MOVSX, X, ALU}`` with 'offset' 32 means::
+
+ dst = (s32) src
+
The ``NEG`` instruction is only defined when the source bit is clear
(``K``).
@@ -486,6 +495,10 @@ Example:
where 's>=' indicates a signed '>=' comparison.
+``{JLE, K, JMP}`` means::
+
+ if dst <= (u64)(s64)imm goto +offset
+
``{JA, K, JMP32}`` means::
gotol +imm
--
2.40.1
WARNING: multiple messages have this Message-ID (diff)
From: Dave Thaler <dthaler1968=40googlemail.com@dmarc.ietf.org>
To: bpf@vger.kernel.org
Cc: bpf@ietf.org, Dave Thaler <dthaler1968@gmail.com>,
Dave Thaler <dthaler1968@googlemail.com>
Subject: [Bpf] [PATCH bpf-next] bpf, docs: clarify sign extension of 64-bit use of 32-bit imm
Date: Fri, 17 May 2024 09:16:12 -0700 [thread overview]
Message-ID: <20240517161612.4385-1-dthaler1968@gmail.com> (raw)
Message-ID: <20240517161612.GtLoMwM-xKObud-ndmuubLNItYV8hhGeaRZkOWdb4g8@z> (raw)
imm is defined as a 32-bit signed integer.
{MOV, K, ALU64} says it does "dst = src" (where src is 'imm') but it does
not sign extend, but instead does dst = (u32)src. The "Jump instructions"
section has "unsigned" by some instructions, but the "Arithmetic instructions"
section has no such note about the MOV instruction, so added an example to
make this more clear.
{JLE, K, JMP} says it does "PC += offset if dst <= src" (where src is 'imm',
and the comparison is unsigned). This was apparently ambiguous to some
readers as to whether the comparison was "dst <= (u64)(u32)imm" or
"dst <= (u64)(s64)imm", since the correct assumption would be the latter
except that the MOV instruction doesn't follow that, so added an example
to make this more clear.
Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
.../bpf/standardization/instruction-set.rst | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 997560aba..f96ebb169 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -378,13 +378,22 @@ etc. This specification requires that signed modulo use truncated division
a % n = a - n * trunc(a / n)
-The ``MOVSX`` instruction does a move operation with sign extension.
+The ``MOV`` instruction does a move operation without sign extension, whereas
+the ``MOVSX`` instruction does a move operation with sign extension.
``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
32-bit operands, and zeroes the remaining upper 32 bits.
``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
operands into 64-bit operands. Unlike other arithmetic instructions,
``MOVSX`` is only defined for register source operands (``X``).
+``{MOV, K, ALU}`` means::
+
+ dst = (u32) imm
+
+``{MOVSX, X, ALU}`` with 'offset' 32 means::
+
+ dst = (s32) src
+
The ``NEG`` instruction is only defined when the source bit is clear
(``K``).
@@ -486,6 +495,10 @@ Example:
where 's>=' indicates a signed '>=' comparison.
+``{JLE, K, JMP}`` means::
+
+ if dst <= (u64)(s64)imm goto +offset
+
``{JA, K, JMP32}`` means::
gotol +imm
--
2.40.1
--
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next reply other threads:[~2024-05-17 16:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-17 16:16 Dave Thaler [this message]
2024-05-17 16:16 ` [Bpf] [PATCH bpf-next] bpf, docs: clarify sign extension of 64-bit use of 32-bit imm Dave Thaler
2024-05-20 20:08 ` Yonghong Song
2024-05-20 20:08 ` [Bpf] " Yonghong Song
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