[PATCH v2 1/2] bpf, doc: Clarify Pseudo-C notation and w vs r register usage

[Vineet Gupta <vineet.gupta@linux.dev>]

As a newcomer to BPF ecosystem I was confused with Pseudo-C being the
actual assembly. And while it's obvious now that w and r forms represent
32-bit and 64-bit regs respectively, it's better to call this out in
documentation explicitly and make it more newbie-proof.

Signed-off-by: Vineet Gupta <vineet.gupta@linux.dev>
---
Changes since v1
  - Address review comments from AI CI-bot
---
 .../bpf/standardization/instruction-set.rst        | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 39c74611752b..96181565906f 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -315,13 +315,21 @@ For arithmetic and jump instructions (``ALU``, ``ALU64``, ``JMP`` and
 Arithmetic instructions
 -----------------------
 
-``ALU`` uses 32-bit wide operands while ``ALU64`` uses 64-bit wide operands for
-otherwise identical operations. ``ALU64`` instructions belong to the
+``ALU`` uses 32-bit wide operands ('w' registers in assembly) while
+``ALU64`` uses 64-bit wide operands ('r' registers) for otherwise
+identical operations. ``ALU64`` instructions belong to the
 base64 conformance group unless noted otherwise.
-The 'code' field encodes the operation as below, where 'src' refers to the
+The 'code' field encodes the operation as below, where 'src' refers to
 the source operand and 'dst' refers to the value of the destination
 register.
 
+.. note:: BPF ISA is unique as it uses "Pseudo-C" notation for the assembly
+          instructions. In the table below, the column "name" specifies the
+          encoding names. Assembly instructions (as generated by compilers)
+          are specified in the description column for some cases. Description
+          of ``DIV/SDIV``, ``MOD/SMOD`` includes additional semantic logic,
+          not actual assembly.
+
 .. table:: Arithmetic instructions
 
   =====  =====  =======  ===================================================================================
-- 
2.53.0