From: Vineet Gupta <vineet.gupta@linux.dev>
To: bpf@vger.kernel.org
Cc: bpf@gcc.gnu.org, jose.marchesi@oracle.com, ast@kernel.org,
Eduard Zingerman <eddyz87@gmail.com>,
Yonghong Song <yonghong.song@linux.dev>,
Vineet Gupta <vineet.gupta@linux.dev>
Subject: [PATCH v3 1/2] bpf, doc: Clarify Pseudo-C notation and w vs r register usage
Date: Fri, 3 Apr 2026 09:40:39 -0700 [thread overview]
Message-ID: <20260403164040.73269-2-vineet.gupta@linux.dev> (raw)
In-Reply-To: <20260403164040.73269-1-vineet.gupta@linux.dev>
As a newcomer to BPF ecosystem I was confused with Pseudo-C being the
actual assembly. And while it's obvious now that w and r forms represent
32-bit and 64-bit regs respectively, it's better to call this out in
documentation explicitly and make it more newbie-proof.
Signed-off-by: Vineet Gupta <vineet.gupta@linux.dev>
---
No changes since v2
---
.../bpf/standardization/instruction-set.rst | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 39c74611752b..96181565906f 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -315,13 +315,21 @@ For arithmetic and jump instructions (``ALU``, ``ALU64``, ``JMP`` and
Arithmetic instructions
-----------------------
-``ALU`` uses 32-bit wide operands while ``ALU64`` uses 64-bit wide operands for
-otherwise identical operations. ``ALU64`` instructions belong to the
+``ALU`` uses 32-bit wide operands ('w' registers in assembly) while
+``ALU64`` uses 64-bit wide operands ('r' registers) for otherwise
+identical operations. ``ALU64`` instructions belong to the
base64 conformance group unless noted otherwise.
-The 'code' field encodes the operation as below, where 'src' refers to the
+The 'code' field encodes the operation as below, where 'src' refers to
the source operand and 'dst' refers to the value of the destination
register.
+.. note:: BPF ISA is unique as it uses "Pseudo-C" notation for the assembly
+ instructions. In the table below, the column "name" specifies the
+ encoding names. Assembly instructions (as generated by compilers)
+ are specified in the description column for some cases. Description
+ of ``DIV/SDIV``, ``MOD/SMOD`` includes additional semantic logic,
+ not actual assembly.
+
.. table:: Arithmetic instructions
===== ===== ======= ===================================================================================
--
2.53.0
next prev parent reply other threads:[~2026-04-03 16:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-03 16:40 [PATCH v3 0/2] BPF documentation improvements Vineet Gupta
2026-04-03 16:40 ` Vineet Gupta [this message]
2026-04-05 3:26 ` [PATCH v3 1/2] bpf, doc: Clarify Pseudo-C notation and w vs r register usage Alexei Starovoitov
2026-04-03 16:40 ` [PATCH v3 2/2] bpf, doc: Improve MOV/MOVSX documentation and add examples Vineet Gupta
2026-04-05 3:33 ` Alexei Starovoitov
2026-04-05 21:45 ` Vineet Gupta
2026-04-05 21:45 ` [Bpf] " Vineet Gupta
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