From: sashiko-bot@kernel.org
To: "Alex Elder" <elder@riscstar.com>
Cc: bpf@vger.kernel.org
Subject: Re: [PATCH net-next 10/12] net: stmmac: tc956x: add TC956x/QPS615 support
Date: Sat, 02 May 2026 15:56:18 +0000 [thread overview]
Message-ID: <20260502155618.EC605C19425@smtp.kernel.org> (raw)
In-Reply-To: <20260501155421.3329862-11-elder@riscstar.com>
Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
- [High] The RX queue IRQ mapping loop incorrectly checks `res->tx_irq[i]` instead of `res->rx_irq[i]` for failures.
- [High] DMA address truncation on 32-bit architectures leads to corrupted hardware DMA programming.
- [High] Mapped IRQs are never disposed, leaking descriptors and causing a WARN on device removal.
- [Medium] Hardware clocks and resets are leaked on `probe()` and `mac_enable()` error paths.
- [Medium] OF node reference leak for `mdio_node` on probe error paths and device removal.
--
commit e138cc3787ee995063c093b9ca94f6ca453bbcda
Author: Daniel Thompson <daniel@riscstar.com>
Subject: net: stmmac: tc956x: add TC956x/QPS615 support
This commit adds support for the Toshiba TC956x eMAC/MSIGEN combination,
implemented as a driver for an auxiliary bus device that bridges TC956x
level interrupts to PCIe MSIs.
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-tc956x.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-tc956x.c
> new file mode 100644
> index 000000000000..27ff83dd3bd9
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-tc956x.c
[ ... ]
> +static int tc956x_mac_enable(struct tc956x_data *td)
> +{
> + const struct tc956x_chip *chip = td->auxbus_data->chip;
> + struct plat_stmmacenet_data *plat = td->plat;
> + u32 id = td->auxbus_data->mac_id;
> + int ret;
> +
> + tc956x_clock_enable(chip, id, MAC_CLOCK_TX);
> + tc956x_clock_enable(chip, id, MAC_CLOCK_RX);
> + tc956x_clock_enable(chip, id, MAC_CLOCK_ALL);
> + if (id)
> + tc956x_clock_enable(chip, id, MAC_CLOCK_RMII);
> +
> + /* Set the speed related registers */
> + ret = tc956x_mac_configure(td, plat->max_speed);
> + if (ret)
> + return ret;
If tc956x_mac_configure() fails, will this leak the clocks that were just
enabled since tc956x_clock_disable() is not called?
[ ... ]
> +static void tc956x_dma_init_rx_chan(struct stmmac_priv *priv,
> + void __iomem *ioaddr,
> + struct stmmac_dma_cfg *dma_cfg,
> + dma_addr_t phy, u32 chan)
> +{
> + dma_addr_t translated = phy + TC956X_SLV00_SRC_ADDR;
If dma_addr_t is 32-bit on the target architecture, will adding
TC956X_SLV00_SRC_ADDR (0x1000000000ULL) to phy truncate the result and cause
the upper 32 bits to be 0?
Should translated be explicitly typed as u64? The same pattern appears
in tc956x_dma_init_tx_chan(), tc956x_desc_set_addr(), and
tc956x_desc_set_sec_addr().
[ ... ]
> +static int tc956x_dwmac_parse_dt(struct tc956x_data *td)
> +{
> + struct device_node *mdio_node;
> + struct device *dev = td->dev;
> + struct device_node *np;
> +
> + np = dev_of_node(dev);
> + if (!np)
> + return dev_err_probe(dev, -EINVAL, "no devicetree node\n");
> +
> + /* Find the MDIO bus */
> + for_each_child_of_node(np, mdio_node) {
> + if (of_device_is_compatible(mdio_node,
> + "snps,dwmac-mdio"))
> + break;
> + }
> +
> + /* Pass the MDIO bus (if there is one) to the core driver */
> + if (mdio_node) {
> + td->plat->mdio_node = mdio_node;
> + td->plat->mdio_bus_data->needs_reset = true;
> + }
> +
> + return 0;
> +}
Since the loop breaks early when a compatible node is found, does this leak
the reference to mdio_node?
Is a call to of_node_put() needed in tc956x_dwmac_remove() and on probe
error paths?
[ ... ]
> +static int tc956x_stmmac_resources_init(struct tc956x_data *td,
> + struct stmmac_resources *res)
> +{
> + struct irq_domain *irq_domain = td->irq_domain;
> + u32 i;
> +
> + res->irq = irq_create_mapping(irq_domain, HWIRQ_EVENT);
> + if (!res->irq)
> + return -EINVAL;
> +
> + for (i = 0; i < td->plat->tx_queues_to_use; i++) {
> + res->tx_irq[i] = irq_create_mapping(irq_domain, HWIRQ_TX0 + i);
> + if (!res->tx_irq[i])
> + return -EINVAL;
> + }
> +
> + for (i = 0; i < td->plat->rx_queues_to_use; i++) {
> + res->rx_irq[i] = irq_create_mapping(irq_domain, HWIRQ_RX0 + i);
> + if (!res->tx_irq[i])
> + return -EINVAL;
> + }
Should this be checking res->rx_irq[i] instead of res->tx_irq[i]?
If tx_irq[i] was previously set during the TX mapping loop, this check won't
catch RX mapping failures and uninitialized IRQs could be left in the
resource structure.
[ ... ]
> +static int tc956x_dwmac_probe(struct auxiliary_device *adev,
> + const struct auxiliary_device_id *id)
> +{
[ ... ]
> + ret = tc956x_mac_enable(td);
> + if (ret)
> + return dev_err_probe(dev, ret, "failed to enable MAC\n");
> +
> + ret = stmmac_dvr_probe(dev, td->plat, &res);
> + if (ret)
> + return dev_err_probe(dev, ret, "failed stmmac probe\n");
> +
> + return 0;
> +}
Does this error path need to call tc956x_mac_disable(td) to unwind the
hardware state if stmmac_dvr_probe() fails?
[ ... ]
> +static void tc956x_dwmac_remove(struct auxiliary_device *adev)
> +{
> + struct device *dev = &adev->dev;
> + struct net_device *ndev = dev_get_drvdata(dev);
> + struct stmmac_priv *priv = netdev_priv(ndev);
> + struct tc956x_data *td = priv->plat->bsp_priv;
> +
> + stmmac_dvr_remove(dev);
> + tc956x_mac_disable(td);
> +}
Are the IRQs created by irq_create_mapping() leaking here?
There appear to be no calls to irq_dispose_mapping() on device removal or
probe error paths. While IRQ_DOMAIN_FLAG_DESTROY_GC frees the generic
chip data, the descriptors might leak and trigger a warning in
irq_domain_remove().
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260501155421.3329862-1-elder@riscstar.com?part=10
next prev parent reply other threads:[~2026-05-02 15:56 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 15:54 [PATCH net-next 00/12] net: enable TC956x support Alex Elder
2026-05-01 15:54 ` [PATCH net-next 01/12] net: pcs: pcs-xpcs-regmap: support XPCS memory-mapped MDIO bus via regmap Alex Elder
2026-05-02 15:56 ` sashiko-bot
2026-05-01 15:54 ` [PATCH net-next 02/12] net: pcs: pcs-xpcs: select operating mode for 10G-baseR capable PCS Alex Elder
2026-05-01 16:50 ` Andrew Lunn
2026-05-01 18:07 ` Alex Elder
2026-05-05 15:58 ` Daniel Thompson
2026-05-02 15:56 ` sashiko-bot
2026-05-01 15:54 ` [PATCH net-next 03/12] net: pcs: pcs-xpcs: Preserve BMCR_ANENBLE during link up Alex Elder
2026-05-01 17:06 ` Andrew Lunn
2026-05-06 9:46 ` Daniel Thompson
2026-05-02 15:56 ` sashiko-bot
2026-05-01 15:54 ` [PATCH net-next 04/12] net: stmmac: dma: create a separate dma_device pointer Alex Elder
2026-05-01 17:13 ` Andrew Lunn
2026-05-01 18:06 ` Alex Elder
2026-05-01 20:55 ` Andrew Lunn
2026-05-04 13:36 ` Alex Elder
2026-05-02 15:56 ` sashiko-bot
2026-05-01 15:54 ` [PATCH net-next 05/12] net: stmmac: dwxgmac2: Add multi MSI interrupt mode Alex Elder
2026-05-01 17:21 ` Andrew Lunn
2026-05-01 15:54 ` [PATCH net-next 06/12] net: stmmac: dwxgmac2: Add XGMAC 3.01a support Alex Elder
2026-05-01 15:54 ` [PATCH net-next 07/12] net: stmmac: dwxgmac2: export symbols for XGMAC 3.01a DMA Alex Elder
2026-05-02 15:56 ` sashiko-bot
2026-05-01 15:54 ` [PATCH net-next 08/12] dt-bindings: net: toshiba,tc965x-dwmac: add TC956x Ethernet bridge Alex Elder
2026-05-01 17:38 ` Andrew Lunn
2026-05-03 2:22 ` Alex Elder
2026-05-07 22:17 ` Alex Elder
2026-05-07 23:39 ` Rob Herring
2026-05-02 15:56 ` sashiko-bot
2026-05-07 19:02 ` Rob Herring
2026-05-08 14:36 ` Alex Elder
2026-05-04 11:00 ` Krzysztof Kozlowski
2026-05-04 13:34 ` Alex Elder
2026-05-07 14:47 ` Daniel Thompson
2026-05-07 14:12 ` Bjorn Andersson
2026-05-07 14:19 ` Andrew Lunn
2026-05-07 16:12 ` Bjorn Andersson
2026-05-07 18:37 ` Alex Elder
2026-05-10 2:25 ` Bjorn Andersson
2026-05-07 23:41 ` Rob Herring
2026-05-01 15:54 ` [PATCH net-next 09/12] gpio: tc956x: add TC956x/QPS615 support Alex Elder
2026-05-01 18:36 ` Andrew Lunn
2026-05-03 1:45 ` Alex Elder
2026-05-03 2:48 ` Andrew Lunn
2026-05-07 18:39 ` Alex Elder
2026-05-03 3:05 ` Andrew Lunn
2026-05-06 18:21 ` Alex Elder
2026-05-06 19:43 ` Andrew Lunn
2026-05-06 20:25 ` Alex Elder
2026-05-06 21:43 ` Andrew Lunn
2026-05-06 22:41 ` Alex Elder
2026-05-02 15:56 ` sashiko-bot
2026-05-03 3:42 ` Julian Braha
2026-05-06 18:51 ` Alex Elder
2026-05-04 12:46 ` Bartosz Golaszewski
2026-05-04 13:07 ` Alex Elder
2026-05-07 12:15 ` Linus Walleij
2026-05-07 12:20 ` Alex Elder
2026-05-01 15:54 ` [PATCH net-next 10/12] net: stmmac: " Alex Elder
2026-05-01 19:04 ` Andrew Lunn
2026-05-07 16:03 ` Daniel Thompson
2026-05-07 16:29 ` Andrew Lunn
2026-05-08 11:25 ` Daniel Thompson
2026-05-08 13:34 ` Andrew Lunn
2026-05-08 15:54 ` Daniel Thompson
2026-05-02 15:56 ` sashiko-bot [this message]
2026-05-05 16:38 ` Mohd Ayaan Anwar
2026-05-05 16:46 ` Alex Elder
2026-05-06 2:30 ` Xilin Wu
2026-05-06 17:44 ` Alex Elder
2026-05-07 13:57 ` Xilin Wu
2026-05-07 14:14 ` Andrew Lunn
2026-05-11 15:41 ` Daniel Thompson
2026-05-06 12:59 ` Xilin Wu
2026-05-06 14:19 ` Andrew Lunn
2026-05-06 14:35 ` Xilin Wu
2026-05-06 14:45 ` Andrew Lunn
2026-05-06 15:38 ` Xilin Wu
2026-05-06 15:39 ` Daniel Thompson
2026-05-06 15:44 ` Xilin Wu
2026-05-06 15:56 ` Andrew Lunn
2026-05-06 16:00 ` Xilin Wu
2026-05-06 15:28 ` Daniel Thompson
2026-05-06 19:52 ` Andrew Lunn
2026-05-07 18:44 ` Alex Elder
2026-05-08 13:09 ` Xilin Wu
2026-05-08 13:36 ` Andrew Lunn
2026-05-08 13:41 ` Xilin Wu
2026-05-01 15:54 ` [PATCH net-next 11/12] misc: tc956x_pci: " Alex Elder
2026-05-01 21:07 ` Andrew Lunn
2026-05-03 2:06 ` Alex Elder
2026-05-02 15:56 ` sashiko-bot
2026-05-02 16:45 ` Jakub Kicinski
2026-05-03 2:06 ` Alex Elder
2026-05-03 2:14 ` Jakub Kicinski
2026-05-03 2:23 ` Alex Elder
2026-05-01 15:54 ` [PATCH net-next 12/12] arm64: dts: qcom: qcs6490-rb3gen2: enable TC9564 with a single QCS8081 phy Alex Elder
2026-05-01 21:09 ` Andrew Lunn
2026-05-05 16:25 ` Daniel Thompson
2026-05-05 16:42 ` Mohd Ayaan Anwar
2026-05-05 16:46 ` Alex Elder
2026-05-08 14:03 ` Konrad Dybcio
2026-05-13 12:49 ` Daniel Thompson
2026-05-13 14:35 ` Andrew Lunn
2026-05-02 16:47 ` [PATCH net-next 00/12] net: enable TC956x support Jakub Kicinski
2026-05-03 2:07 ` Alex Elder
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