From: sashiko-bot@kernel.org
To: "Daniel Machon" <daniel.machon@microchip.com>
Cc: bpf@vger.kernel.org
Subject: Re: [PATCH net-next v3 10/13] net: lan966x: add PCIe FDMA MTU change support
Date: Tue, 05 May 2026 18:22:59 +0000 [thread overview]
Message-ID: <20260505182259.89186C2BCB4@smtp.kernel.org> (raw)
In-Reply-To: <20260504-lan966x-pci-fdma-v3-10-a56f5740d870@microchip.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] NAPI enablement race condition in reload paths can permanently stall the device.
--
commit 20d04dd9ba5afad59c5a90474d47aff04eccef0c
Author: Daniel Machon <daniel.machon@microchip.com>
net: lan966x: add PCIe FDMA MTU change support
This commit adds MTU change support for the PCIe FDMA path. It allows
continuous ATU-mapped RX and TX buffers to be reallocated with a new size
upon MTU changes, falling back to reusing existing buffers upon allocation
failure.
> diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma_pci.c b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma_pci.c
> index 2c54880460772..491ddc337760f 100644
> --- a/drivers/net/ethernet/microchip/lan966x/lan966x_fdma_pci.c
> +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_fdma_pci.c
[ ... ]
> @@ -354,9 +359,155 @@ static int lan966x_fdma_pci_init(struct lan966x *lan966x)
[ ... ]
> +static int lan966x_fdma_pci_reload(struct lan966x *lan966x, int new_mtu)
> +{
[ ... ]
> + /* Keep this order: rx_start, wakeup_netdev, napi_enable. */
> + lan966x_fdma_rx_start(&lan966x->rx);
> + lan966x_fdma_pci_wakeup_netdev(lan966x);
> + napi_enable(&lan966x->napi);
Is this ordering vulnerable to a race condition that can permanently stall
the device?
If an interrupt fires immediately after lan966x_fdma_rx_start() but before
napi_enable(), could the following sequence occur:
lan966x_fdma_rx_start()
-> enables hardware interrupts via FDMA_INTR_DB_ENA
Hardware Interrupt
lan966x_fdma_irq_handler()
-> masks interrupt via FDMA_INTR_DB_ENA
-> napi_schedule()
-> drops the event because napi_enable() hasn't run yet
napi_enable()
-> clears NAPI state but schedules no poll
Since the hardware interrupt remains masked by the ISR and NAPI will never run
to unmask it, does this leave the NAPI polling permanently stalled?
Should napi_enable() be called before lan966x_fdma_rx_start() unmasks the
hardware interrupts?
> +
> + return err;
> +restore:
> +
> + /* No new buffers are allocated at this point. Use the old buffers,
> + * but reset them before starting the FDMA again.
> + */
> +
> + memcpy(&lan966x->tx.fdma, &tx_fdma_old, sizeof(struct fdma));
> + memcpy(&lan966x->rx.fdma, &rx_fdma_old, sizeof(struct fdma));
> +
> + lan966x->rx.max_mtu = old_mtu;
> +
> + lan966x_fdma_pci_reset_mem(lan966x);
> +
> + /* Keep this order: rx_start, wakeup_netdev, napi_enable. */
> + lan966x_fdma_rx_start(&lan966x->rx);
> + lan966x_fdma_pci_wakeup_netdev(lan966x);
> + napi_enable(&lan966x->napi);
Does this restore path have the same race condition between unmasking
hardware interrupts and enabling NAPI?
> +
> + return err;
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260504-lan966x-pci-fdma-v3-0-a56f5740d870@microchip.com?part=10
next prev parent reply other threads:[~2026-05-05 18:22 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-04 14:23 [PATCH net-next v3 00/13] net: lan966x: add support for PCIe FDMA Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 01/13] MAINTAINERS: add FDMA library to Sparx5 SoC entry Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 02/13] net: microchip: fdma: rename contiguous dataptr helpers Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 03/13] net: microchip: fdma: add PCIe ATU support Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 04/13] net: lan966x: add FDMA LLP register write helper Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 05/13] net: lan966x: export FDMA helpers for reuse Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 06/13] net: lan966x: add FDMA ops dispatch for PCIe support Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 07/13] net: lan966x: clear FDMA interrupt stickies after switch reset Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 08/13] net: lan966x: add shutdown callback to stop FDMA on reboot Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 09/13] net: lan966x: add PCIe FDMA support Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-07 8:54 ` Paolo Abeni
2026-05-07 9:21 ` Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 10/13] net: lan966x: add PCIe FDMA MTU change support Daniel Machon
2026-05-05 18:22 ` sashiko-bot [this message]
2026-05-04 14:23 ` [PATCH net-next v3 11/13] net: lan966x: add PCIe FDMA XDP support Daniel Machon
2026-05-05 18:22 ` sashiko-bot
2026-05-04 14:23 ` [PATCH net-next v3 12/13] misc: lan966x-pci: dts: extend cpu reg to cover PCIE DBI space Daniel Machon
2026-05-04 14:23 ` [PATCH net-next v3 13/13] misc: lan966x-pci: dts: add fdma interrupt to overlay Daniel Machon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260505182259.89186C2BCB4@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=bpf@vger.kernel.org \
--cc=daniel.machon@microchip.com \
--cc=sashiko@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox