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[67.170.74.237]) by smtp.gmail.com with ESMTPSA id c92-20020a17090a496500b0029102d936casm4034619pjh.47.2024.01.26.14.27.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Jan 2024 14:27:14 -0800 (PST) From: dthaler1968@googlemail.com X-Google-Original-From: To: "'Yonghong Song'" Cc: , References: <085f01da48bb$fe0c3cb0$fa24b610$@gmail.com> <08ab01da48be$603541a0$209fc4e0$@gmail.com> <829aa552-b04e-4f08-9874-b3f929741852@linux.dev> <095f01da48e8$611687d0$23439770$@gmail.com> <4dfb0d6a-aa48-4d96-82f0-09a960b1012f@linux.dev> <1fc001da4e6a$2848cad0$78da6070$@gmail.com> <9d077ed4-6a30-49db-8160-83d8c525ff3e@linux.dev> <259a01da4ff4$adfe9c50$09fbd4f0$@gmail.com> In-Reply-To: Subject: RE: 64-bit immediate instructions clarification Date: Fri, 26 Jan 2024 14:27:10 -0800 Message-ID: <294f01da50a6$ce3d0670$6ab71350$@gmail.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQGkwaT1bS2nmU/D6EzqCIA6r6THFAGlkngPAiWOVp0CBJjXigIgg/ivAZjEuOEC/rKUjQJO4XhxARE1PEaw2ImpwA== Content-Language: en-us Yonghong Song wrote:=20 > On 1/25/24 5:12 PM, dthaler1968@googlemail.com wrote: > > The spec defines: > >> As discussed below in `64-bit immediate instructions`_, a 64-bit > >> immediate instruction uses a 64-bit immediate value that is = constructed as > follows. > >> The 64 bits following the basic instruction contain a pseudo > >> instruction using the same format but with opcode, dst_reg, = src_reg, > >> and offset all set to zero, and imm containing the high 32 bits of = the > immediate value. > > [...] > >> imm64 =3D (next_imm << 32) | imm > > The 64-bit immediate instructions section then says: > >> Instructions with the ``BPF_IMM`` 'mode' modifier use the wide > >> instruction encoding defined in `Instruction encoding`_, and use = the > >> 'src' field of the basic instruction to hold an opcode subtype. > > Some instructions then nicely state how to use the full 64 bit > > immediate value, such as > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst =3D imm64 > integer integer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst =3D = map_val(map_by_fd(imm)) > + next_imm map fd data pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst =3D = map_val(map_by_idx(imm)) > + next_imm map index data pointer > > Others don't: > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst =3D map_by_fd(imm) > map fd map > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst =3D var_addr(imm) > variable id data pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst =3D code_addr(imm) > integer code pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst =3D map_by_idx(imm) > map index map > > How is next_imm used in those four? Must it be 0? Or can it be = anything and > it's ignored? > > Or is it used for something? >=20 > The other four must have next_imm to be 0. No use of next_imm in thee = four > insns kindly implies this. > See uapi bpf.h for details (search BPF_PSEUDO_MAP_FD). Thanks for confirming. The "Instruction encoding" section has = misleading text in my opinion. It nicely says: > Note that most instructions do not use all of the fields. Unused = fields shall be cleared to zero. But then goes on to say: > As discussed below in 64-bit immediate instructions (Section 4.4), a = 64-bit immediate instruction > uses a 64-bit immediate value that is constructed as follows. [...] > imm64 =3D (next_imm << 32) | imm Under a normal English reading, that could imply that all 64-bit = immediate instructions use imm64, which is not the case. The whole imm64 discussion there only applies = today to src=3D0 (though I suppose it could be used by future 64-bit immediate instructions). = Minimally I think "a 64-bit immediate instruction uses" should be "some 64-bit immediate = instructions use" but at present there's only one. It would actually be simpler to remove the imm64 text and just have the definition of src 0x0 change from: "dst =3D imm64" to "dst =3D (next_imm = << 32) | imm". What do you think? Dave From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.ietf.org (mail.ietf.org [50.223.129.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D54D2554E for ; Fri, 26 Jan 2024 22:27:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=50.223.129.194 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706308044; cv=none; b=kNcZeD7U6BHzgr6lVds3lQPny6rvG2holuN7M91yH7AdhzUbsb3vTDK93+tan+3E7oJ4S8UFY7R2TIJL4nwfOfjb1+sCwZHEOi8v2K2kkQefIJGfeXrhemrSavWM0XKHKug6vmuW1NU8C7SVZjqVcHunNVDc87CURn6OKOXNZH4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706308044; c=relaxed/simple; bh=g/Ej+p05pHPmU6UBAcmMgvsJSglshnkSQjZsLUh/oHo=; h=To:Cc:References:In-Reply-To:Date:Message-ID:MIME-Version:Subject: Content-Type:From; b=dNt70M84sFAqS++1IvAQ6xXD0HOpvXrHHey5Ykwm4mwb3aNcP4O7e4nkgUZpm7+DgAN+Bpo9urSdzKuX8BAF7OnaKeTsKtsrcuVgKeVYmWcGBNKtvPCvCWk45jByYrxyuUSu4lAOnh9fFAniU6tmCpqpzf9t4aeU4rPZ7Ux/oic= ARC-Authentication-Results:i=1; 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[67.170.74.237]) by smtp.gmail.com with ESMTPSA id c92-20020a17090a496500b0029102d936casm4034619pjh.47.2024.01.26.14.27.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Jan 2024 14:27:14 -0800 (PST) X-Google-Original-From: To: "'Yonghong Song'" Cc: , References: <085f01da48bb$fe0c3cb0$fa24b610$@gmail.com> <08ab01da48be$603541a0$209fc4e0$@gmail.com> <829aa552-b04e-4f08-9874-b3f929741852@linux.dev> <095f01da48e8$611687d0$23439770$@gmail.com> <4dfb0d6a-aa48-4d96-82f0-09a960b1012f@linux.dev> <1fc001da4e6a$2848cad0$78da6070$@gmail.com> <9d077ed4-6a30-49db-8160-83d8c525ff3e@linux.dev> <259a01da4ff4$adfe9c50$09fbd4f0$@gmail.com> In-Reply-To: Date: Fri, 26 Jan 2024 14:27:10 -0800 Message-ID: <294f01da50a6$ce3d0670$6ab71350$@gmail.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQGkwaT1bS2nmU/D6EzqCIA6r6THFAGlkngPAiWOVp0CBJjXigIgg/ivAZjEuOEC/rKUjQJO4XhxARE1PEaw2ImpwA== Content-Language: en-us Archived-At: Subject: Re: [Bpf] 64-bit immediate instructions clarification X-BeenThere: bpf@ietf.org X-Mailman-Version: 2.1.39 Precedence: list List-Archive: List-Post: List-Help: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: bpf-bounces@ietf.org Sender: "Bpf" X-Original-From: dthaler1968@googlemail.com From: dthaler1968=40googlemail.com@dmarc.ietf.org Message-ID: <20240126222710.OFZzrh-Bw8iL5CRnCZL8f_2dDIKlSYGNBFqyhIsfy1U@z> Yonghong Song wrote: > On 1/25/24 5:12 PM, dthaler1968@googlemail.com wrote: > > The spec defines: > >> As discussed below in `64-bit immediate instructions`_, a 64-bit > >> immediate instruction uses a 64-bit immediate value that is constructed as > follows. > >> The 64 bits following the basic instruction contain a pseudo > >> instruction using the same format but with opcode, dst_reg, src_reg, > >> and offset all set to zero, and imm containing the high 32 bits of the > immediate value. > > [...] > >> imm64 = (next_imm << 32) | imm > > The 64-bit immediate instructions section then says: > >> Instructions with the ``BPF_IMM`` 'mode' modifier use the wide > >> instruction encoding defined in `Instruction encoding`_, and use the > >> 'src' field of the basic instruction to hold an opcode subtype. > > Some instructions then nicely state how to use the full 64 bit > > immediate value, such as > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst = imm64 > integer integer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst = map_val(map_by_fd(imm)) > + next_imm map fd data pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst = map_val(map_by_idx(imm)) > + next_imm map index data pointer > > Others don't: > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst = map_by_fd(imm) > map fd map > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst = var_addr(imm) > variable id data pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst = code_addr(imm) > integer code pointer > >> BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst = map_by_idx(imm) > map index map > > How is next_imm used in those four? Must it be 0? Or can it be anything and > it's ignored? > > Or is it used for something? > > The other four must have next_imm to be 0. No use of next_imm in thee four > insns kindly implies this. > See uapi bpf.h for details (search BPF_PSEUDO_MAP_FD). Thanks for confirming. The "Instruction encoding" section has misleading text in my opinion. It nicely says: > Note that most instructions do not use all of the fields. Unused fields shall be cleared to zero. But then goes on to say: > As discussed below in 64-bit immediate instructions (Section 4.4), a 64-bit immediate instruction > uses a 64-bit immediate value that is constructed as follows. [...] > imm64 = (next_imm << 32) | imm Under a normal English reading, that could imply that all 64-bit immediate instructions use imm64, which is not the case. The whole imm64 discussion there only applies today to src=0 (though I suppose it could be used by future 64-bit immediate instructions). Minimally I think "a 64-bit immediate instruction uses" should be "some 64-bit immediate instructions use" but at present there's only one. It would actually be simpler to remove the imm64 text and just have the definition of src 0x0 change from: "dst = imm64" to "dst = (next_imm << 32) | imm". What do you think? Dave -- Bpf mailing list Bpf@ietf.org https://www.ietf.org/mailman/listinfo/bpf