From: Pu Lehui <pulehui@huawei.com>
To: "Radim Krčmář" <rkrcmar@ventanamicro.com>, bpf@vger.kernel.org
Cc: stable@vger.kernel.org, "Alexei Starovoitov" <ast@kernel.org>,
"Daniel Borkmann" <daniel@iogearbox.net>,
"Andrii Nakryiko" <andrii@kernel.org>,
"Martin KaFai Lau" <martin.lau@linux.dev>,
"Eduard Zingerman" <eddyz87@gmail.com>,
"Song Liu" <song@kernel.org>,
"Yonghong Song" <yonghong.song@linux.dev>,
"John Fastabend" <john.fastabend@gmail.com>,
"KP Singh" <kpsingh@kernel.org>,
"Stanislav Fomichev" <sdf@fomichev.me>,
"Hao Luo" <haoluo@google.com>, "Jiri Olsa" <jolsa@kernel.org>,
"Björn Töpel" <bjorn@kernel.org>,
"Puranjay Mohan" <puranjay@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Kumar Kartikeya Dwivedi" <memxor@gmail.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG
Date: Sat, 16 Aug 2025 09:27:55 +0800 [thread overview]
Message-ID: <40d38745-a790-4f34-8eef-8038069b976d@huawei.com> (raw)
In-Reply-To: <20250812090256.757273-3-rkrcmar@ventanamicro.com>
On 2025/8/12 17:02, Radim Krčmář wrote:
> emit_ld is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
> The struct currently has a hole after cpu, so little endian accesses
> seemed fine.
>
> Fixes: 19c56d4e5be1 ("riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
> ---
> arch/riscv/net/bpf_jit_comp64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
> index 10e01ff06312..6e1554d89681 100644
> --- a/arch/riscv/net/bpf_jit_comp64.c
> +++ b/arch/riscv/net/bpf_jit_comp64.c
> @@ -1356,7 +1356,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
> emit_mv(rd, rs, ctx);
> #ifdef CONFIG_SMP
> /* Load current CPU number in T1 */
> - emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
> + emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
> RV_REG_TP, ctx);
> /* Load address of __per_cpu_offset array in T2 */
> emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
Reviewed-by: Pu Lehui <pulehui@huawei.com>
next prev parent reply other threads:[~2025-08-16 1:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 9:02 [PATCH 0/2] riscv, bpf: fix reads of thread_info.cpu Radim Krčmář
2025-08-12 9:02 ` [PATCH 1/2] riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG Radim Krčmář
2025-08-16 1:27 ` Pu Lehui [this message]
2025-08-12 9:02 ` [PATCH 2/2] riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id Radim Krčmář
2025-08-16 1:30 ` Pu Lehui
2025-08-12 11:37 ` [PATCH 0/2] riscv, bpf: fix reads of thread_info.cpu Alexandre Ghiti
2025-08-12 13:09 ` Radim Krčmář
2025-08-13 12:13 ` Alexandre Ghiti
2025-08-15 14:01 ` Björn Töpel
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