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From: "Jose E. Marchesi" <jose.marchesi@oracle.com>
To: bpf@vger.kernel.org
Cc: Yonghong Song <yonghong.song@linux.dev>,
	Eduard Zingerman <eddyz87@gmail.com>
Subject: Register constraint in NEG instructions
Date: Wed, 26 Jul 2023 10:33:24 +0200	[thread overview]
Message-ID: <878rb3842z.fsf@oracle.com> (raw)


Hello.

The neg (and neg32) instructions are documented to use (and encode) both
src and dst register operands in standarization/instruction-set.rst:

  BPF_NEG   0x80   dst = -src

However, in llvm's BPFAsmParser::PreMatchCheck, it is checked that both
source and destination registers refer to the same register.  If they
are not, an error is raised.

Is this to speed up JIT to different architectures, some like x86
featuring `NEG reg' and others like aarch64 featuring `NEG reg1,reg2'?

Should I send a patch for instruction-set.rst documenting the
requirement?

Thanks.

             reply	other threads:[~2023-07-26  8:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-26  8:33 Jose E. Marchesi [this message]
2023-07-26  9:16 ` Register constraint in NEG instructions Jose E. Marchesi
2023-07-26 13:30   ` Dave Thaler
2023-07-26 13:30     ` [Bpf] " Dave Thaler
2023-07-27  4:41   ` Yonghong Song

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