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Thu, 30 Jan 2025 15:25:03 -0800 (PST) Message-ID: <99c5181efc1fccb90bb04190abe174abfce8354a.camel@gmail.com> Subject: Re: [PATCH v0 2/3] bpf: verifier: Simplify register sign extension with tnum_scast From: Eduard Zingerman To: Dimitar Kanaliev , bpf@vger.kernel.org Cc: Alexei Starovoitov , Daniel Borkmann , John Fastabend , Andrii Nakryiko , Martin KaFai Lau , Song Liu , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Mykola Lysenko , Yonghong Song , Shung-Hsi Yu Date: Thu, 30 Jan 2025 15:24:58 -0800 In-Reply-To: <20250130112342.69843-3-dimitar.kanaliev@siteground.com> References: <20250130112342.69843-1-dimitar.kanaliev@siteground.com> <20250130112342.69843-3-dimitar.kanaliev@siteground.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.3 (3.54.3-1.fc41) Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2025-01-30 at 13:23 +0200, Dimitar Kanaliev wrote: [...] > static void coerce_reg_to_size_sx(struct bpf_reg_state *reg, int size) > { > - s64 init_s64_max, init_s64_min, s64_max, s64_min, u64_cval; > - u64 top_smax_value, top_smin_value; > - u64 num_bits =3D size * 8; > + u64 s =3D size * 8 - 1; > + u64 sign_mask =3D 1ULL << s; > + s64 smin_value, smax_value; > + u64 umax_value; > =20 > - if (tnum_is_const(reg->var_off)) { > - u64_cval =3D reg->var_off.value; > - if (size =3D=3D 1) > - reg->var_off =3D tnum_const((s8)u64_cval); > - else if (size =3D=3D 2) > - reg->var_off =3D tnum_const((s16)u64_cval); > - else > - /* size =3D=3D 4 */ > - reg->var_off =3D tnum_const((s32)u64_cval); > - > - u64_cval =3D reg->var_off.value; > - reg->smax_value =3D reg->smin_value =3D u64_cval; > - reg->umax_value =3D reg->umin_value =3D u64_cval; > - reg->s32_max_value =3D reg->s32_min_value =3D u64_cval; > - reg->u32_max_value =3D reg->u32_min_value =3D u64_cval; > + if (size >=3D 8) > return; > - } > =20 > - top_smax_value =3D ((u64)reg->smax_value >> num_bits) << num_bits; > - top_smin_value =3D ((u64)reg->smin_value >> num_bits) << num_bits; > + reg->var_off =3D tnum_scast(reg->var_off, size); > =20 > - if (top_smax_value !=3D top_smin_value) > - goto out; > - > - /* find the s64_min and s64_min after sign extension */ > - if (size =3D=3D 1) { > - init_s64_max =3D (s8)reg->smax_value; > - init_s64_min =3D (s8)reg->smin_value; > - } else if (size =3D=3D 2) { > - init_s64_max =3D (s16)reg->smax_value; > - init_s64_min =3D (s16)reg->smin_value; > + if (reg->var_off.mask & sign_mask) { > + smin_value =3D -(1LL << s); > + smax_value =3D (1LL << s) - 1; > } else { > - init_s64_max =3D (s32)reg->smax_value; > - init_s64_min =3D (s32)reg->smin_value; > + smin_value =3D (s64)(reg->var_off.value); > + smax_value =3D (s64)(reg->var_off.value | reg->var_off.mask); Note the following code in __update_reg64_bounds(): static void __update_reg64_bounds(struct bpf_reg_state *reg) { /* min signed is max(sign bit) | min(other bits) */ reg->smin_value =3D max_t(s64, reg->smin_value, reg->var_off.value | (reg->var_off.mask & S64_MIN)); /* max signed is min(sign bit) | max(other bits) */ reg->smax_value =3D min_t(s64, reg->smax_value, reg->var_off.value | (reg->var_off.mask & S64_MAX)); reg->umin_value =3D max(reg->umin_value, reg->var_off.value); reg->umax_value =3D min(reg->umax_value, reg->var_off.value | reg->var_off.mask); } Is it possible to set {u,s}min/{u,s}max to {U,S}64_MIN/{U,S}64_MAX and rely= on __update_reg64_bounds() for this computation? > } > =20 > - s64_max =3D max(init_s64_max, init_s64_min); > - s64_min =3D min(init_s64_max, init_s64_min); > + reg->smin_value =3D smin_value; > + reg->smax_value =3D smax_value; > =20 > - /* both of s64_max/s64_min positive or negative */ > - if ((s64_max >=3D 0) =3D=3D (s64_min >=3D 0)) { > - reg->s32_min_value =3D reg->smin_value =3D s64_min; > - reg->s32_max_value =3D reg->smax_value =3D s64_max; > - reg->u32_min_value =3D reg->umin_value =3D s64_min; > - reg->u32_max_value =3D reg->umax_value =3D s64_max; > - reg->var_off =3D tnum_range(s64_min, s64_max); > - return; > - } > + reg->umin_value =3D reg->var_off.value; > + umax_value =3D reg->var_off.value | reg->var_off.mask; > + reg->umax_value =3D umax_value; > =20 > -out: > - set_sext64_default_val(reg, size); After this commit the functions set_sext64_default_val() and set_sext32_default_val() are never called. > + reg->s32_min_value =3D (s32)smin_value; > + reg->s32_max_value =3D (s32)smax_value; > + reg->u32_min_value =3D (u32)reg->umin_value; > + reg->u32_max_value =3D (u32)umax_value; > } [...]