[PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Dave Thaler]

This patch elaborates on the use of PC by expanding the PC acronym,
explaining the units, and the relative position to which the offset
applies.

Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
 Documentation/bpf/standardization/instruction-set.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index b44bdacd0..5592620cf 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src          signed
 JSLE      0xd    any      PC += offset if dst <= src         signed
 ========  =====  =======  =================================  ===================================================
 
+where 'PC' denotes the program counter, and the offset to increment by
+is in units of 64-bit instructions relative to the instruction following
+the jump instruction.  Thus 'PC += 1' results in the next instruction
+to execute being two 64-bit instructions later.
+
 The BPF program needs to store the return value into register R0 before doing an
 ``EXIT``.
 
-- 
2.40.1

[Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Dave Thaler]

This patch elaborates on the use of PC by expanding the PC acronym,
explaining the units, and the relative position to which the offset
applies.

Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
---
 Documentation/bpf/standardization/instruction-set.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index b44bdacd0..5592620cf 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src          signed
 JSLE      0xd    any      PC += offset if dst <= src         signed
 ========  =====  =======  =================================  ===================================================
 
+where 'PC' denotes the program counter, and the offset to increment by
+is in units of 64-bit instructions relative to the instruction following
+the jump instruction.  Thus 'PC += 1' results in the next instruction
+to execute being two 64-bit instructions later.
+
 The BPF program needs to store the return value into register R0 before doing an
 ``EXIT``.
 
-- 
2.40.1

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Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Alexei Starovoitov]

On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com> wrote:
>
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
>
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
>  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..5592620cf 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src          signed
>  JSLE      0xd    any      PC += offset if dst <= src         signed
>  ========  =====  =======  =================================  ===================================================
>
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction.  Thus 'PC += 1' results in the next instruction
> +to execute being two 64-bit instructions later.

The last part is confusing.
"two 64-bit instructions later"
I'm struggling to understand that.
Maybe say that 'PC += 1' skips execution of the next insn?

Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Alexei Starovoitov]

On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com> wrote:
>
> This patch elaborates on the use of PC by expanding the PC acronym,
> explaining the units, and the relative position to which the offset
> applies.
>
> Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> ---
>  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index b44bdacd0..5592620cf 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src          signed
>  JSLE      0xd    any      PC += offset if dst <= src         signed
>  ========  =====  =======  =================================  ===================================================
>
> +where 'PC' denotes the program counter, and the offset to increment by
> +is in units of 64-bit instructions relative to the instruction following
> +the jump instruction.  Thus 'PC += 1' results in the next instruction
> +to execute being two 64-bit instructions later.

The last part is confusing.
"two 64-bit instructions later"
I'm struggling to understand that.
Maybe say that 'PC += 1' skips execution of the next insn?

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RE: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[dthaler1968]

> -----Original Message-----
> From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> Sent: Friday, April 26, 2024 12:22 PM
> To: Dave Thaler <dthaler1968@googlemail.com>
> Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> <dthaler1968@gmail.com>
> Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> 
> On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> wrote:
> >
> > This patch elaborates on the use of PC by expanding the PC acronym,
> > explaining the units, and the relative position to which the offset
> > applies.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > ---
> >  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > b/Documentation/bpf/standardization/instruction-set.rst
> > index b44bdacd0..5592620cf 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src
> signed
> >  JSLE      0xd    any      PC += offset if dst <= src         signed
> >  ========  =====  =======  =================================
> > ===================================================
> >
> > +where 'PC' denotes the program counter, and the offset to increment
> > +by is in units of 64-bit instructions relative to the instruction
> > +following the jump instruction.  Thus 'PC += 1' results in the next
> > +instruction to execute being two 64-bit instructions later.
> 
> The last part is confusing.
> "two 64-bit instructions later"
> I'm struggling to understand that.
> Maybe say that 'PC += 1' skips execution of the next insn?

If the next instruction is a 64-bit immediate instruction
that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
I assumed you'd need PC += 2, in which case "PC += 1" would
not skip execution of "the next instruction" but would try to jump 
into mid instruction, and fail verification.
Hence my attempt at "64-bit instruction" wording.

Alternate wording suggestions welcome.

Dave

Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[dthaler1968=40googlemail.com]

> -----Original Message-----
> From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> Sent: Friday, April 26, 2024 12:22 PM
> To: Dave Thaler <dthaler1968@googlemail.com>
> Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> <dthaler1968@gmail.com>
> Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> 
> On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> wrote:
> >
> > This patch elaborates on the use of PC by expanding the PC acronym,
> > explaining the units, and the relative position to which the offset
> > applies.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > ---
> >  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > b/Documentation/bpf/standardization/instruction-set.rst
> > index b44bdacd0..5592620cf 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src
> signed
> >  JSLE      0xd    any      PC += offset if dst <= src         signed
> >  ========  =====  =======  =================================
> > ===================================================
> >
> > +where 'PC' denotes the program counter, and the offset to increment
> > +by is in units of 64-bit instructions relative to the instruction
> > +following the jump instruction.  Thus 'PC += 1' results in the next
> > +instruction to execute being two 64-bit instructions later.
> 
> The last part is confusing.
> "two 64-bit instructions later"
> I'm struggling to understand that.
> Maybe say that 'PC += 1' skips execution of the next insn?

If the next instruction is a 64-bit immediate instruction
that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
I assumed you'd need PC += 2, in which case "PC += 1" would
not skip execution of "the next instruction" but would try to jump 
into mid instruction, and fail verification.
Hence my attempt at "64-bit instruction" wording.

Alternate wording suggestions welcome.

Dave


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Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Alexei Starovoitov]

On Fri, Apr 26, 2024 at 12:30 PM <dthaler1968@googlemail.com> wrote:
>
> > -----Original Message-----
> > From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> > Sent: Friday, April 26, 2024 12:22 PM
> > To: Dave Thaler <dthaler1968@googlemail.com>
> > Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> > <dthaler1968@gmail.com>
> > Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> >
> > On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> > wrote:
> > >
> > > This patch elaborates on the use of PC by expanding the PC acronym,
> > > explaining the units, and the relative position to which the offset
> > > applies.
> > >
> > > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > > ---
> > >  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > >  1 file changed, 5 insertions(+)
> > >
> > > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > > b/Documentation/bpf/standardization/instruction-set.rst
> > > index b44bdacd0..5592620cf 100644
> > > --- a/Documentation/bpf/standardization/instruction-set.rst
> > > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > > @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src
> > signed
> > >  JSLE      0xd    any      PC += offset if dst <= src         signed
> > >  ========  =====  =======  =================================
> > > ===================================================
> > >
> > > +where 'PC' denotes the program counter, and the offset to increment
> > > +by is in units of 64-bit instructions relative to the instruction
> > > +following the jump instruction.  Thus 'PC += 1' results in the next
> > > +instruction to execute being two 64-bit instructions later.
> >
> > The last part is confusing.
> > "two 64-bit instructions later"
> > I'm struggling to understand that.
> > Maybe say that 'PC += 1' skips execution of the next insn?
>
> If the next instruction is a 64-bit immediate instruction
> that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
> I assumed you'd need PC += 2, in which case "PC += 1" would
> not skip execution of "the next instruction" but would try to jump
> into mid instruction, and fail verification.

Correct.

> Hence my attempt at "64-bit instruction" wording.
>
> Alternate wording suggestions welcome.

This "jump in the middle" issue is not obvious at all from
"two 64-bit instructions" part.
Say that PC +=1 skips execution of the next insn if it's a 64-bit insn
and fails verification if the next insn is 128-bit.

Re: [Bpf] [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst

[Alexei Starovoitov]

On Fri, Apr 26, 2024 at 12:30 PM <dthaler1968@googlemail.com> wrote:
>
> > -----Original Message-----
> > From: Alexei Starovoitov <alexei.starovoitov@gmail.com>
> > Sent: Friday, April 26, 2024 12:22 PM
> > To: Dave Thaler <dthaler1968@googlemail.com>
> > Cc: bpf <bpf@vger.kernel.org>; bpf@ietf.org; Dave Thaler
> > <dthaler1968@gmail.com>
> > Subject: Re: [PATCH bpf-next] bpf, docs: Clarify PC use in instruction-set.rst
> >
> > On Fri, Apr 26, 2024 at 10:11 AM Dave Thaler <dthaler1968@googlemail.com>
> > wrote:
> > >
> > > This patch elaborates on the use of PC by expanding the PC acronym,
> > > explaining the units, and the relative position to which the offset
> > > applies.
> > >
> > > Signed-off-by: Dave Thaler <dthaler1968@googlemail.com>
> > > ---
> > >  Documentation/bpf/standardization/instruction-set.rst | 5 +++++
> > >  1 file changed, 5 insertions(+)
> > >
> > > diff --git a/Documentation/bpf/standardization/instruction-set.rst
> > > b/Documentation/bpf/standardization/instruction-set.rst
> > > index b44bdacd0..5592620cf 100644
> > > --- a/Documentation/bpf/standardization/instruction-set.rst
> > > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > > @@ -469,6 +469,11 @@ JSLT      0xc    any      PC += offset if dst < src
> > signed
> > >  JSLE      0xd    any      PC += offset if dst <= src         signed
> > >  ========  =====  =======  =================================
> > > ===================================================
> > >
> > > +where 'PC' denotes the program counter, and the offset to increment
> > > +by is in units of 64-bit instructions relative to the instruction
> > > +following the jump instruction.  Thus 'PC += 1' results in the next
> > > +instruction to execute being two 64-bit instructions later.
> >
> > The last part is confusing.
> > "two 64-bit instructions later"
> > I'm struggling to understand that.
> > Maybe say that 'PC += 1' skips execution of the next insn?
>
> If the next instruction is a 64-bit immediate instruction
> that spans 128 bits, do you need PC += 1 or PC += 2 to skip it?
> I assumed you'd need PC += 2, in which case "PC += 1" would
> not skip execution of "the next instruction" but would try to jump
> into mid instruction, and fail verification.

Correct.

> Hence my attempt at "64-bit instruction" wording.
>
> Alternate wording suggestions welcome.

This "jump in the middle" issue is not obvious at all from
"two 64-bit instructions" part.
Say that PC +=1 skips execution of the next insn if it's a 64-bit insn
and fails verification if the next insn is 128-bit.

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