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Mon, 21 Sep 2026 14:55:39 -0700 (PDT) Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 21 Sep 2026 21:55:38 +0000 Message-Id: To: "Eduard Zingerman" , "Vineet Gupta" Cc: "Alexei Starovoitov" , "Daniel Borkmann" , "Andrii Nakryiko" , "Kumar Kartikeya Dwivedi" , "Martin KaFai Lau" , "Song Liu" , "Yonghong Song" , "Jiri Olsa" , "Emil Tsalapatis" , "Ihor Solodrai" , "John Fastabend" , "Shuah Khan" , "bpf" , "LKML" , "open list:KERNEL SELFTEST FRAMEWORK" Subject: Re: [PATCH bpf-next v2 03/13] bpf: track low-32 scalar equality across zero-extending movs From: "Alexei Starovoitov" X-Mailer: aerc 0.17.0 References: <20260910164635.459558-1-vineet.gupta@linux.dev> <20260910164635.459558-4-vineet.gupta@linux.dev> <4ab75099-0e95-4fee-81da-6f4198e3e6a0@linux.dev> <202c45e2-58ba-4ad5-a234-c90703031f91@linux.dev> <951923920747d8dcba3d56ca8858e106d9c7ba4e.camel@gmail.com> In-Reply-To: <951923920747d8dcba3d56ca8858e106d9c7ba4e.camel@gmail.com> On Mon Sep 21, 2026 at 7:44 PM UTC, Eduard Zingerman wrote: > > > > >=20 > > > > > Where: > > > > > - id =3D=3D 0 =3D> no id link > > > > > - full =3D> all 64-bits of the register are identical to > > > > > all 64-bits of a scalar value `id' (let's call it X). > > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D full}, rB{X,ful= l} =3D> rA =3D=3D rB > > > > > - zext =3D> lower 32-bits of the register are identical to > > > > > lower 32-bits of a scalar value X, > > > > > upper 32-bits of the register are null. > > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D ?}, rB{X,zext} = =3D> rA % 32 =3D=3D rB % 32 > > > > > - sext =3D> lower 32-bits of the register are identical to > > > > > lower 32-bits of a scalar value X, > > > > > upper 32-bits of the register are either 0 or 1, > > > > > depending on the bit 31 value. > > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D ?}, rB{X,sext} = =3D> sext(rA % 32) =3D=3D sext(rB % 32) > > > >=20 > > > > hmm. > > > > there is also 32-bit link with delta, right? > > >=20 > > > My point is that delta is independent of 32-bit/64-bit property. > > > `delta' can be used to propagate in both directions: > > > - full 64 bit -> 32 bit sign/zero-extened > > > - 32 bit sign/zero-extened -> full 64-bit > >=20 > > both? how ? > > I was under impression that in 32-bit domain delta is one way. > > rX =3D ... > > wY =3D wX > > wY +=3D 5 > >=20 > > if wY =3D=3D 10 > > We cannot do -5 to rX > > Why? > It is still valid to transfer r32 and tnum_subreg knowledge from wY to rX= . > > wY + 5 =3D=3D rX % 32 + 5 =3D> hence rX % 32 knowledge can be recovered= . > > If rX itself had some delta, e.g.: > > rX =3D ... > rX +=3D 7 > wY =3D wX > wY +=3D 5 > > Then it would still be possible: > > wY + 5 =3D=3D (rX - 7) % 32 + 5 =3D rX % 32 - 2. > > Again, in case of this direction, only lower 32-bits of the 'full' > register can be inferred. Ok, so we're argeeing that it's not 'full' in your above definition. Your enum id_link_kind needs a 4th category : apply-delta-to-lower-32bit-..= . and it's not bi-directional. rX =3D ... wY =3D wX wY +=3D 5 if wY =3D=3D 10 here can apply -5 to lower 32-bit of rX only. rX =3D ... wY =3D wX wY +=3D 5 if rX =3D=3D 10 here can apply +5 to lower 32-bit of wY _and_ do zero extend into full rY. I don't see a value of 'zext' kind alone that doesn't do 'add delta'.