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Wed, 23 Sep 2026 15:10:02 -0700 (PDT) Content-Type: text/plain; charset=UTF-8 Date: Wed, 23 Sep 2026 22:10:02 +0000 Message-Id: Cc: "Daniel Borkmann" , "Andrii Nakryiko" , "Martin KaFai Lau" , "Eduard Zingerman" , "Kumar Kartikeya Dwivedi" , "Song Liu" , "Yonghong Song" Subject: Re: [PATCH bpf-next 1/2] bpf, x86: Support fetching AND/OR/XOR atomics in arena From: "Alexei Starovoitov" To: "Puranjay Mohan" , In-Reply-To: <20260923165301.3463007-2-puranjay@kernel.org> References: <20260923165301.3463007-1-puranjay@kernel.org> <20260923165301.3463007-2-puranjay@kernel.org> X-Mailer: mkdraft (claude review draft; edit before sending) Content-Transfer-Encoding: 8bit Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, Sep 23, 2026 at 09:52 AM Puranjay Mohan wrote: > + branch_target = prog; > + > + /* Load old value */ > + fault[0] = prog; > + if (index_reg < 0) > + emit_ldx(&prog, BPF_SIZE(insn->code), BPF_REG_0, dst_reg, insn->off); > + else > + emit_ldx_index(&prog, BPF_SIZE(insn->code), BPF_REG_0, dst_reg, > + index_reg, insn->off); can we drop the load in the arena case ? lock cmpxchg puts the current value into rax when it fails, so the loop can start with whatever R0 has in rax. Then cmpxchg is the only insn that can fault and there is no need for the 2nd extable entry and num_exentries++ in bpf_int_jit_compile().