From: sdf@google.com
To: dthaler1968@googlemail.com
Cc: bpf@vger.kernel.org, Dave Thaler <dthaler@microsoft.com>
Subject: Re: [PATCH] bpf, docs: Fix modulo zero, division by zero, overflow, and underflow
Date: Thu, 5 Jan 2023 11:01:17 -0800 [thread overview]
Message-ID: <Y7cefSXEQ3M3C9pk@google.com> (raw)
In-Reply-To: <20230105163223.3472-1-dthaler1968@googlemail.com>
On 01/05, dthaler1968@googlemail.com wrote:
> From: Dave Thaler <dthaler@microsoft.com>
> Fix modulo zero, division by zero, overflow, and underflow.
> Also clarify how a negative immediate value is used in unsigned division
> Signed-off-by: Dave Thaler <dthaler@microsoft.com>
Acked-by: Stanislav Fomichev <sdf@google.com>
With a small note below.
> ---
> Documentation/bpf/instruction-set.rst | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
> diff --git a/Documentation/bpf/instruction-set.rst
> b/Documentation/bpf/instruction-set.rst
> index e672d5ec6cc..2ba7c618f33 100644
> --- a/Documentation/bpf/instruction-set.rst
> +++ b/Documentation/bpf/instruction-set.rst
> @@ -99,19 +99,26 @@ code value description
> BPF_ADD 0x00 dst += src
> BPF_SUB 0x10 dst -= src
> BPF_MUL 0x20 dst \*= src
> -BPF_DIV 0x30 dst /= src
> +BPF_DIV 0x30 dst = (src != 0) ? (dst / src) : 0
> BPF_OR 0x40 dst \|= src
> BPF_AND 0x50 dst &= src
> BPF_LSH 0x60 dst <<= src
> BPF_RSH 0x70 dst >>= src
> BPF_NEG 0x80 dst = ~src
> -BPF_MOD 0x90 dst %= src
> +BPF_MOD 0x90 dst = (src != 0) ? (dst % src) : dst
> BPF_XOR 0xa0 dst ^= src
> BPF_MOV 0xb0 dst = src
> BPF_ARSH 0xc0 sign extending shift right
> BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_
> below)
> ======== =====
> ==========================================================
> +Underflow and overflow are allowed during arithmetic operations,
> +meaning the 64-bit or 32-bit value will wrap. If
> +eBPF program execution would result in division by zero,
> +the destination register is instead set to zero.
> +If execution would result in modulo by zero,
> +the destination register is instead left unchanged.
> +
> ``BPF_ADD | BPF_X | BPF_ALU`` means::
> dst_reg = (u32) dst_reg + (u32) src_reg;
> @@ -128,6 +135,10 @@ BPF_END 0xd0 byte swap operations (see `Byte
> swap instructions`_ below)
> dst_reg = dst_reg ^ imm32
[..]
> +Also note that the division and modulo operations are unsigned,
> +where 'imm' is first sign extended to 64 bits and then converted
> +to an unsigned 64-bit value. There are no instructions for
> +signed division or modulo.
Less sure about this part, but it looks to be true at least by looking at
the interpreter which does:
DST = DST / IMM
where:
DST === (u64) regs[insn->dst_reg]
IMM === (s32) insn->imm
(and s32 is sign-expanded to u64 according to C rules)
> Byte swap instructions
> ~~~~~~~~~~~~~~~~~~~~~~
> --
> 2.33.4
next prev parent reply other threads:[~2023-01-05 19:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 16:32 [PATCH] bpf, docs: Fix modulo zero, division by zero, overflow, and underflow dthaler1968
2023-01-05 19:01 ` sdf [this message]
2023-01-06 16:27 ` Daniel Borkmann
2023-01-06 18:11 ` Dave Thaler
2023-01-06 21:08 ` [Bpf] " Daniel Borkmann
-- strict thread matches above, loose matches on Subject: below --
2023-01-17 22:49 dthaler1968
2023-01-18 9:43 ` Jose E. Marchesi
2023-01-18 15:23 ` dthaler1968
2023-01-18 16:20 ` Daniel Borkmann
2023-01-19 22:04 ` dthaler1968
2023-01-20 1:01 ` Alexei Starovoitov
2023-01-20 20:16 ` dthaler1968
2023-01-23 21:45 ` Daniel Borkmann
2023-01-24 0:12 ` dthaler1968
2023-01-24 15:50 ` patchwork-bot+netdevbpf
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