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[34.125.90.134]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2079472e15esm41386405ad.244.2024.09.16.17.08.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2024 17:08:55 -0700 (PDT) Date: Tue, 17 Sep 2024 00:08:52 +0000 From: Peilin Ye To: Alexei Starovoitov Cc: Yonghong Song , "Jose E. Marchesi" , bpf , Josh Don , Barret Rhoden , Neel Natu , Benjamin Segall , "Paul E. McKenney" , Alexei Starovoitov , David Vernet , Dave Marchevsky , Eddy Z Subject: Re: Supporting New Memory Barrier Types in BPF Message-ID: References: <20240729183246.4110549-1-yepeilin@google.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Sep 16, 2024 at 09:14:02PM +0000, Peilin Ye wrote: > I just noticed, however: > > > On Thu, Aug 08, 2024 at 09:33:31AM -0700, Alexei Starovoitov wrote: > > > > Speaking of numeric value, out of curiosity: > > > > > > > > IMM 0 > > > > ABS 1 > > > > IND 2 > > > > MEM 3 > > > > MEMSX 4 > > > > ATOMIC 6 > > > > > > > > Was there a reason that we skipped 5? Is 5 reserved? > > > > > > See > > > /* unused opcode to mark special load instruction. Same as BPF_ABS */ > > > #define BPF_PROBE_MEM 0x20 > > > > > > /* unused opcode to mark special ldsx instruction. Same as BPF_IND */ > > > #define BPF_PROBE_MEMSX 0x40 > > > > > > /* unused opcode to mark special load instruction. Same as BPF_MSH */ > > > #define BPF_PROBE_MEM32 0xa0 > > > > > > it's used by the verifier when it remaps opcode to tell JIT. > > > It can be used, but then the internal opcode needs to change too. > > There's also: > > /* unused opcode to mark special atomic instruction */ > #define BPF_PROBE_ATOMIC 0xe0 > > 0xe0 is (7 << 5), so it seems like we've already run out of bits for > mode modifiers? Can we delete these internal opcodes and re-implement > them in other ways, to make room for MEMACQ (MEMREL)? Can we instead use the unused higher bits of bpf_insn::imm as a scratch pad? ^^^ For example, instead of letting the verifier change bpf_insn::code from BPF_ATOMIC to BPF_PROBE_ATOMIC, keep it as-is, but set the highest bit in bpf_insn::imm to let the JIT know it is a "_PROBE_" instruction, and there's a corresponding entry in the exception table. Thanks, Peilin Ye