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[34.125.108.202]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22e1521fb61sm80215915ad.144.2025.05.06.17.23.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 17:23:18 -0700 (PDT) Date: Wed, 7 May 2025 00:23:12 +0000 From: Peilin Ye To: Pu Lehui Cc: bpf@vger.kernel.org, Andrea Parri , linux-riscv@lists.infradead.org, =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= , Puranjay Mohan , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , "Paul E. McKenney" , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Luke Nelson , Xi Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Mykola Lysenko , Shuah Khan , Josh Don , Barret Rhoden , Neel Natu , Benjamin Segall Subject: Re: [PATCH bpf-next 3/8] bpf, riscv64: Support load-acquire and store-release instructions Message-ID: References: <248aa4b0ef7e439e0446d25732af7246d119c6a9.1745970908.git.yepeilin@google.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, May 06, 2025 at 10:20:04PM +0800, Pu Lehui wrote: > On 2025/4/30 8:50, Peilin Ye wrote: > > @@ -1259,7 +1318,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, > > { > > bool is64 = BPF_CLASS(insn->code) == BPF_ALU64 || > > BPF_CLASS(insn->code) == BPF_JMP; > > - int s, e, rvoff, ret, i = insn - ctx->prog->insnsi; > > + int s, e, rvoff, ret = 0, i = insn - ctx->prog->insnsi; > > struct bpf_prog_aux *aux = ctx->prog->aux; > > u8 rd = -1, rs = -1, code = insn->code; > > s16 off = insn->off; > > @@ -1962,10 +2021,14 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, > > case BPF_STX | BPF_MEM | BPF_DW: > > emit_store_64(rd, off, rs, ctx); > > break; > > + case BPF_STX | BPF_ATOMIC | BPF_B: > > + case BPF_STX | BPF_ATOMIC | BPF_H: > > case BPF_STX | BPF_ATOMIC | BPF_W: > > case BPF_STX | BPF_ATOMIC | BPF_DW: > > - emit_atomic(rd, rs, off, imm, > > - BPF_SIZE(code) == BPF_DW, ctx); > > + if (bpf_atomic_is_load_store(insn)) > > + ret = emit_atomic_ld_st(rd, rs, off, imm, code, ctx); > > + else > > + ret = emit_atomic_rmw(rd, rs, off, imm, code, ctx); > > break; > > case BPF_STX | BPF_PROBE_MEM32 | BPF_B: > > @@ -2050,7 +2113,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, > > return -EINVAL; > > } > > - return 0; > > + return ret; > > `ret` may be a value greater than zero, which will potentially cause > build_body to skip the next instruction. Let's `return 0` here, and `return > ret` if the above fails. Sure, I'll change this in v2. Thanks, Peilin Ye