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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > Thank you for your contribution! Sashiko AI review found 3 potential issu= e(s) to consider: > - [High] stmmac: exact-match coalescing logic skips TX completion interru= pts > - [High] stmmac: missing memory barrier before setting TX OWN bit > - [Medium] stmmac: XDP frame check removes SKB TX threshold reservation > -- >=20 > commit 4955fe9fec58eed4009939eaf9ed4fcf2a742ee7 > Author: Lorenzo Bianconi >=20 > net: stmmac: add XDP multi-buff support for TX side >=20 > This patch extends stmmac_xdp_xmit_xdpf to transmit XDP frames with fragm= ents > by mapping and programming each buffer into a dedicated TX descriptor. >=20 > > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/driver= s/net/ethernet/stmicro/stmmac/stmmac_main.c > > index bf9e7e4cb1c31..41ccde6371ecd 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > > @@ -5239,77 +5239,114 @@ static unsigned int stmmac_rx_buf2_len(struct = stmmac_priv *priv, > [ ... ] > > - if (stmmac_tx_avail(priv, queue) < STMMAC_TX_THRESH(priv)) > > + if (stmmac_tx_avail(priv, queue) < num_frames) >=20 > [Severity: Medium] > Could this change lead to TX ring starvation for standard SKB traffic? >=20 > The STMMAC_TX_THRESH check was designed to reserve a portion of the share= d TX > ring for standard SKB traffic. By replacing the threshold with a check ag= ainst > just num_frames, heavy XDP loads could exhaust all available TX descripto= rs, > potentially leaving 0 descriptors for SKBs and monopolizing the TX ring. ack, I will fix it in v2. >=20 > > return STMMAC_XDP_CONSUMED; > [ ... ] > > + tx_q->tx_count_frames +=3D num_frames; > > =20 > > - if (tx_q->tx_count_frames % priv->tx_coal_frames[queue] =3D=3D 0) > > - set_ic =3D true; > > - else > > - set_ic =3D false; > > - > > - if (set_ic) { > > + if (!(tx_q->tx_count_frames % priv->tx_coal_frames[queue])) { >=20 > [Severity: High] > Will this exact-match coalescing logic reliably trigger TX completion > interrupts? >=20 > When transmitting XDP multi-buffer frames, tx_count_frames increases by > num_frames, which can be greater than 1. The modulo condition relies on an > exact match to 0 to trigger the Interrupt on Completion (IC) bit. >=20 > If num_frames causes the counter to overshoot a multiple of tx_coal_frames > (for example, jumping from 24 to 26 when the threshold is 25), the IC bit > will not be set. This could indefinitely delay TX completion handling and > exhaust the TX ring. ack, I will fix it in v2. >=20 > > + struct stmmac_txq_stats *txq_stats; > > =20 > > + desc =3D stmmac_get_tx_desc(priv, tx_q, entry); > > + stmmac_set_tx_ic(priv, desc); > > tx_q->tx_count_frames =3D 0; > > - stmmac_set_tx_ic(priv, tx_desc); > > + > > + txq_stats =3D &priv->xstats.txq_stats[queue]; > > u64_stats_update_begin(&txq_stats->q_syncp); > > u64_stats_inc(&txq_stats->q.tx_set_ic_bit); > > u64_stats_update_end(&txq_stats->q_syncp); > > } > > =20 > > + /* Set the OWN bit on the first descriptor now that all descriptors > > + * for this skb are populated. > > + */ > > + desc =3D stmmac_get_tx_desc(priv, tx_q, first_entry); > > + stmmac_set_tx_owner(priv, desc); >=20 > [Severity: High] > Is a dma_wmb() needed here before setting the TX OWN bit on the first > descriptor? >=20 > The new logic loops over fragments, calling stmmac_prepare_tx_desc() with > tx_own=3D0 for the first descriptor. This effectively bypasses the intern= al > dma_wmb() inside stmmac_prepare_tx_desc(), which typically requires both > is_fs and tx_own to be true. >=20 > Without a preceding dma_wmb() before manually setting the OWN bit here, > the CPU might reorder the write to the first descriptor's OWN bit before > the writes that populated the fragment descriptors. The DMA engine could > then process stale or uninitialized memory. I do not think we need dma_wmb() here since this is the same logic used in stmmac_xmit() and the barrier is already in stmmac_flush_tx_descriptors(). Regards, Lorenzo >=20 > > + tx_q->cur_tx =3D STMMAC_NEXT_ENTRY(entry, priv->dma_conf.dma_tx_size); > > stmmac_enable_dma_transmission(priv, priv->ioaddr, queue); > > =20 > > - entry =3D STMMAC_NEXT_ENTRY(entry, priv->dma_conf.dma_tx_size); > > - tx_q->cur_tx =3D entry; > > - > > return STMMAC_XDP_TX; > [ ... ] >=20 > --=20 > Sashiko AI review =B7 https://sashiko.dev/#/patchset/20260923-b4-stmmac-x= mit-mb-v1-1-a71a1c522142@oss.qualcomm.com?part=3D1 --sUjn4NdSVny70mPK Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCarUXzAAKCRA6cBh0uS2t rE2mAQDUWRyR28r7qW9noRVrFq+1hrbppbhjx5CFpQ4kZUMuogEAqHYdpXIxc76u XE3fBz00QLmevzugPas9/IkBIRK+lAA= =JQJ8 -----END PGP SIGNATURE----- --sUjn4NdSVny70mPK--