From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DBF57F9 for ; Fri, 11 Oct 2024 04:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.180 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728620173; cv=none; b=Nv4jBjximt214eCnkkSqJ+VZmCu2HXJ1Y7YPzJcKgbcafDsw5m3dsu3/5dhZhQ/P9pvTKSQg50RIZDRQ8VynAse5GAe+8U6VRXvok2fEj9E9W+v/GyjGvnys3xOS5T1VAz7M22uujQVNfLYfdxP4L2HpNHoNHSkpu6xOqmGaZVU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728620173; c=relaxed/simple; bh=ioEYPZzqI7PnpOX4eJKqwUZGYNzBMz4lkAXxIXUeXBU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=uq7N8qiegq1+Vy7iENejLP3boOGeVurD/tTFY0RUpj5QhYQSAKkO5HDAZwSqE5f0JW6wifZK0MbLUZWRDgkK/Kwba7sigUuY7gP7UXJkxWEOIfCPU7E1Zfx9ZOjx1ACp163YdrjSZjxu7ivWhQFUzQKTb3Hp1XWF2SptIqcOK4s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=JpKFnY7H; arc=none smtp.client-ip=91.218.175.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="JpKFnY7H" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1728620169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/kzXGtYpfNKlhytFsKhnwUeqrz0rUu6I/3O9JX96Iu4=; b=JpKFnY7H0o003CP3qMNkJnFofFmZ5nOxD9gZfPnfHsL4cfFjHktyw5o2HIsh3cYb9jZyPQ 7xwTOr3HgST3tfChhrezL+H4x7cOhUk8q2yf92crDZsUy9/l6nxxBDhqubv112KRLdqn+r 6QsjWcyYotcZoKPDzlmt2PSj1ijzsEs= Date: Thu, 10 Oct 2024 21:16:02 -0700 Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH bpf-next v4 08/10] bpf, x86: Create two helpers for some arith operations Content-Language: en-GB To: Alexei Starovoitov Cc: bpf , Alexei Starovoitov , Andrii Nakryiko , Daniel Borkmann , Kernel Team , Martin KaFai Lau , Tejun Heo References: <20241010175552.1895980-1-yonghong.song@linux.dev> <20241010175633.1898994-1-yonghong.song@linux.dev> X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Yonghong Song In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT On 10/10/24 1:21 PM, Alexei Starovoitov wrote: > On Thu, Oct 10, 2024 at 10:56 AM Yonghong Song wrote: >> Two helpers are extracted from bpf/x86 jit: >> - a helper to handle 'reg1 = reg2' where is add/sub/and/or/xor >> - a helper to handle 'reg *= imm' >> >> Both helpers will be used in the subsequent patch. >> >> Signed-off-by: Yonghong Song >> --- >> arch/x86/net/bpf_jit_comp.c | 51 ++++++++++++++++++++++++------------- >> 1 file changed, 34 insertions(+), 17 deletions(-) >> >> diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c >> index a6ba85cec49a..297dd64f4b6a 100644 >> --- a/arch/x86/net/bpf_jit_comp.c >> +++ b/arch/x86/net/bpf_jit_comp.c >> @@ -1475,6 +1475,37 @@ static void emit_alu_helper_1(u8 **pprog, u8 insn_code, u32 dst_reg, s32 imm32) >> *pprog = prog; >> } >> >> +/* emit ADD/SUB/AND/OR/XOR 'reg1 = reg2' operations */ >> +static void emit_alu_helper_2(u8 **pprog, u8 insn_code, u32 dst_reg, u32 src_reg) >> +{ >> + u8 b2 = 0; >> + u8 *prog = *pprog; >> + >> + maybe_emit_mod(&prog, dst_reg, src_reg, >> + BPF_CLASS(insn_code) == BPF_ALU64); >> + b2 = simple_alu_opcodes[BPF_OP(insn_code)]; >> + EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg)); >> + >> + *pprog = prog; >> +} >> + >> +/* emit 'reg *= imm' operations */ >> +static void emit_alu_helper_3(u8 **pprog, u8 insn_code, u32 dst_reg, s32 imm32) > _1, _2, _3 ?! > > There must be a better way to name the helpers. Like: > > _1 -> emit_alu_imm > _2 -> emit_alu_reg > _3 -> emit_mul_imm I struggle to get a proper name here. I originally thought about to use emit_alu_reg_imm, emit_alu_reg_reg, but in my case, even emit_alu_reg_imm only supports add/sub/and/or/xor and it does not support mul/div/mod, so emit_alu_reg_imm does not really cover all alu operations so I chose another name which is also not good. I guess I can use the above you suggested in the above which actually covers most alu operations.