Re: [PATCH bpf-next 1/2] bpf,riscv: Implement PROBE_MEM32 pseudo instructions

[Pu Lehui <pulehui@huawei.com>]

On 2024/3/23 23:46, Puranjay Mohan wrote:
> Add support for [LDX | STX | ST], PROBE_MEM32, [B | H | W | DW]
[snip]
>   
>   #define BPF_FIXUP_OFFSET_MASK   GENMASK(26, 0)
>   #define BPF_FIXUP_REG_MASK      GENMASK(31, 27)
> +#define DONT_CLEAR		16	/* RV_REG_A6 unused in BPF */

This is a bit misleading. RV_REG_A6 is actually used in riscv64. Maybe 
"RV_REG_A6 unused in pt_regmap" or change to other register will be better.

>   
>   bool ex_handler_bpf(const struct exception_table_entry *ex,
[snip]
>   
>   	stack_adjust = round_up(stack_adjust, 16);
>   	stack_adjust += bpf_stack_adjust;
> @@ -1794,6 +1974,10 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)
>   		emit_sd(RV_REG_SP, store_offset, RV_REG_S6, ctx);
>   		store_offset -= 8;
>   	}
> +	if (ctx->arena_vm_start) {
> +		emit_sd(RV_REG_SP, store_offset, RV_REG_S11, ctx);
> +		store_offset -= 8;
> +	}

I think it's fine to use s7 and keep the original dynamic stack code style.

>   
>   	emit_addi(RV_REG_FP, RV_REG_SP, stack_adjust, ctx);
>   
> @@ -1807,6 +1991,9 @@ void bpf_jit_build_prologue(struct rv_jit_context *ctx, bool is_subprog)
>   		emit_mv(RV_REG_TCC_SAVED, RV_REG_TCC, ctx);
>   
>   	ctx->stack_size = stack_adjust;
> +
> +	if (ctx->arena_vm_start)
> +		emit_imm(RV_REG_S11, ctx->arena_vm_start, ctx);
>   }
>   
>   void bpf_jit_build_epilogue(struct rv_jit_context *ctx)
> diff --git a/arch/riscv/net/bpf_jit_core.c b/arch/riscv/net/bpf_jit_core.c
> index 6b3acac30c06..9b6696b1290a 100644
> --- a/arch/riscv/net/bpf_jit_core.c
> +++ b/arch/riscv/net/bpf_jit_core.c
> @@ -50,6 +50,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
>   	int pass = 0, prev_ninsns = 0, i;
>   	struct rv_jit_data *jit_data;
>   	struct rv_jit_context *ctx;
> +	u64 arena_vm_start;

unused variable