Re: [PATCH bpf-next v5 00/16] bpf: Support stack arguments for BPF functions and kfuncs

[Puranjay Mohan <puranjay@kernel.org>]

Yonghong Song <yonghong.song@linux.dev> writes:

> Currently, bpf function calls and kfunc's are limited by 5 reg-level
> parameters. For function calls with more than 5 parameters,
> developers can use always inlining or pass a struct pointer
> after packing more parameters in that struct. But there is
> no workaround for kfunc if more than 5 parameters is needed.
>
> This patch set lifts the 5-argument limit by introducing stack-based
> argument passing for BPF functions and kfunc's, coordinated with
> compiler support in LLVM [1]. The compiler emits loads/stores through
> a new bpf register r11 (BPF_REG_PARAMS) to pass arguments beyond

As an overall design of BPF as an architecture, shouldn't it map 1-1
with atleast one real architecture like x86-64? So it runs as fast a
possible on that architecture?

x86 supports passing 6 arguments in registers, BPF currently supports
only 5 (I am not aware of why it was designed like this to start with)

Now, if we add  6+ arguments support by using the stack, the 6th
argument that could have been easily mapped to a caller saved register
(R9) will need special handling.

I know changing these fundamental things about the ISA is not possible
now, like making BPF R6 caller saved and passing the argument in that.
Or add more registers to BPF so it runs faster on RISC architectures.

At least we can make the compiler treat these r11 based stack slots as
caller saved, so they can be mapped to real registers by the JIT
efficiently.

I would say atleast make the first 3 slots (arg 6-8) caller saved
(reload them before every call), so they can be mapped to 3 arm64
registers. riscv64 also has the same layout and it will also map them to
3 registers directly.

Or to make it simpler, just make all the stack slots caller saved.

Thanks,
Puranjay